hpw421初始版本
This commit is contained in:
xushaoxiang
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/**
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****************************************************************************************
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*
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* @file em_map_bt.h
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*
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* @brief Mapping of the different descriptors in the exchange memory
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*
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* Copyright (C) RivieraWaves 2009-2015
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*
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*
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****************************************************************************************
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*/
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#ifndef EM_MAP_BT_H_
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#define EM_MAP_BT_H_
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/**
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****************************************************************************************
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* @addtogroup EM Exchange Memory
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* @ingroup CONTROLLER
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* @brief Mapping of the different descriptors in the exchange memory
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*
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* @{
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****************************************************************************************
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*/
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/*
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* INCLUDE FILES
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****************************************************************************************
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*/
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#include "rwip_config.h"
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#include <stdint.h> // integer
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#include "_reg_em_bt_cs.h"
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#include "_reg_em_bt_rxdesc.h"
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#include "_reg_em_bt_txdesc.h"
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/// Null pointer in EM offset space
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#define EM_PTR_NULL (0x0000)
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/*
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* CONTROL STRUCTURES
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****************************************************************************************
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*/
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/**
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* Control Structures area definition
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*
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* - ACL (N)
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* - INQ
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* - ISCAN
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* - Active slave broadcast
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* - Sync train
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* - Sync scan
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* - Connectionless slave broadcast TX
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* - Connectionless slave broadcast RX
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*/
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#define EM_BT_CS_OFFSET (CO_ALIGN4_HI(EM_BT_OFFSET))
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#define EM_BT_CS_NB (MAX_NB_ACTIVE_ACL+5+2*CSB_SUPPORT)
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#define EM_BT_CS_END (EM_BT_CS_OFFSET + EM_BT_CS_NB * REG_EM_BT_CS_SIZE)
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/**
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* Control Structures indexes definition
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*/
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#define EM_BT_CS_ACL_INDEX(acl) (acl)
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#define EM_BT_CS_IDX_TO_LID(idx) (idx)
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#define EM_BT_CS_INQ_INDEX (MAX_NB_ACTIVE_ACL)
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#define EM_BT_CS_ISCAN_INDEX (EM_BT_CS_INQ_INDEX + 1)
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#define EM_BT_CS_ACT_BCST_INDEX (EM_BT_CS_ISCAN_INDEX + 1)
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#define EM_BT_CS_STRAIN_INDEX (EM_BT_CS_ACT_BCST_INDEX + 1)
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#define EM_BT_CS_SSCAN_INDEX (EM_BT_CS_STRAIN_INDEX + 1)
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#define EM_BT_CS_CSB_TX_INDEX (EM_BT_CS_SSCAN_INDEX + 1)
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#define EM_BT_CS_CSB_RX_INDEX (EM_BT_CS_CSB_TX_INDEX + 1)
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#define EM_BT_CS_INDEX_MAX (EM_BT_CS_CSB_RX_INDEX + 1)
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/**
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* Frame Format
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* Bluetooth state and device activity used for frequency selection and TDD frame format. See section 3.5 for further details
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* Note this field is automatically updated by the RW-BT Core when changing from Page to Master Page Response mode.
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* - 0000x: Do not use. -
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* - 00010: Master connect. Master device
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* - 00011: Slave connect. Slave device
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* - 00100: Page. Initiator device
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* - 00101: Page scan. Responder device
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* - 00110: Master page response. -
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* - 00111: Slave page response. -
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* - 01000: Inquiry. Initiator device
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* - 01001: Inquiry response Responder device
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* - 01010: Do not use. -
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* - 01011: Do not use. -
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* - 011xx: Do not use. -
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* - 10xxx: Do not use. -
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* - 11000: Master Broadcast Master device
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* - 11001: Broadcast Scan Slave device
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* - 11010: Master Access window. Master device
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* - 11011: Slave Access window 1. Slave device
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* - 11100: Slave Access window 2. Slave device
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* - 11101: Do not use. -
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* - 1111x: Do not use -
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*/
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#define EM_BT_CS_FMT_MST_CONNECT 0x02
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#define EM_BT_CS_FMT_SLV_CONNECT 0x03
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#define EM_BT_CS_FMT_PAGE 0x04
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#define EM_BT_CS_FMT_PAGE_SCAN 0x05
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#define EM_BT_CS_FMT_MST_PAGE_RSP 0x06
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#define EM_BT_CS_FMT_SLV_PAGE_RSP 0x07
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#define EM_BT_CS_FMT_INQUIRY 0x08
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#define EM_BT_CS_FMT_INQ_RSP 0x09
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#define EM_BT_CS_FMT_MST_BCST 0x18
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#define EM_BT_CS_FMT_BCST_SCAN 0x19
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#define EM_BT_CS_FMT_MST_ACC_WIN 0x1A
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#define EM_BT_CS_FMT_SLV_ACC_WIN1 0x1B
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#define EM_BT_CS_FMT_SLV_ACC_WIN2 0x1C
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/// Maximum value of RXWINSZ field (8191)
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#define EM_BT_CS_RXWINSZ_MAX ((1 << 13)-1)
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/// Maximum value of MAXFRMTIME field (8191)
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#define EM_BT_CS_MAXFRMTIME_MAX ((1 << 13)-1)
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/*
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* RX DESCRIPTORS
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****************************************************************************************
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*/
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/**
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* RX Descriptors area definition
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*/
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#define EM_BT_RXDESC_OFFSET (CO_ALIGN4_HI(EM_BT_CS_END))
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#define EM_BT_RXDESC_NB (BT_RXDESC_NB)
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#define EM_BT_RXDESC_END (EM_BT_RXDESC_OFFSET + EM_BT_RXDESC_NB * REG_EM_BT_RXDESC_SIZE)
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/*
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* TX DESCRIPTORS
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****************************************************************************************
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*/
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/**
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* TX Descriptors area definition
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*
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* - ACL (2xN)
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* - Active slave broadcast
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* - FHS
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* - EIR
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* - Sync train packet
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* - Connectionless slave broadcast
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*/
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#define EM_BT_TXDESC_OFFSET (CO_ALIGN4_HI(EM_BT_RXDESC_END))
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#define EM_BT_TXDESC_NB (2*MAX_NB_ACTIVE_ACL + 4 + CSB_SUPPORT)
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#define EM_BT_TXDESC_END (EM_BT_TXDESC_OFFSET + EM_BT_TXDESC_NB * REG_EM_BT_TXDESC_SIZE)
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#define EM_BT_TXDESC_ACL_INDEX(acl, tog) (2*acl + tog)
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#define EM_BT_TXDESC_ACT_BCST_INDEX (2*MAX_NB_ACTIVE_ACL)
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#define EM_BT_TXDESC_ISCANFHS_INDEX (EM_BT_TXDESC_ACT_BCST_INDEX + 1)
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#define EM_BT_TXDESC_EIR_INDEX (EM_BT_TXDESC_ISCANFHS_INDEX + 1)
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#define EM_BT_TXDESC_STP_INDEX (EM_BT_TXDESC_EIR_INDEX + 1)
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#define EM_BT_TXDESC_CSB_INDEX (EM_BT_TXDESC_STP_INDEX + 1)
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/*
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* LMP RX BUFFERS
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****************************************************************************************
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*/
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/// LMP RX buffers area definition
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#define EM_BT_LMPRXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_TXDESC_END))
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#define EM_BT_LMPRXBUF_NB (EM_BT_RXDESC_NB)
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#define EM_BT_LMPRXBUF_SIZE (20)
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#define EM_BT_LMPRXBUF_END (EM_BT_LMPRXBUF_OFFSET + EM_BT_LMPRXBUF_NB * EM_BT_LMPRXBUF_SIZE)
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/*
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* LMP TX BUFFERS
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****************************************************************************************
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*/
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/// LMP TX buffers area definition
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#define EM_BT_LMPTXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_LMPRXBUF_END))
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#define EM_BT_LMPTXBUF_NB (BT_LMP_BUF_NB_TX)
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#define EM_BT_LMPTXBUF_SIZE (24)
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#define EM_BT_LMPTXBUF_END (EM_BT_LMPTXBUF_OFFSET + EM_BT_LMPTXBUF_NB * EM_BT_LMPTXBUF_SIZE)
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/*
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* ISCAN FHS TX BUFFER
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****************************************************************************************
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*/
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/// ISCAN FHS TX buffer area definition
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#define EM_BT_ISCANFHSTXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_LMPTXBUF_END))
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#define EM_BT_ISCANFHSTXBUF_SIZE (20)
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#define EM_BT_ISCANFHSTXBUF_END (EM_BT_ISCANFHSTXBUF_OFFSET + EM_BT_ISCANFHSTXBUF_SIZE)
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/*
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* PAGE FHS TX BUFFER
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****************************************************************************************
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*/
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/// PAGE FHS TX buffer area definition
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#define EM_BT_PAGEFHSTXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_ISCANFHSTXBUF_END))
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#define EM_BT_PAGEFHSTXBUF_SIZE (20)
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#define EM_BT_PAGEFHSTXBUF_END (EM_BT_PAGEFHSTXBUF_OFFSET + EM_BT_PAGEFHSTXBUF_SIZE)
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/*
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* EIR TX BUFFER
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****************************************************************************************
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*/
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/// EIR TX buffer area definition
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#define EM_BT_EIRTXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_PAGEFHSTXBUF_END))
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#define EM_BT_EIRTXBUF_SIZE (240)
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#define EM_BT_EIRTXBUF_END (EM_BT_EIRTXBUF_OFFSET + EM_BT_EIRTXBUF_SIZE)
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/*
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* SAM SUBMAP BUFFER
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****************************************************************************************
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*/
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/// SAM SUBMAP (Local) buffer area definition
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#define EM_BT_LOCAL_SAM_SUBMAP_OFFSET (CO_ALIGN4_HI(EM_BT_EIRTXBUF_END))
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#define EM_BT_LOCAL_SAM_SUBMAP_SIZE (SAM_TYPE0_SUBMAP_LEN)
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#define EM_BT_LOCAL_SAM_SUBMAP_END (EM_BT_LOCAL_SAM_SUBMAP_OFFSET + EM_BT_LOCAL_SAM_SUBMAP_SIZE)
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/// SAM MAP (Peer) buffer area definition
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#define EM_BT_PEER_SAM_MAP_OFFSET (CO_ALIGN4_HI(EM_BT_LOCAL_SAM_SUBMAP_END))
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#define EM_BT_PEER_SAM_MAP_OFF(acl) (EM_BT_PEER_SAM_MAP_OFFSET + (acl * RW_PEER_SAM_MAP_MAX_LEN))
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#define EM_BT_PEER_SAM_MAP_SIZE (MAX_NB_ACTIVE_ACL * RW_PEER_SAM_MAP_MAX_LEN) // HW restriction
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#define EM_BT_PEER_SAM_MAP_END (EM_BT_PEER_SAM_MAP_OFFSET + EM_BT_PEER_SAM_MAP_SIZE)
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/*
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* STP TX BUFFER
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****************************************************************************************
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*/
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/// Sync Train Packet TX buffer area definition
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#define EM_BT_STPTXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_PEER_SAM_MAP_END))
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#define EM_BT_STPTXBUF_SIZE (28)
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#define EM_BT_STPTXBUF_END (EM_BT_STPTXBUF_OFFSET + EM_BT_STPTXBUF_SIZE)
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/*
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* ACL RX BUFFERS
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****************************************************************************************
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*/
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/// ACL RX buffers area definition
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#define EM_BT_ACLRXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_STPTXBUF_END))
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#define EM_BT_ACLRXBUF_NB (ACL_DATA_BUF_NB_RX)
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#define EM_BT_ACLRXBUF_SIZE (1028)
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#define EM_BT_ACLRXBUF_END (EM_BT_ACLRXBUF_OFFSET + EM_BT_ACLRXBUF_NB * EM_BT_ACLRXBUF_SIZE)
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/*
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* ACL TX BUFFERS
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****************************************************************************************
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*/
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/// ACL TX buffers area definition
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#define EM_BT_ACLTXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_ACLRXBUF_END))
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#define EM_BT_ACLTXBUF_NB (ACL_DATA_BUF_NB_TX)
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#define EM_BT_ACLTXBUF_SIZE (1028)
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#define EM_BT_ACLTXBUF_END (EM_BT_ACLTXBUF_OFFSET + EM_BT_ACLTXBUF_NB * EM_BT_ACLTXBUF_SIZE)
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/*
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* AUDIO RX BUFFERS
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****************************************************************************************
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*/
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/// AUDIO buffers area definition
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#define EM_BT_AUDIOBUF_OFFSET (CO_ALIGN4_HI(EM_BT_ACLTXBUF_END))
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#define EM_BT_AUDIOBUF_NB (MAX_NB_SYNC)
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#define EM_BT_AUDIOBUF_SIZE (2*1080) // (4*1080) !!! Maximum configuration (2 x eSCO-3EV5) not possible on Bubble
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#define EM_BT_AUDIOBUF_END (EM_BT_AUDIOBUF_OFFSET + EM_BT_AUDIOBUF_NB * EM_BT_AUDIOBUF_SIZE)
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#define EM_BT_AUDIOBUF_OFF(sco) (EM_BT_AUDIOBUF_OFFSET + (sco * EM_BT_AUDIOBUF_SIZE))
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/*
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* END
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****************************************************************************************
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*/
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#define EM_BT_END (EM_BT_AUDIOBUF_END)
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/// @} EM
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#endif // EM_MAP_BT_H_
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@@ -0,0 +1,70 @@
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/**
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****************************************************************************************
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*
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* @file rwbt.h
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*
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* @brief RWBT interrupt definitions
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*
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* Copyright (C) RivieraWaves 2009-2015
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*
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*
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****************************************************************************************
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*/
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#ifndef _RW_BT_H_
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#define _RW_BT_H_
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/**
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****************************************************************************************
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* @addtogroup ROOT
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* @brief Entry points of the BT stack
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*
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* This module contains the primitives that allow an application accessing and running the
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* BT protocol stack.
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*
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*
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* @{
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****************************************************************************************
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*/
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#include <stdint.h> // standard integer definitions
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#include <stdbool.h> // standard boolean definitions
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#include "rwip_config.h" // stack configuration
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#include "arch.h"
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/*
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* FUNCTION DECLARATION
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*****************************************************************************************
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*/
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/**
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****************************************************************************************
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* @brief Initializes the RW BT SW.
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*
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****************************************************************************************
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*/
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void rwbt_init(void);
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/**
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****************************************************************************************
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* @brief Reset the RW BT SW.
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*
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****************************************************************************************
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*/
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void rwbt_reset(void);
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/**
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****************************************************************************************
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* @brief The RWBT core interrupt handler.
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*
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* Handles both the clock interrupt and the Rx Packet interrupt (when activated)
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* In the case of a clock interrupt, check if there are active links and which one
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* has the highest priority.
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*
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****************************************************************************************
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*/
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__BTIRQ void rwbt_isr(void);
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///@} ROOT
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#endif // _RW_BT_H_
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@@ -0,0 +1,245 @@
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/**
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****************************************************************************************
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*
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* @file rwbt_config.h
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*
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* @brief Configuration of the BT protocol stack (max number of supported connections,
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* type of partitioning, etc.)
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*
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* Copyright (C) RivieraWaves 2009-2015
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*
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*
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****************************************************************************************
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*/
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#ifndef RWBT_CONFIG_H_
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#define RWBT_CONFIG_H_
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/**
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****************************************************************************************
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* @addtogroup ROOT
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* @{
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*
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* @name RWBT Stack Configuration
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* @{
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****************************************************************************************
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*/
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/*
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* INCLUDE FILES
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||||
****************************************************************************************
|
||||
*/
|
||||
|
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/*
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* DEFINES
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****************************************************************************************
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*/
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/******************************************************************************************/
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/* -------------------------- GENERAL SETUP --------------------------------------*/
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/******************************************************************************************/
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/// Maximum number of ACL links
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#define MAX_NB_ACTIVE_ACL CFG_CON_ACL
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/// BT Heap size
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#define BT_HEAP_MSG_SIZE (256 + 256 * MAX_NB_ACTIVE_ACL)
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#define BT_HEAP_ENV_SIZE (1024 + 1024 * MAX_NB_ACTIVE_ACL)
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/// Number of BT tasks
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#define BT_TASK_SIZE 4
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/// Number of RX descriptors
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#define BT_RXDESC_NB (4)
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/// Number of RX/TX ACL data buffers
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#define ACL_DATA_BUF_NB_RX (BT_RXDESC_NB + 2)
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#define ACL_DATA_BUF_NB_TX (MAX_NB_ACTIVE_ACL + 2)
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/// Guard space reserved for HCI header in ACL RX buffers
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#define ACL_RX_BUF_HEADER_SPACE (HCI_ACL_HDR_LEN + 1)
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/// Number of TX LMP buffers
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#if (MAX_NB_ACTIVE_ACL > 3)
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#define BT_LMP_BUF_NB_TX (2*MAX_NB_ACTIVE_ACL)
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#else // (MAX_NB_ACTIVE_ACL > 3)
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#define BT_LMP_BUF_NB_TX (7)
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#endif // (MAX_NB_ACTIVE_ACL > 3)
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/// Maximum ACL Data Packet Size
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#define ACL_DATA_BUF_SIZE DH5_3_PACKET_SIZE
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/// Normal Rx window size
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#define NORMAL_WIN_SIZE 26
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/// Range of key size supported by the FW
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#define ENC_KEY_SIZE_MAX 16
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#define ENC_KEY_SIZE_MIN 7
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#define ENC_KEY_SIZE_MASK 0xFFFF
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/// Inquiry response TX power (the value code depends on radio used)
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#define INQ_RSP_TX_PWR rwip_rf.txpwr_max
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/// Size of the inquiry result filtering list
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||||
#define INQ_FILT_LEN 10
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||||
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||||
/******************************************************************************************/
|
||||
/* -------------------------- SYNC SETUP ------------------------------------------*/
|
||||
/******************************************************************************************/
|
||||
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||||
/// Maximum number of Synchronous connections (0 to 2)
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#define MAX_NB_SYNC CFG_CON_SCO
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||||
/// Flag indicating if debug mode is activated or not
|
||||
#if defined (CFG_VOHCI) && (MAX_NB_SYNC > 0)
|
||||
#define VOICE_OVER_HCI 1
|
||||
#else
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||||
#define VOICE_OVER_HCI 0
|
||||
#endif // defined (CFG_VOHCI) && (MAX_NB_SYNC > 0)
|
||||
|
||||
#if VOICE_OVER_HCI
|
||||
/// Number of Synchronous TX buffers used for one VoHCI link
|
||||
#define SYNC_TX_BUF_NB 4
|
||||
/// Number of Synchronous RX buffers used for one VoHCI link
|
||||
#define SYNC_RX_BUF_NB 3
|
||||
/// Guard space reserved for HCI header in Sync RX buffers
|
||||
#define SYNC_RX_BUF_HEADER_SPACE (HCI_SYNC_HDR_LEN + 1)
|
||||
#endif //(VOICE_OVER_HCI)
|
||||
|
||||
/// Synchronous link negotiation number of retries
|
||||
#define SYNC_NEGO_TRY 1
|
||||
|
||||
/******************************************************************************************/
|
||||
/* ------------------------- FIRMWARE SETUP ---------------------------------------*/
|
||||
/******************************************************************************************/
|
||||
|
||||
///Number of HCI Event filter
|
||||
#define HCI_FILTER_NB 0x5
|
||||
|
||||
/*
|
||||
* Test mode option to be able to enter test mode as defined
|
||||
* in part I1: BT Test Mode, of the BT specification.
|
||||
*/
|
||||
/// Test mode support
|
||||
#define TEST_MODE 1
|
||||
|
||||
/******************************************************************************************/
|
||||
/* ------------------------- COEXISTENCE SETUP ------------------------------------*/
|
||||
/******************************************************************************************/
|
||||
|
||||
/// WLAN Coexistence
|
||||
#define RW_BT_WLAN_COEX RW_WLAN_COEX
|
||||
///WLAN test mode
|
||||
#define RW_BT_WLAN_COEX_TEST RW_WLAN_COEX_TEST
|
||||
|
||||
/// MWS Coexistence
|
||||
#define RW_BT_MWS_COEX RW_MWS_COEX
|
||||
///WLAN test mode
|
||||
#define RW_BT_MWS_COEX_TEST RW_MWS_COEX_TEST
|
||||
|
||||
///To let the HW using the default values set in the registers
|
||||
#define RW_BT_PTI_PRIO_AUTO 31
|
||||
|
||||
/// Coexistence Packet traffic information - Index Definitions
|
||||
enum rwbt_pti_config_idx
|
||||
{
|
||||
BT_PTI_PAGERES_IDX ,
|
||||
BT_PTI_MCONPEND_IDX ,
|
||||
BT_PTI_PSCANRES_IDX ,
|
||||
BT_PTI_SCONPEND_IDX ,
|
||||
BT_PTI_MSSWITCH_IDX ,
|
||||
BT_PTI_SNIFFANC_IDX ,
|
||||
BT_PTI_BEACON_IDX ,
|
||||
BT_PTI_SNIFFATT_IDX ,
|
||||
BT_PTI_ACCWIN_IDX ,
|
||||
BT_PTI_POLLINT_IDX ,
|
||||
BT_PTI_PAGE_IDX ,
|
||||
BT_PTI_PSCAN_IDX ,
|
||||
BT_PTI_INQ_IDX ,
|
||||
BT_PTI_INQSCAN_IDX ,
|
||||
BT_PTI_INQRES_IDX ,
|
||||
BT_PTI_SCORSVD_IDX ,
|
||||
BT_PTI_SCORETX_IDX ,
|
||||
BT_PTI_ACLTX_IDX ,
|
||||
BT_PTI_ACLRETX_IDX ,
|
||||
BT_PTI_LMPTX_IDX ,
|
||||
BT_PTI_BCAST_IDX ,
|
||||
BT_PTI_CONNECT_IDX ,
|
||||
BT_PTI_IDX_MAX
|
||||
};
|
||||
|
||||
/******************************************************************************************/
|
||||
/* ------------------------- AFH SETUP ------------------------------------*/
|
||||
/******************************************************************************************/
|
||||
|
||||
/// Minimum classification interval requested to slave devices (in slots) (2 secs)
|
||||
#define BT_AFH_CH_CLASS_INT_MIN 0x0C80
|
||||
/// Maximum classification interval requested to slave devices (in slots) (4 secs)
|
||||
#define BT_AFH_CH_CLASS_INT_MAX 0x1900
|
||||
|
||||
/// AFH update period (in sec)
|
||||
#define BT_AFH_UPDATE_PERIOD 4
|
||||
|
||||
/// Maximum duration without receiving a packet before considering a channel quality unknown (in slots) (2 secs)
|
||||
#define BT_AFH_ASSESS_VALID_TO 0x1900
|
||||
|
||||
/// Maximum duration without receiving a packet before reintroducing a channel to the map (in slots) (20 secs)
|
||||
#define BT_AFH_REASSESS_TO 0x7D00
|
||||
|
||||
/// Maximum counter value for channel assessment
|
||||
#define BT_AFH_ASSESS_COUNT_MAX 4
|
||||
/// Counter threshold to consider a channel good
|
||||
#define BT_AFH_ASSESS_COUNT_THR_GOOD 2
|
||||
/// Counter threshold to consider a channel bad
|
||||
#define BT_AFH_ASSESS_COUNT_THR_BAD -2
|
||||
/// Minimum counter value for channel assessment
|
||||
#define BT_AFH_ASSESS_COUNT_MIN -4
|
||||
|
||||
/******************************************************************************************/
|
||||
/* -------------------------- CSB SETUP ----------------------------------------*/
|
||||
/******************************************************************************************/
|
||||
|
||||
/// Support of Connectionless Slave Broadcast
|
||||
#if defined (CFG_CSB)
|
||||
#define CSB_SUPPORT 1
|
||||
#else
|
||||
#define CSB_SUPPORT 0
|
||||
#endif // defined (CFG_CSB)
|
||||
|
||||
/******************************************************************************************/
|
||||
/* -------------------------- PCA SETUP ----------------------------------------*/
|
||||
/******************************************************************************************/
|
||||
|
||||
/// Support of Piconet Clock Adjust
|
||||
#if defined (CFG_PCA)
|
||||
#define PCA_SUPPORT 1
|
||||
#else
|
||||
#define PCA_SUPPORT 0
|
||||
#endif // defined (CFG_PCA)
|
||||
|
||||
/// PCA update period (in sec)
|
||||
#define BT_PCA_UPDATE_PERIOD 30
|
||||
|
||||
/// PCA request clk_adj_slots in addition to clk_adj_us: enable=1, disable=0
|
||||
#define BT_PCA_CLK_ADJ_SLOTS 0 // No mandate to request a clk_adj_slots currently - for test only
|
||||
|
||||
|
||||
/******************************************************************************************/
|
||||
/* ------------------------ CONNECTION HANDLE ----------------------------------------*/
|
||||
/******************************************************************************************/
|
||||
|
||||
/// Bit set for BT ACL connection handles
|
||||
#define BT_ACL_CONHDL_BIT (0x80)
|
||||
#define BT_ACL_CONHDL_MIN (BT_ACL_CONHDL_BIT)
|
||||
#define BT_ACL_CONHDL_MAX (BT_ACL_CONHDL_BIT + MAX_NB_ACTIVE_ACL - 1)
|
||||
|
||||
/// Bit set for BT SCO connection handles
|
||||
#define BT_SYNC_CONHDL_OFF (8)
|
||||
#define BT_SYNC_CONHDL_MSK (((1 << MAX_NB_SYNC) - 1) << BT_SYNC_CONHDL_OFF)
|
||||
#define BT_SYNC_CONHDL_BIT(sco_link_id) ((sco_link_id + 1) << BT_SYNC_CONHDL_OFF)
|
||||
#define BT_SYNC_CONHDL_LID(sco_conhdl) ((sco_conhdl >> BT_SYNC_CONHDL_OFF) - 1)
|
||||
#define BT_SYNC_CONHDL(link_id, sco_link_id) (BT_ACL_CONHDL_MIN + link_id + BT_SYNC_CONHDL_BIT(sco_link_id))
|
||||
|
||||
/// @} BT Stack Configuration
|
||||
/// @} ROOT
|
||||
|
||||
#endif //RWBT_CONFIG_H_
|
||||
Reference in New Issue
Block a user