hpw421初始版本

2026-06-06 16:49:48 +08:00
commit 2339bbfd1f
3283 changed files with 860261 additions and 0 deletions
@@ -0,0 +1,87 @@
+/*!
+ * \file      pwr_test.c
+ *
+ * \brief     Target pwr test implementation
+ *
+ * \copyright Revised BSD License, see section \ref LICENSE.
+ *
+ * \code
+ *
+ *            _  __ _       ________    _
+ *           | |/ /(_)___  / ____/ /_  (_)___
+ *           |   // / __ \/ /   / __ \/ / __ \
+ *          /   |/ / / / / /___/ / / / / /_/ /
+ *         /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
+ *                                   /_/
+ *           (C) 2022-2025 XinChip
+ *
+ * \endcode
+ *
+ * \author     ( XinChip ) Alex-J
+ *
+ * \author     ( XinChip )
+ */
+
+/*-----------------------------------------------------------------------------------
+                                       INCLUDE HEADE FILES
+ ------------------------------------------------------------------------------------*/
+#include "pwr_test.h"
+#include "xc60xx_pwr.h"
+
+/*------------------------------------------------------------------------------------
+                                            Macros
+ -------------------------------------------------------------------------------------*/
+
+/*------------------------------------------------------------------------------------
+                                         Global Variables
+ -------------------------------------------------------------------------------------*/
+
+/*------------------------------------------------------------------------------------
+                                            Functions
+ -------------------------------------------------------------------------------------*/
+/**
+ * @brief       pwr_test_demo
+ * @details
+ * @param       void
+ * @retval      void
+ */
+
+void pwr_test_demo() {
+  SPI_InitCfg_t spi_cfg = {0};
+  PWR_InitTypeDef PWR_InitStruct = {0};
+
+  spi_cfg.Mode = SPI_MODE_MASTER;
+  spi_cfg.DataSize = SSI_CTRL0_DFS_LEN_8BIT;
+  spi_cfg.Direction = SSI_CTRL0_TMOD_WR;
+  spi_cfg.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
+  spi_cfg.CLKPolarity = SSI_CTRL0_SCPOL_LOW;
+  spi_cfg.CLKPhase = SPI_CPHA_LEAD;
+  spi_cfg.FirstBit = SPI_FirstBit_MSB;
+
+  xc_spi_init(XC_SPI0, &spi_cfg);
+  SPI_Flash_PowerDown(XC_SPI0);
+
+  PWR_InitStruct.PWR_WakeITSrc = GPIO_IRQn_WAKE | RTC_IRQn_WAKE;
+  PWR_InitStruct.PWR_SleepMode = DEEP_SLEEP_MODE;
+
+  PWR_GPIO_SleepConfig(PWR_InitStruct.PWR_SleepMode);
+
+  if (PWR_InitStruct.PWR_SleepMode == LIGHT_SLEEP_MODE) {
+    PWR_GPIO_LightSleepWakeConfig(GPIO_3, RIS_EDGE_INT);
+    PWR_GPIO_LightSleepWakeConfig(GPIO_22, FAIL_EDGE_INT);
+  } else if (PWR_InitStruct.PWR_SleepMode == DEEP_SLEEP_MODE) {
+    // PWRKEY Initialization is required after deep sleep wakeup
+    PWR_PWRKEY_Init();
+    PWR_PWRKEY_DeepSleepWakeConfig(GPIO_22, DEEP_SLEEP_GPIO_WAKE_HIGH_LEVEL);
+    PWR_PWRKEY_DeepSleepWakeConfig(GPIO_7, DEEP_SLEEP_GPIO_WAKE_LOW_LEVEL);
+  }
+
+  PWR_SleepInit(&PWR_InitStruct);
+
+  while (1) {
+    Delay_Ms(100);
+    DEBUG("sleep\n");
+    PWR_CPU_SleepEnter(PWR_InitStruct.PWR_SleepMode);
+    DEBUG("wakeup\n");
+  }
+}