hpw421初始版本

2026-06-06 16:49:48 +08:00
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+/*!
+ * \file      pga_adc.h
+ *
+ * \brief     The head file of pga_adc.h
+ *
+ * \copyright Revised BSD License, see section \ref LICENSE.
+ *
+ * \code
+ *
+ *            _  __ _       ________    _     
+ *           | |/ /(_)___  / ____/ /_  (_)___ 
+ *           |   // / __ \/ /   / __ \/ / __ \
+ *          /   |/ / / / / /___/ / / / / /_/ /
+ *         /_/|_/_/_/ /_/\____/_/ /_/_/ .___/ 
+ *                                   /_/      
+ *           (C) 2022-2025 XinChip
+ *
+ * \endcode
+ *
+ * \author     ( XinChip ) Alex-J
+ *
+ * \author     ( XinChip )
+ */
+
+ /* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef        __XC_DRV_PGA_H_
+#define        __XC_DRV_PGA_H_
+
+/*-----------------------------------------------------------------------------------
+                                 INCLUDE HEADE FILES
+ ------------------------------------------------------------------------------------*/
+#include "xc6xxx.h"
+/*------------------------------------------------------------------------------------
+                                       Macros
+ -------------------------------------------------------------------------------------*/
+
+
+
+
+
+/*------------------------------------------------------------------------------------
+                                        TypeDef
+ -------------------------------------------------------------------------------------*/
+
+
+#define PGA_PDBIAS_EN 			0
+#define	PGA_PDBIAS_PD 			1
+
+#define PGA_ELECTRICITY_LEVEL0 		(0x07<<2)
+#define PGA_ELECTRICITY_LEVEL1 		(0x06<<2)
+#define PGA_ELECTRICITY_LEVEL2 		(0x05<<2)
+#define PGA_ELECTRICITY_LEVEL3 		(0x4<<2)
+#define PGA_ELECTRICITY_LEVEL4 		(0x3<<2)
+#define PGA_ELECTRICITY_LEVEL5 		(0x2<<2)
+#define PGA_ELECTRICITY_LEVEL6 		(0x1<<2)
+#define PGA_ELECTRICITY_LEVEL7 		(0x0<<2)  /* max electricity*/
+#define PGA_SINGLE 					(0x0<<1)
+#define	PGA_DIFFERENCE 				(0x1<<1)
+
+
+#define CMP_CTRL_VOLTAGE_LEVEL0 			(0x00) 	/* 0MV */
+#define CMP_CTRL_VOLTAGE_LEVEL1 			(0x01)	/* 12MV */
+#define CMP_CTRL_VOLTAGE_LEVEL2 			(0x02)	/* 23MV */
+#define CMP_CTRL_VOLTAGE_LEVEL3 			(0x03) /* max electricity  36MV*/
+
+#define CMP_IBC_ELECTRICITY_LEVEL0 			(0x03) 	/* 1.43ua */
+#define CMP_IBC_ELECTRICITY_LEVEL1 			(0x02)	/* 2ua */
+#define CMP_IBC_ELECTRICITY_LEVEL2 			(0x01)	/* 3.33ua */
+#define CMP_IBC_ELECTRICITY_LEVEL3 			(0x00) /* max electricity  10ua*/
+
+#define TEMP_SENSOR_ENABLE 						1
+#define	TEMP_SENSOR_DISABLE 					0
+
+#define PGA_OPA_CTRL_SIGNAL_PD 						(0x1<<2)
+#define	PGA_OPA_CTRL_SIGNAL_EN 						(0x0<<2)
+#define PGA_OPA_CTRL_INPUT_SWAP_ENABLE 				(0x1<<1)
+#define	PGA_OPA_CTRL_INPUT_SWAP_DISABLE 			(0x0<<2)
+#define PGA_OPA_CTRL_ELECTRICITY_MAX 				(0x0<<0)
+#define	PGA_OPA_CTRL_ELECTRICITY_MIN 				(0x1<<0)
+
+#define PDOPA_SIGNAL_PD 					1
+#define	PDOPA_SIGNAL_EN 					0
+
+
+
+
+ 
+typedef enum
+{
+    PGA_MIC_GAIN2_DISABLE = 0,
+    PGA_MIC_GAIN2_ENABLE = 1,
+} PGA_MIC_GAIN2TypeDef_t;
+
+
+/* 0 - 22.3db */
+typedef enum
+{
+    PGA_VOLR2_GAIN_0_0DB = 0,
+	PGA_VOLR2_GAIN_1_6DB = 1,
+    PGA_VOLR2_GAIN_3_2DB = 2,
+    PGA_VOLR2_GAIN_4_8DB = 3,
+	PGA_VOLR2_GAIN_6_4DB = 4,
+    PGA_VOLR2_GAIN_8_0DB = 5,
+    PGA_VOLR2_GAIN_9_6DB = 6,
+	PGA_VOLR2_GAIN_11_2DB = 7,
+    PGA_VOLR2_GAIN_12_8DB = 8,
+    PGA_VOLR2_GAIN_14_4DB = 9,
+	PGA_VOLR2_GAIN_16_0DB = 10,
+    PGA_VOLR2_GAIN_17_6DB = 11,
+    PGA_VOLR2_GAIN_19_2DB = 12,
+	PGA_VOLR2_GAIN_20_8DB = 13,
+    PGA_VOLR2_GAIN_22_3DB = 14,
+} PGA_VOLR2TypeDef_t;
+
+
+
+/**
+ * @brief CPR_OPA_CTRL_REG register definition
+ * <pre>
+ *   Bits           Field Name   Reset Value
+ *  -----   ------------------   -----------
+ *     28             micgain2   0
+ *  27:24                volr2   0x0
+ *  23:19               resadj   0x0
+ *  18:17             cmp_ctrl   0x0
+ *  16:15              cmp_ibc   0x0
+ *     14            bg5v_ctrl   0
+ *     13       en_temp_sensor   0
+ *     12               pdbias   0
+ *  11:08                 volr   0x0
+ *  07:05             opa_ctrl   0x0
+ *     04                pdopa   0
+ *  03:00              micgain   0x0
+ * </pre>
+ */
+typedef struct
+{
+    PGA_MIC_GAIN2TypeDef_t gain2;
+    PGA_VOLR2TypeDef_t volr2;
+    uint8_t resadj;
+	uint8_t cmp_ctrl;
+	uint8_t cmp_ibc;
+	uint8_t bg5v_ctrl;
+	uint8_t en_temp_sensor;
+    uint8_t bias;
+    uint8_t volr;
+	uint8_t opa_ctrl;
+    uint8_t pdopa;
+    uint8_t micgain;
+} PGA_InitCfg_t;
+
+
+
+/*------------------------------------------------------------------------------------
+                                      Global Variables
+ -------------------------------------------------------------------------------------*/
+
+
+/*------------------------------------------------------------------------------------
+                                    Exported Functions
+ -------------------------------------------------------------------------------------*/
+void xc_pga_init(PGA_InitCfg_t *pga_cfg);
+void xc_pga_micgain_2_set(uint8_t micgain2);
+void xc_pga_volr2_set(uint8_t volr2);
+void xc_pga_resadj_set(uint8_t resadj);
+void xc_pga_cmp_ctrl_set(uint8_t cmp_ctrl);
+void xc_pga_cmp_ibc_set(uint8_t cmp_ibc);
+void xc_pga_temp_sensor_enable(uint8_t en_temp_sensor);
+void xc_pga_volr_set(uint8_t volr);
+void xc_pga_pdbias_set(uint8_t pdbias);
+void xc_pga_opa_ctrl_set(uint8_t opa_ctrl);
+void xc_pga_pdopa_set(uint8_t pdopa);
+void xc_pga_micgain_set(uint8_t micgain);
+
+#endif  //__XC_DRV_PGA_H_