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hpw421初始版本

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xushaoxiang
2026-06-06 16:49:48 +08:00
commit 2339bbfd1f
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project/example/driver/pwm/app/Startup/system_it_xinc.c
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/*!
* \file system_it_xinc.c
*
* \brief Target system interruption implementation
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include "system_it_xinc.h"
/*------------------------------------------------------------------------------------
Func Prototype
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Functions
-------------------------------------------------------------------------------------*/
/**
****************************************************************************************
* @brief This function handles NMI exception.
*
* @param[in]
* @param[in]
****************************************************************************************
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn */
DEBUG("%s\n", __func__);
/* USER CODE END NonMaskableInt_IRQn */
while (1)
{
}
}
/**
****************************************************************************************
* @brief This function handles Hard Fault exception.
*
* @param[in]
* @param[in]
****************************************************************************************
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn */
DEBUG("%s\n", __func__);
/* USER CODE END HardFault_IRQn */
while (1)
{
}
}
/**
****************************************************************************************
* @brief This function handles Memory Manage exception.
*
* @param[in]
* @param[in]
****************************************************************************************
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN */
DEBUG("%s\n", __func__);
/* USER CODE END */
while (1)
{
}
}
/**
****************************************************************************************
* @brief This function handles Bus Fault exception.
*
* @param[in]
* @param[in]
****************************************************************************************
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN */
DEBUG("%s\n", __func__);
/* USER CODE END */
while (1)
{
}
}
/**
****************************************************************************************
* @brief This function handles Usage Fault exception.
*
* @param[in]
* @param[in]
****************************************************************************************
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN */
DEBUG("%s\n", __func__);
/* USER CODE END */
while (1)
{
}
}
/**
****************************************************************************************
* @brief This function handles SVCall exception.
*
* @param[in]
* @param[in]
****************************************************************************************
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn */
DEBUG("%s\n", __func__);
/* USER CODE END SVCall_IRQn */
while (1)
{
}
}
/**
****************************************************************************************
* @brief This function handles Debug Monitor exception.
*
* @param[in]
* @param[in]
****************************************************************************************
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN */
DEBUG("%s\n", __func__);
/* USER CODE END */
while (1)
{
}
}
/**
****************************************************************************************
* @brief This function handles PendSVC exception.
*
* @param[in]
* @param[in]
****************************************************************************************
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn */
DEBUG("%s\n", __func__);
/* USER CODE END PendSV_IRQn */
while (1)
{
}
}
/****************************** Hard Fault Handler Functions *******************************/
/*------------------------------------------------------------------------------------
Private Functions
-------------------------------------------------------------------------------------*/
void HardFault_Handler_c(unsigned int * HardFault_args)
{
/*栈帧里面内容：*/
unsigned int stack_r0; //压栈的 R0
unsigned int stack_r1; //压栈的 R1
unsigned int stack_r2; //压栈的 R2
unsigned int stack_r3; //压栈的 R3
unsigned int stack_r12; //压栈的 R12
unsigned int stack_lr; //压栈的 lr
unsigned int stack_pc; //压栈的 pc
unsigned int stack_psr; //压栈的 psr
stack_r0 = ((unsigned int)HardFault_args[0]);
stack_r1 = ((unsigned int)HardFault_args[1]);
stack_r2 = ((unsigned int)HardFault_args[2]);
stack_r3 = ((unsigned int)HardFault_args[3]);
stack_r12 = ((unsigned int)HardFault_args[4]);
stack_lr = ((unsigned int)HardFault_args[5]);
stack_pc = ((unsigned int)HardFault_args[6]);
stack_psr = ((unsigned int)HardFault_args[7]);
DEBUG("----%s----\n", __func__);
DEBUG("R0=%x\n",stack_r0);
DEBUG("R1=%x\n",stack_r1);
DEBUG("R2=%x\n",stack_r2);
DEBUG("R3=%x\n",stack_r3);
DEBUG("R12=%x\n",stack_r12);
DEBUG("LR[R14]=%x\n",stack_lr);
DEBUG("PC[R15]=%x\n",stack_pc);
DEBUG("PSR=%x\n",stack_psr);
DEBUG("SCB_SHCSR=%x\n",SCB->SHCSR);
DEBUG("---------------------------\n");
while(1);
}
/*******************************************************************************************/
project/example/driver/pwm/app/Startup/system_it_xinc.h
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/*!
* \file system_it_xinc.h
*
* \brief The header of system_it_xinc.c
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __SYSTEM_IT_XINC_H__
#define __SYSTEM_IT_XINC_H__
#ifdef __cplusplus
extern "C" {
#endif
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include "xc6xxx.h"
/*------------------------------------------------------------------------------------
Exported Functions
-------------------------------------------------------------------------------------*/
void NMI_Handler( void );
void HardFault_Handler( void );
void MemManage_Handler( void );
void BusFault_Handler( void );
void UsageFault_Handler( void );
void SVC_Handler( void );
void DebugMon_Handler( void );
void PendSV_Handler( void );
void HardFault_Handler_c(unsigned int * HardFault_args);
#ifdef __cplusplus
}
#endif
#endif /* __SYSTEM_IT_XINC_H__ */
project/example/driver/pwm/app/Startup/system_xinc.c
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/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system
*
*/
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include <stdio.h>
#include "xc6xxx.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
#define __DEBUG_OUT_PORT 0
/*------------------------------------------------------------------------------------
Functions
-------------------------------------------------------------------------------------*/
#define VECTOR_NUM 48
void set_vector(void)
{
#if (USE_XIP == 1)
__disable_irq();
for (uint32_t i = 0, *Pvector = (uint32_t *)(0x11001000 + 0),
*_vector_table = (uint32_t *)(0x10000000);
i < VECTOR_NUM; i++) // copy vertor table
{
_vector_table[i] = *Pvector++;
}
*((volatile unsigned int *)(0x4000013C)) =
0x10000001; // inter vertor table remap
__enable_irq();
#endif
}
static void WDT_ResetInit(void)
{
cpr_ctlapbclken_grctl__wdt_pclk_en__setf(ENABLE);
cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_ENABLE);
cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_DISABLE);
cpr_rstctl_wdtrst_mask_set(
(WDT_SYS_RSTN_MASK_DISABLE | WDT_M0_RSTN_MASK_ENABLE));
cpr_lp_ctl__ctl_wdt_tclk_en__setf(ENABLE);
wdt_cr__wdt_en__setf(DISABLE);
}
void SystemInit(void)
{
WDT_ResetInit();
#if (USE_XIP == 1)
set_vector();
#endif
}
__RAM_CODE int sendchar(int c)
{
unsigned int status;
#if (__DEBUG_OUT_PORT == 1)
for (;;) {
status = (*((volatile unsigned *)(0x40011000 + 0x14)));
status &= 0x20;
if (status == 0x20)
break;
}
(*((volatile unsigned *)(0x40011000 + 0x00))) = c;
return (1);
#else
for (;;) {
status = (*((volatile unsigned *)(0x40010000 + 0x14)));
status &= 0x20;
if (status == 0x20)
break;
}
(*((volatile unsigned *)(0x40010000 + 0x00))) = c;
return (1);
#endif
}
struct __FILE
{
int handle; /* Add whatever you need here */
};
FILE __stdout;
__RAM_CODE int fputc(int ch, FILE *f) { return (sendchar(ch)); }
int ferror(FILE *f)
{
/* Your implementation of ferror */
return EOF;
}
void _ttywrch(int ch) { sendchar(ch); }
void _sys_exit(int return_code)
{
label:
goto label; /* endless loop */
}
project/example/driver/pwm/app/Startup/xc60xx/startup_xinc.s
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;/*****************************************************************************
; * @file: startup_xinc.s
; * @purpose: CMSIS Cortex-M0 Core Device Startup File for the
; * Device xinc.
; *****************************************************************************/
Stack_Size EQU 0x00001000
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
Heap_Size EQU 0x00000000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
; ToDo: Add here the vectors for the device specific external interrupts handler
DCD BLE_Handler ; 0
DCD DMA_Handler ; 1
DCD CPR_Handler ; 2
DCD GPIO_Handler ; 3
DCD RTC_Handler ; 4
DCD TIMER0_Handler ; 5
DCD TIMER1_Handler ; 6
DCD TIMER2_Handler ; 7
DCD TIMER3_Handler ; 8
DCD WDT_Handler ; 9
DCD I2C_Handler ; 10
DCD UART0_Handler ; 11
DCD UART1_Handler ; 12
DCD SPI0_Handler ; 13
DCD SPI1_Handler ; 14
DCD 0 ; 15
DCD 0 ; 16
DCD GADC_Handler ; 17
DCD PWM_Handler ; 18
DCD AES_Handler ; 19
DCD USB_Handler ; 20
DCD AUDIO_Handler ; 21
DCD RF24G_Handler ; 22
DCD SPI2_Handler ; 23
DCD 0 ; 24
DCD UART2_Handler ; 25
DCD I2S_Handler ; 26
DCD AOTIMER0_Handler ; 27
DCD AOTIMER1_Handler ; 28
DCD CMP_Handler ; 29
DCD FMC_Handler ; 30
DCD CAN_Handler ; 31
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR r0, =0x4000013C ; remap
LDR r1, =0x10000001
STR r1, [r0]
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
IMPORT HardFault_Handler_c ;函数声明
movs r0, #4 ;判断主栈指针还是进程栈指针
mov r1, lr
tst r0, r1
beq hf_used_msp ;如果是主栈指针
mrs r0, psp ;否则是进程栈指针,把进程栈指针地址付给 R0
ldr r1, =HardFault_Handler_c ;跳转到 HardFault 中断程序
bx r1
hf_used_msp
mrs r0, msp ;把主栈指针地址赋给 R0
ldr r1, =HardFault_Handler_c
bx r1
;EXPORT HardFault_Handler [WEAK]
;B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT BLE_Handler [WEAK]
EXPORT DMA_Handler [WEAK]
EXPORT CPR_Handler [WEAK]
EXPORT GPIO_Handler [WEAK]
EXPORT RTC_Handler [WEAK]
EXPORT TIMER0_Handler [WEAK]
EXPORT TIMER1_Handler [WEAK]
EXPORT TIMER2_Handler [WEAK]
EXPORT TIMER3_Handler [WEAK]
EXPORT WDT_Handler [WEAK]
EXPORT I2C_Handler [WEAK]
EXPORT UART0_Handler [WEAK]
EXPORT UART1_Handler [WEAK]
EXPORT SPI0_Handler [WEAK]
EXPORT SPI1_Handler [WEAK]
;EXPORT KBS_Handler [WEAK]
;EXPORT QDEC_Handler [WEAK]
EXPORT GADC_Handler [WEAK]
EXPORT PWM_Handler [WEAK]
EXPORT AES_Handler [WEAK]
EXPORT PendSV_Handler [WEAK]
EXPORT SysTick_Handler [WEAK]
EXPORT USB_Handler [WEAK];20
EXPORT AUDIO_Handler [WEAK];21
EXPORT RF24G_Handler [WEAK];22
EXPORT SPI2_Handler [WEAK];23
;EXPORT MPU_Handler [WEAK];24
EXPORT UART2_Handler [WEAK];25
EXPORT I2S_Handler [WEAK];26
EXPORT AOTIMER0_Handler [WEAK];27
EXPORT AOTIMER1_Handler [WEAK];28
EXPORT CMP_Handler [WEAK];29
EXPORT FMC_Handler [WEAK];30
EXPORT CAN_Handler [WEAK];31
PendSV_Handler
SysTick_Handler
BLE_Handler
RF24G_Handler
DMA_Handler
CPR_Handler
GPIO_Handler
RTC_Handler
TIMER0_Handler
TIMER1_Handler
TIMER2_Handler
TIMER3_Handler
WDT_Handler
I2C_Handler
I2S_Handler
UART0_Handler
UART1_Handler
UART2_Handler
SPI0_Handler
SPI1_Handler
SPI2_Handler
;KBS_Handler
;QDEC_Handler
GADC_Handler
PWM_Handler
AUDIO_Handler
;SIM_Handler
AES_Handler
AOTIMER0_Handler
AOTIMER1_Handler
CMP_Handler
FMC_Handler
CAN_Handler
USB_Handler
B .
ENDP
ALIGN
; User Initial Stack & Heap
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, = (Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
END
project/example/driver/pwm/app/api/main.h
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/*!
* \file main.h
*
* \brief The head file of main.c
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H__
#define __MAIN_H__
#ifdef __cplusplus
extern "C" {
#endif
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include <stdio.h>
#include <string.h>
#include "xc6xxx.h"
#include "pwm.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
TypeDef
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Exported Functions
-------------------------------------------------------------------------------------*/
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H__ */
project/example/driver/pwm/app/api/pwm.h
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/*!
* \file pwm_test.h
*
* \brief The head file of pwm_test.c
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __PWM_TEST_H__
#define __PWM_TEST_H__
#ifdef __cplusplus
extern "C" {
#endif
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include <stdio.h>
#include <string.h>
#include <stdint.h>
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
#define DEVIATION_FREQ 10
#define DEVIATION_DUTYCYCLE 10
#define CAPTURE_DATA_MAX 101
#define CAPTURE_VALID_POS 4
/*------------------------------------------------------------------------------------
TypeDef
-------------------------------------------------------------------------------------*/
typedef enum
{
PWM_CAP_IDLE = 0,
PWM_CAP_FREQ,
PWM_CAP_DUTYCYCLE,
PWM_CAP_RIGHT,
PWM_CAP_ERROR,
} PWM_CAP_STA_TypeDef;
typedef enum
{
PWM_BRK_IDLE = 0,
PWM_BRK_START,
PWM_BRK_STOP,
} PWM_BRK_STA_TypeDef;
typedef enum
{
PWM_BRK_CAP_VALID,
PWM_BRK_CAP_RECOVERY,
PWM_BRK_CAP_ERROR,
} PWM_BRK_CAP_STA_TypeDef;
typedef struct pwm_ch_cap_freq
{
uint16_t ch0_cap_freq;
uint16_t ch1_cap_freq;
uint16_t ch2_cap_freq;
} pwm_ch_cap_freq_t;
typedef struct pwm_ch_cap_dutycycle
{
uint16_t ch0_cap_dutycycle;
uint16_t ch1_cap_dutycycle;
uint16_t ch2_cap_dutycycle;
} pwm_ch_cap_dutycycle_t;
typedef struct pwm_ch_cap_type
{
uint8_t ch0_cap_type;
uint8_t ch1_cap_type;
uint8_t ch2_cap_type;
} pwm_ch_cap_type_t;
typedef enum
{
PWM_CAP_TYPE_FREQ,
PWM_CAP_TYPE_DUTYCYCLE,
} PWM_CAP_TYPE_TypeDef;
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Exported Functions
-------------------------------------------------------------------------------------*/
void pwm_demo(void);
uint32_t find_duplicate_data(uint16_t *buff, uint16_t size);
#ifdef __cplusplus
}
#endif
#endif /* __PWM_TEST_H__ */
project/example/driver/pwm/app/src/main.c
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/*!
* \file main.c
*
* \brief Target main implementation
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include "main.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Func Prototype
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Functions
-------------------------------------------------------------------------------------*/
void clock_init(void)
{
CLOCK_InitCfg_t clock_cfg;
clock_cfg.hfclk_src = CLOCK_HFCLK_SRC_XTAL;
clock_cfg.hfclk_in = CLOCK_HFCLK_IN_32M;
clock_cfg.lfclk_src = CLOCK_LFCLK_SRC_RC;
if(clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_XTAL) {
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32768;
} else if(clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_RC) {
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32K;
}
xc_clock_init_cfg(&clock_cfg);
SysTick_Config(xc_clock_hfclk_in_get( ) / 100);
SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
}
void app_uart_init(void)
{
GPIO_InitCfg_t gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux0;
gpio_cfg.Pull = GPIO_PULLUP;
gpio_cfg.Int = NOT_INT;
gpio_cfg.FunSel = UART0_TX;
gpio_cfg.Pin = GPIO_18;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
xc_gpio_init(&gpio_cfg);
gpio_cfg.FunSel = UART0_RX;
gpio_cfg.Pin = GPIO_19;
gpio_cfg.Dir = GPIO_DIR_INPUT;
xc_gpio_init(&gpio_cfg);
UART_InitCfg_t uart_cfg = {0};
uart_cfg.Parity = UART_PARITY_DISABLE;
uart_cfg.StopBits = UART_STOP_1_BITS;
uart_cfg.WordLength = UART_DATA_8_BITS;
uart_cfg.BaudRate = UART_BAUDRATE_115200;
uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE;
xc_uart_init(UART0_IDX, &uart_cfg);
}
int main(void)
{
// Clock Initialization
clock_init();
app_uart_init();
DEBUG("__START__\n");
/* pwm demo */
pwm_demo( );
while(1)
{
/* main loop */
;
}
}
project/example/driver/pwm/app/src/pwm.c
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/*!
* \file pwm.c
*
* \brief Target pwm implementation
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/*------------------------------------------------------------------------------------
INCLUDE HEADE FILES
--------------------------------------------------------------------------------------*/
#include "pwm.h"
#include "xc_drv_pwm.h"
// #include "xc_drv_adc.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
TypeDef
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Local Variables
-------------------------------------------------------------------------------------*/
uint16_t ch0_capture_data[CAPTURE_DATA_MAX];
uint16_t ch1_capture_data[CAPTURE_DATA_MAX];
uint16_t ch2_capture_data[CAPTURE_DATA_MAX];
PWM_CAP_STA_TypeDef pwm_cap_state = PWM_CAP_IDLE;
PWM_BRK_STA_TypeDef pwm_brk_state = PWM_BRK_IDLE;
PWM_BRK_CAP_STA_TypeDef pwm_brk_cap_state = PWM_BRK_CAP_VALID;
pwm_ch_cap_dutycycle_t pwm_ch_cap_dutycycle;
pwm_ch_cap_freq_t pwm_ch_cap_freq;
pwm_ch_cap_type_t pwm_ch_cap_type;
/*------------------------------------------------------------------------------------
Func Prototype
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Functions
-------------------------------------------------------------------------------------*/
/**
* @brief pwm_test_demo
* @details
* @param void
* @retval void
*/
//void pwm_output_demo()
//{
// DEBUG("PWM_OUTPUT_DEMO\r");
// // PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
// // CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
// // EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
//// PWM_InitCfg_t pwm_cfg;
//// pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
//// pwm_cfg.DutyCycleAcc = 8000;
//// pwm_cfg.DutyCycle = 1000;
//// pwm_cfg.Period = 0;
//// pwm_cfg.InvertDelay = 0x17;
//// pwm_cfg.InvertEnable = true;
//// pwm_cfg.OutputInvertPin = GPIO_1;
//// pwm_cfg.OutputPin = GPIO_2;
//// pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
//// pwm_cfg.SrcEnable = PWM_EN_SEL_ALL;
//// xc_pwm_init(PWM0_IDX, &pwm_cfg);
//
//
// PWM_InitCfg_t pwm_cfg;
// pwm_cfg.Mode = 0x03UL;
// pwm_cfg.DutyCycleAcc = 255;
// pwm_cfg.DutyCycle = 200;
// pwm_cfg.Period = 300;
// pwm_cfg.InvertDelay = 0x3f;
// pwm_cfg.InvertEnable =true;
// pwm_cfg.OutputInvertPin = GPIO_2;
// pwm_cfg.OutputPin = GPIO_1;
// pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
// pwm_cfg.SrcEnable = PWM_EN_SEL_ALL;
// xc_pwm_init(PWM0_IDX, &pwm_cfg);
// xc_pwm_start_all();
//}
void pwm_output_demo()
{
PWM_InitCfg_t pwm_cfg;
pwm_cfg.Mode = 0x03UL;
pwm_cfg.DutyCycleAcc = 255;
pwm_cfg.DutyCycle = 250;
pwm_cfg.Period = 300;
pwm_cfg.InvertDelay = 0x3f;
pwm_cfg.InvertEnable = true; //false;
pwm_cfg.OutputInvertPin = GPIO_2;
pwm_cfg.OutputPin = GPIO_1;
pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
pwm_cfg.SrcEnable = PWM_EN_SEL_ALL;
xc_pwm_init(PWM0_IDX, &pwm_cfg);
xc_pwm_start_all();
}
void pwm_brake_demo()
{
DEBUG("PWM_BRAKE_DEMO\r");
// PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
// CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
// EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
PWM_InitCfg_t pwm_cfg;
pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
pwm_cfg.DutyCycleAcc = 60000;
pwm_cfg.DutyCycle = 30000;
pwm_cfg.Period = 99;
pwm_cfg.InvertDelay = 0;
pwm_cfg.InvertEnable = false;
pwm_cfg.OutputInvertPin = GPIO_2;
pwm_cfg.OutputPin = GPIO_1;
pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
pwm_cfg.SrcEnable = PWM_EN_SEL_SELF;
xc_pwm_init(PWM0_IDX, &pwm_cfg);
xc_pwm_start(PWM0_IDX);
xc_gpio_fun_sel(PWM_SIGNAL_BRK0_GPIO4, GPIO_Dx);
xc_gpio_mux_ctl(PWM_SIGNAL_BRK0_GPIO4, GPIO_Mux1);
xc_gpio_pull_config(PWM_SIGNAL_BRK0_GPIO4, GPIO_PULLUP);
xc_gpio_fun_sel(PWM_SIGNAL_BRK1_GPIO5, GPIO_Dx);
xc_gpio_mux_ctl(PWM_SIGNAL_BRK1_GPIO5, GPIO_Mux1);
xc_gpio_pull_config(PWM_SIGNAL_BRK1_GPIO5, GPIO_PULLUP);
xc_gpio_fun_sel(PWM_SIGNAL_BRK2_GPIO6, GPIO_Dx);
xc_gpio_mux_ctl(PWM_SIGNAL_BRK2_GPIO6, GPIO_Mux1);
cpr_opa_ctrl_reg__pdbias__setf(0);
xc_gpio_pull_config(PWM_SIGNAL_BRK2_GPIO6, GPIO_PULLUP);
xc_pwm_brake_enable(PWM0_IDX);
xc_pwm_brake_signal_mask_set(PWM_BRK0_MASK_DISABLE | PWM_BRK1_MASK_DISABLE | PWM_BRK2_MASK_DISABLE);
xc_pwm_brake_signal_trigger_level_set(PWM_BRK0_LOW_LEVEL | PWM_BRK1_LOW_LEVEL | PWM_BRK2_LOW_LEVEL);
xc_pwm_brake_recovery_mode_set(PWM_BRK_MODE_SOFTWARE);
xc_pwm_brake_debounce_set(PWM_BRK_DBC_EN_ENABLE, PWM_BRK_DBC_STEP2);
while (1) {
if (xc_pwm_brake_recovery_mode_get() & PWM_BRK_MODE_SOFTWARE) {
if ((xc_pwm_brake_signal_valid_get() | PWM_BRK_SYNC_INVALID) == PWM_BRK_SYNC_INVALID) {
xc_pwm_brake_clear();
}
}
}
}
void pwm_capture_demo()
{
DEBUG("PWM_CAPTURE_DEMO\r");
// PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
// CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
// EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
PWM_InitCfg_t pwm_cfg;
pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
pwm_cfg.DutyCycleAcc = 1000;
pwm_cfg.DutyCycle = 700;
pwm_cfg.Period = 0;
pwm_cfg.InvertDelay = 0;
pwm_cfg.InvertEnable = false;
pwm_cfg.OutputInvertPin = GPIO_2;
pwm_cfg.OutputPin = GPIO_1;
pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
pwm_cfg.SrcEnable = PWM_EN_SEL_SELF;
xc_pwm_init(PWM0_IDX, &pwm_cfg);
xc_pwm_start(PWM0_IDX);
// Set capture pin
xc_gpio_fun_sel(PWM_SIGNAL_CAPTURE0_GPIO3, GPIO_Dx);
xc_gpio_mux_ctl(PWM_SIGNAL_CAPTURE0_GPIO3, GPIO_Mux1);
xc_gpio_fun_sel(PWM_SIGNAL_CAPTURE1_GPIO8, GPIO_Dx);
xc_gpio_mux_ctl(PWM_SIGNAL_CAPTURE1_GPIO8, GPIO_Mux1);
xc_gpio_fun_sel(PWM_SIGNAL_CAPTURE2_GPIO9, GPIO_Dx);
xc_gpio_mux_ctl(PWM_SIGNAL_CAPTURE2_GPIO9, GPIO_Mux1);
// Set capture freq
pwm_ch_cap_freq.ch0_cap_freq = 1000;
pwm_ch_cap_freq.ch1_cap_freq = 2000;
pwm_ch_cap_freq.ch2_cap_freq = 8000;
// Set capture duty cycle
pwm_ch_cap_dutycycle.ch0_cap_dutycycle = 50;
pwm_ch_cap_dutycycle.ch1_cap_dutycycle = 60;
pwm_ch_cap_dutycycle.ch2_cap_dutycycle = 70;
// Set capture type
pwm_ch_cap_type.ch0_cap_type = PWM_CAP_TYPE_FREQ;
pwm_ch_cap_type.ch1_cap_type = PWM_CAP_TYPE_FREQ;
pwm_ch_cap_type.ch2_cap_type = PWM_CAP_TYPE_FREQ;
// capture ch0 set
xc_pwm_capture_counter_enable(PWM_IC_CH0);
xc_pwm_capture_psc_set(PWM_IC_CH0, PWM_CAPTURE_PSC_1);
if (pwm_ch_cap_type.ch0_cap_type == PWM_CAP_TYPE_FREQ) {
xc_pwm_capture_edge_set(PWM_IC_CH0, PWM_CAPTURE_MODE_RISE);
} else if (pwm_ch_cap_type.ch0_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
xc_pwm_capture_edge_set(PWM_IC_CH0, PWM_CAPTURE_MODE_BOTH);
}
xc_pwm_capture_debounce_enable(PWM_IC_CH0, PWM_CAPTURE_DBC_STEP1);
xc_pwm_capture_signal_set(PWM_IC_CH0, PWM_ICSIG_CAPTURE0);
xc_pwm_capture_enable_it(PWM_IC_CH0);
xc_pwm_capture_enable(PWM_IC_CH0);
// capture ch1 set
xc_pwm_capture_counter_enable(PWM_IC_CH1);
xc_pwm_capture_psc_set(PWM_IC_CH1, PWM_CAPTURE_PSC_1);
if (pwm_ch_cap_type.ch1_cap_type == PWM_CAP_TYPE_FREQ) {
xc_pwm_capture_edge_set(PWM_IC_CH1, PWM_CAPTURE_MODE_RISE);
} else if (pwm_ch_cap_type.ch1_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
xc_pwm_capture_edge_set(PWM_IC_CH1, PWM_CAPTURE_MODE_BOTH);
}
xc_pwm_capture_debounce_enable(PWM_IC_CH1, PWM_CAPTURE_DBC_STEP1);
xc_pwm_capture_signal_set(PWM_IC_CH1, PWM_ICSIG_CAPTURE1);
xc_pwm_capture_enable_it(PWM_IC_CH1);
xc_pwm_capture_enable(PWM_IC_CH1);
// capture ch2 set
xc_pwm_capture_counter_enable(PWM_IC_CH2);
xc_pwm_capture_psc_set(PWM_IC_CH2, PWM_CAPTURE_PSC_1);
if (pwm_ch_cap_type.ch2_cap_type == PWM_CAP_TYPE_FREQ) {
xc_pwm_capture_edge_set(PWM_IC_CH2, PWM_CAPTURE_MODE_RISE);
} else if (pwm_ch_cap_type.ch2_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
xc_pwm_capture_edge_set(PWM_IC_CH2, PWM_CAPTURE_MODE_BOTH);
}
xc_pwm_capture_debounce_enable(PWM_IC_CH2, PWM_CAPTURE_DBC_STEP1);
xc_pwm_capture_signal_set(PWM_IC_CH2, PWM_ICSIG_CAPTURE2);
xc_pwm_capture_enable_it(PWM_IC_CH2);
xc_pwm_capture_enable(PWM_IC_CH2);
NVIC_EnableIRQ(PWM_IRQn);
}
void pwm_enable_adc_demo(void)
{
DEBUG("PWM_ENABLE_ADC_DEMO\r");
ADC_InitCfg_t adc_cfg;
uint16_t adc_val, integer, decimal;
// pwm 使能后触发 adc中断
// PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
// CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
// EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
PWM_InitCfg_t pwm_cfg;
pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
pwm_cfg.DutyCycleAcc = 60000;
pwm_cfg.DutyCycle = 30000;
pwm_cfg.Period = 99;
pwm_cfg.InvertDelay = 0;
pwm_cfg.InvertEnable = false;
pwm_cfg.OutputInvertPin = GPIO_2;
pwm_cfg.OutputPin = GPIO_1;
pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
pwm_cfg.SrcEnable = PWM_EN_SEL_SELF;
xc_pwm_init(PWM0_IDX, &pwm_cfg);
xc_pwm_start(PWM0_IDX);
adc_cfg.Freq = ADC_FREQ_2M;
adc_cfg.RefVol = ADC_REF_VOL_3_3V;
adc_cfg.SampEdge = ADC_SAMPEDGE_RISE;
adc_cfg.ExtDataMode = ADC_EXT_DATA_MODE_32BIT;
adc_cfg.ExtEdgeSel = ADC_EXT_EDGE_SEL_EXTERN_RISE;
adc_cfg.ExtSampleNum = ADC_EXT_SAMPLE_NUM_8;
adc_cfg.ExtTriggerSel = ADC_EXT_TRIGGER_SEL_PWM0;
xc_adc_init(&adc_cfg);
adc_chan_ctl__select_chan__setf(ADC_CH6_PIN4);
xc_adc_channel_gpio_config(ADC_CH6_PIN4);
xc_adc_fifo_req_len_set(ADC_FIFO_CTL_READ_REQ_THRESH_LEN_8);
xc_adc_fifo_flush();
xc_adc_it_set(adc_int_get());
xc_adc_enable_it(ADC_INT_FIFO_ERROR_INT_SET | ADC_INT_READ_REQ_INT_SET);
xc_adc_enable();
NVIC_EnableIRQ(GADC_IRQn);
while (1) {
adc_val = xc_adc_it_collectval_get();
if (adc_cfg.RefVol == ADC_REF_VOL_3_3V) {
integer = ((adc_val) * 3.3 * 100) / (1.0 * 4096) / 100;
decimal = ((uint32_t)((adc_val * 3.3 * 100) / 4096) % 100);
DEBUG("3.3v ref adc_vol=%d.%d ,adc_val=%d\n", integer, decimal, adc_val);
} else if (adc_cfg.RefVol == ADC_REF_VOL_2_48V) {
integer = ((adc_val) * 2.33 * 100) / (1.0 * 4096) / 100;
decimal = ((uint32_t)((adc_val * 2.33 * 100) / 4096) % 100);
DEBUG("2.33v ref adc_vol=%d.%d ,adc_val=%d\n", integer, decimal, adc_val);
}
delay_ms(1000);
}
}
void pwm_lowpower_demo(void)
{
xc_fmc_spi_init_oprt();
xc_pwr_gpio_sleep_config();
DEBUG("PWM_LOWPOWER_DEMO\r");
// PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
// CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
// EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
PWM_InitCfg_t pwm_cfg;
pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
pwm_cfg.DutyCycleAcc = 1000;
pwm_cfg.DutyCycle = 500;
pwm_cfg.Period = 0;
pwm_cfg.InvertDelay = 0;
pwm_cfg.InvertEnable = false;
pwm_cfg.OutputInvertPin = GPIO_2;
pwm_cfg.OutputPin = GPIO_1;
pwm_cfg.SrcClk = PWM_CLK_SRC_32K;
pwm_cfg.SrcEnable = PWM_EN_SEL_SELF;
xc_pwm_init(PWM0_IDX, &pwm_cfg);
xc_pwm_start(PWM0_IDX);
xc_pwm_lowpower_enable(PWM0_IDX);
xc_pwm_lowpower_countdirection_set(PWM0_IDX, PWM_SLEEP_COUNT_DIRECTION_UP);
PWR_InitCfg_t pwr_cfg = {0};
pwr_cfg.pwr_wake_it_src = GPIO_IRQn_WAKE | RTC_IRQn_WAKE;
pwr_cfg.pwr_sleep_mode = LIGHT_SLEEP_MODE; // LIGHT_SLEEP_MODE;//DEEP_SLEEP_MODE;
// xc_fmc_spi_init_oprt();
// xc_pwr_gpio_sleep_config();
if (pwr_cfg.pwr_sleep_mode == LIGHT_SLEEP_MODE) {
xc_pwr_gpio_lightsleep_wake_config(GPIO_4, RIS_EDGE_INT);
xc_pwr_gpio_lightsleep_wake_config(GPIO_5, FAIL_EDGE_INT);
} else if (pwr_cfg.pwr_sleep_mode == DEEP_SLEEP_MODE) {
// PWRKEY Initialization is required after deep sleep wakeup
xc_pwr_pwrkey_init();
xc_pwr_pwrkey_deepsleep_wake_config(GPIO_4, DEEP_SLEEP_GPIO_WAKE_HIGH_LEVEL);
xc_pwr_pwrkey_deepsleep_wake_config(GPIO_5, DEEP_SLEEP_GPIO_WAKE_LOW_LEVEL);
}
xc_pwr_sleep_init(&pwr_cfg);
while (1) {
delay_ms(100);
xc_pwr_cpu_sleep_enter();
DEBUG("wakeup\n");
}
}
void bubble_sort(uint16_t *data, uint8_t len)
{
for (int i = 0; i < len - 1; i++) {
for (int j = 0; j < len - i - 1; j++) {
if (data[j] > data[j + 1]) {
uint16_t temp = data[j];
data[j] = data[j + 1];
data[j + 1] = temp;
}
}
}
}
uint32_t find_duplicate_data(uint16_t *buff, uint16_t size)
{
uint32_t val[CAPTURE_DATA_MAX / 2];
uint8_t cnt[CAPTURE_DATA_MAX / 2];
uint8_t repeat_cnt = 0;
uint32_t found = 0;
uint32_t maxRepeatIndex = 0;
for (int i = 0; i < size; i++) {
found = 0;
for (int j = 0; j < repeat_cnt; j++) {
if (val[j] == buff[i]) {
cnt[j]++;
found = 1;
break;
}
}
if (!found) {
val[repeat_cnt] = buff[i];
cnt[repeat_cnt] = 1;
repeat_cnt++;
}
}
for (int i = 0; i < repeat_cnt; i++) {
if (cnt[i] > cnt[maxRepeatIndex]) {
maxRepeatIndex = i;
}
}
return val[maxRepeatIndex];
}
bool pwm_freq_check(uint32_t cap_freq, uint16_t *data)
{
uint16_t diff_val[CAPTURE_DATA_MAX - 1];
uint32_t val = 0;
for (uint8_t i = 0; i < CAPTURE_DATA_MAX - 1; i++) {
if(data[i + 1] - data[i] > 0){
diff_val[i] = data[i + 1] - data[i];
}else{
diff_val[i] = data[i + 1] + 65536 - data[i];
}
}
bubble_sort(diff_val, CAPTURE_DATA_MAX - 1);
val = find_duplicate_data(diff_val, CAPTURE_DATA_MAX / 2);
if ((val < (16000000 / cap_freq + DEVIATION_FREQ)) && (val > (16000000 / cap_freq - DEVIATION_FREQ))) {
DEBUG("freq right\n");
return true;
} else {
DEBUG("freq error\n");
return false;
}
}
bool pwm_dutycycle_check(uint16_t duty_cycle, uint16_t *data)
{
uint16_t diff_val[CAPTURE_DATA_MAX - 1];
uint32_t low_level_cnt = 0;
uint32_t high_level_cnt = 0;
for (uint8_t i = 0; i < CAPTURE_DATA_MAX - 1; i++) {
if(data[i + 1] - data[i] > 0){
diff_val[i] = data[i + 1] - data[i];
}else{
diff_val[i] = data[i + 1] + 65536 - data[i];
}
}
bubble_sort(diff_val, CAPTURE_DATA_MAX - 1);
low_level_cnt = find_duplicate_data(diff_val, CAPTURE_DATA_MAX / 2);
high_level_cnt = find_duplicate_data(diff_val + CAPTURE_DATA_MAX / 2, CAPTURE_DATA_MAX / 2);
DEBUG("low=%d, high=%d, dutycycle=%d\n", low_level_cnt, high_level_cnt,
duty_cycle * (low_level_cnt + high_level_cnt) / 100);
if ((high_level_cnt <= (duty_cycle * (low_level_cnt + high_level_cnt) / 100 + DEVIATION_DUTYCYCLE)) &&
(high_level_cnt >= (duty_cycle * (low_level_cnt + high_level_cnt) / 100 - DEVIATION_DUTYCYCLE))) {
DEBUG("duty_cycle right\n");
return true;
} else {
DEBUG("duty_cycle error\n");
return false;
}
}
bool pwm_invert_freq_check(uint32_t freq, uint16_t *data)
{
uint16_t diff_val[CAPTURE_DATA_MAX - 1];
uint32_t val = 0;
bubble_sort(data, CAPTURE_DATA_MAX);
for (uint8_t i = 0; i < CAPTURE_DATA_MAX - 1; i++) {
if(data[i + 1] - data[i] > 0){
diff_val[i] = data[i + 1] - data[i];
}else{
diff_val[i] = data[i + 1] + 65536 - data[i];
}
}
val = find_duplicate_data(diff_val, CAPTURE_DATA_MAX / 2);
if ((val < (16000000 / freq + DEVIATION_FREQ)) && (val > (16000000 / freq - DEVIATION_FREQ))) {
DEBUG("freq right\n");
return true;
} else {
DEBUG("freq error\n");
return false;
}
}
bool pwm_invert_dutycycle_check(uint16_t duty_cycle, uint16_t *data)
{
uint16_t diff_val[CAPTURE_DATA_MAX - 1];
uint32_t low_level_cnt = 0;
uint32_t high_level_cnt = 0;
bubble_sort(data, CAPTURE_DATA_MAX);
for (uint8_t i = 0; i < CAPTURE_DATA_MAX - 1; i++) {
if(data[i + 1] - data[i] > 0){
diff_val[i] = data[i + 1] - data[i];
}else{
diff_val[i] = data[i + 1] + 65536 - data[i];
}
}
bubble_sort(diff_val, CAPTURE_DATA_MAX - 1);
low_level_cnt = find_duplicate_data(diff_val, CAPTURE_DATA_MAX / 2);
low_level_cnt = find_duplicate_data(diff_val + CAPTURE_DATA_MAX / 2, CAPTURE_DATA_MAX / 2);
DEBUG("low=%d, high=%d, dutycycle=%d\n", low_level_cnt, high_level_cnt,
duty_cycle * (low_level_cnt + high_level_cnt) / 100);
if ((high_level_cnt <= (duty_cycle * (low_level_cnt + high_level_cnt) / 100 + DEVIATION_DUTYCYCLE)) &&
(high_level_cnt >= (duty_cycle * (low_level_cnt + high_level_cnt) / 100 - DEVIATION_DUTYCYCLE))) {
DEBUG("duty_cycle right\n");
return true;
} else {
DEBUG("duty_cycle error\n");
return false;
}
}
void pwm_brk_check(void)
{
if (pwm_brk_state == PWM_BRK_START) {
pwm_brk_cap_state = PWM_BRK_CAP_ERROR;
} else if (pwm_brk_state == PWM_BRK_STOP) {
pwm_brk_cap_state = PWM_BRK_CAP_RECOVERY;
}
}
void dump_capture_invert_data(uint16_t check_data, uint16_t *data)
{
if (pwm_cap_state == PWM_CAP_FREQ) {
if (pwm_invert_freq_check(check_data, data) == true) {
pwm_cap_state = PWM_CAP_RIGHT;
} else {
pwm_cap_state = PWM_CAP_ERROR;
}
} else if (pwm_cap_state == PWM_CAP_DUTYCYCLE) {
if (pwm_invert_dutycycle_check(check_data, data) == true) {
pwm_cap_state = PWM_CAP_RIGHT;
} else {
pwm_cap_state = PWM_CAP_ERROR;
}
}
}
void dump_capture_data(uint8_t cap_type, uint16_t check_data, uint16_t *data)
{
if (cap_type == PWM_CAP_TYPE_FREQ) {
if (pwm_freq_check(check_data, data) == true) {
pwm_cap_state = PWM_CAP_RIGHT;
} else {
pwm_cap_state = PWM_CAP_ERROR;
}
} else if (cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
if (pwm_dutycycle_check(check_data, data) == true) {
pwm_cap_state = PWM_CAP_RIGHT;
} else {
pwm_cap_state = PWM_CAP_ERROR;
}
}
}
uint8_t pwm_capture_ch0_callback(void *context)
{
static uint16_t ch0_capture_count = 0;
uint32_t val = xc_pwm_capture_val_get(PWM_IC_CH0);
if (ch0_capture_count < CAPTURE_DATA_MAX) {
ch0_capture_data[ch0_capture_count++] = val;
}
if (ch0_capture_count == CAPTURE_DATA_MAX) {
DEBUG("ch0=");
if (pwm_ch_cap_type.ch0_cap_type == PWM_CAP_TYPE_FREQ) {
dump_capture_data(pwm_ch_cap_type.ch0_cap_type, pwm_ch_cap_freq.ch0_cap_freq, ch0_capture_data);
} else if (pwm_ch_cap_type.ch0_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
dump_capture_data(pwm_ch_cap_type.ch0_cap_type, pwm_ch_cap_dutycycle.ch0_cap_dutycycle, ch0_capture_data);
}
ch0_capture_count++;
}
return 0;
}
uint8_t pwm_capture_ch1_callback(void *context)
{
static uint16_t ch1_capture_count = 0;
uint32_t val = xc_pwm_capture_val_get(PWM_IC_CH1);
if (ch1_capture_count < CAPTURE_DATA_MAX) {
ch1_capture_data[ch1_capture_count++] = val;
}
if (ch1_capture_count == CAPTURE_DATA_MAX) {
DEBUG("ch1=");
if (pwm_ch_cap_type.ch1_cap_type == PWM_CAP_TYPE_FREQ) {
dump_capture_data(pwm_ch_cap_type.ch1_cap_type, pwm_ch_cap_freq.ch1_cap_freq, ch1_capture_data);
} else if (pwm_ch_cap_type.ch1_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
dump_capture_data(pwm_ch_cap_type.ch1_cap_type, pwm_ch_cap_dutycycle.ch1_cap_dutycycle, ch1_capture_data);
}
pwm_brk_check();
ch1_capture_count++;
}
return 0;
}
uint8_t pwm_capture_ch2_callback(void *context)
{
static uint16_t ch2_capture_count = 0;
uint32_t val = xc_pwm_capture_val_get(PWM_IC_CH2);
if (ch2_capture_count < CAPTURE_DATA_MAX) {
ch2_capture_data[ch2_capture_count++] = val;
}
if (ch2_capture_count == CAPTURE_DATA_MAX) {
DEBUG("ch2=");
if (pwm_ch_cap_type.ch2_cap_type == PWM_CAP_TYPE_FREQ) {
dump_capture_data(pwm_ch_cap_type.ch2_cap_type, pwm_ch_cap_freq.ch2_cap_freq, ch2_capture_data);
} else if (pwm_ch_cap_type.ch2_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
dump_capture_data(pwm_ch_cap_type.ch2_cap_type, pwm_ch_cap_dutycycle.ch2_cap_dutycycle, ch2_capture_data);
}
ch2_capture_count++;
}
return 0;
}
/*
*-----------------------------------------------------------------------------------------------
* PWM Timer
*-----------------------------------------------------------------------------------------------
*/
void pwm_timer_demo(void)
{
DEBUG("PWM_TIMER_DEMO\r");
GPIO_InitCfg_t gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux1;
gpio_cfg.Pull = GPIO_PULLUP;
gpio_cfg.Int = NOT_INT;
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
gpio_cfg.Pin = GPIO_29;
xc_gpio_init(&gpio_cfg);
gpio_cfg.Pin = GPIO_30;
xc_gpio_init(&gpio_cfg);
#if (USE_XIP == 0)
cpr_rf_reg0__boot_done__setf(1);
gpio_cfg.Pin = GPIO_35;
xc_gpio_init(&gpio_cfg);
gpio_cfg.Pin = GPIO_36;
xc_gpio_init(&gpio_cfg);
gpio_cfg.Pin = GPIO_37;
xc_gpio_init(&gpio_cfg);
gpio_cfg.Pin = GPIO_38;
xc_gpio_init(&gpio_cfg);
#endif
PWM_Timer_InitCfg_t pwm_timer_cfg;
pwm_timer_cfg.src_clk = PWM_CLK_SRC_32M_DIV;
pwm_timer_cfg.clk_div = PWM_CLK_DIV0;
pwm_timer_cfg.timer_mode = PWM_TIMER_MODE_USER_DEFINED;
pwm_timer_cfg.timer_int_mask_en = DISABLE;
pwm_timer_cfg.timer_pwm_en = ENABLE;
pwm_timer_cfg.timer_0to100_pwm_en = ENABLE;
xc_pwm_timer_init(PWM_TIMER0_IDX, &pwm_timer_cfg);
// If the duty cycle resolution is one-thousandth, the maximum frequency = xc_clock_hfclk_in_get()/2/1000.
xc_pwm_timer_set_freq(PWM_TIMER0_IDX, 16000);
xc_pwm_timer_set_dutycycle(PWM_TIMER0_IDX, (double)50.1);
xc_pwm_timer_start(PWM_TIMER0_IDX);
}
#define PWM_TIMER_DEMO 0
#define PWM_OUTPUT_DEMO 1
#define PWM_CAPTURE_DEMO 0
#define PWM_BRAKE_DEMO 0
#define PWM_ENABLE_ADC_DEMO 0
#define PWM_LOWPOWER_DEMO 0
void pwm_demo()
{
#if PWM_TIMER_DEMO
pwm_timer_demo();
#endif
#if PWM_OUTPUT_DEMO
pwm_output_demo();
#endif
#if PWM_CAPTURE_DEMO
pwm_capture_demo();
#endif
#if PWM_BRAKE_DEMO
pwm_brake_demo();
#endif
#if PWM_ENABLE_ADC_DEMO
pwm_enable_adc_demo();
#endif
#if PWM_LOWPOWER_DEMO
pwm_lowpower_demo();
#endif
}