hpw422移植新的sdk
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xushaoxiang
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;/*****************************************************************************
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; * @file: startup_xinc.s
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; * @purpose: CMSIS Cortex-M0 Core Device Startup File for the
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; * Device xinc.
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; *****************************************************************************/
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Stack_Size EQU 0x00000600
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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Heap_Size EQU 0x00000000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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; ToDo: Add here the vectors for the device specific external interrupts handler
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DCD 0 ; 0 BLE Handler
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DCD DMAS_Handler ; 1
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DCD CPR_Handler ; 2
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DCD GPIO_Handler ; 3
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DCD RTC_Handler ; 4
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DCD TIMER0_Handler ; 5
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DCD TIMER1_Handler
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DCD TIMER2_Handler
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DCD TIMER3_Handler
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DCD WDT_Handler
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DCD I2C_Handler
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DCD UART0_Handler
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DCD UART1_Handler
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DCD SPI0_Handler
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DCD SPI1_Handler
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DCD 0
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DCD 0
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DCD GADC_Handler ; 17
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DCD 0 ; 18
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DCD 0 ; 19
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DCD 0 ; 20
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DCD 0 ; 21
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DCD SUB1G_Handler ; 22
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DCD PWM_Handler ; 23
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DCD MPU_Handler ; 24
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DCD 0 ; 25
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DCD 0 ; 26
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DCD AOTIMER0_Handler ; 27
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DCD AOTIMER1_Handler ; 28
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DCD CMP_Handler ; 29
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DCD FMC_Handler ; 30
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DCD CAN_Handler ; 31
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset Handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT SystemInit
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IMPORT __main
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LDR r0, =0x4000013C ; remap
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LDR r1, =0x10000001
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STR r1, [r0]
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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MemManage_Handler\
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PROC
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EXPORT MemManage_Handler [WEAK]
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B .
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ENDP
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BusFault_Handler\
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PROC
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EXPORT BusFault_Handler [WEAK]
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B .
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ENDP
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UsageFault_Handler\
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PROC
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EXPORT UsageFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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DebugMon_Handler\
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PROC
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EXPORT DebugMon_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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;EXPORT BLE_Handler [WEAK]
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EXPORT DMAS_Handler [WEAK]
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EXPORT CPR_Handler [WEAK]
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EXPORT GPIO_Handler [WEAK]
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EXPORT RTC_Handler [WEAK]
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EXPORT TIMER0_Handler [WEAK]
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EXPORT TIMER1_Handler [WEAK]
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EXPORT TIMER2_Handler [WEAK]
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EXPORT TIMER3_Handler [WEAK]
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EXPORT WDT_Handler [WEAK]
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EXPORT I2C_Handler [WEAK]
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EXPORT UART0_Handler [WEAK]
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EXPORT UART1_Handler [WEAK]
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EXPORT SPI0_Handler [WEAK]
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EXPORT SPI1_Handler [WEAK]
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;EXPORT KBS_Handler [WEAK]
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;EXPORT QDEC_Handler [WEAK]
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EXPORT GADC_Handler [WEAK]
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EXPORT AOTIMER0_Handler [WEAK]
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EXPORT AOTIMER1_Handler [WEAK]
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EXPORT CMP_Handler [WEAK]
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EXPORT FMC_Handler [WEAK]
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EXPORT CAN_Handler [WEAK]
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;EXPORT SIM_Handler [WEAK]
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;EXPORT AES_Handler [WEAK]
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EXPORT PendSV_Handler [WEAK]
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EXPORT SysTick_Handler [WEAK]
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EXPORT SUB1G_Handler [WEAK]
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EXPORT PWM_Handler [WEAK]
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EXPORT MPU_Handler [WEAK]
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PendSV_Handler
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SysTick_Handler
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;BLE_Handler
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DMAS_Handler
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CPR_Handler
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GPIO_Handler
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RTC_Handler
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TIMER0_Handler
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TIMER1_Handler
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TIMER2_Handler
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TIMER3_Handler
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WDT_Handler
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I2C_Handler
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UART0_Handler
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UART1_Handler
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SPI0_Handler
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SPI1_Handler
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;KBS_Handler
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;QDEC_Handler
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GADC_Handler
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;SIM_Handler
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;AES_Handler
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AOTIMER0_Handler
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AOTIMER1_Handler
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CMP_Handler
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FMC_Handler
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CAN_Handler
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SUB1G_Handler
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PWM_Handler
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MPU_Handler
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B .
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ENDP
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ALIGN
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; User Initial Stack & Heap
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, = (Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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END
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