hpw422移植新的sdk

2026-07-03 18:08:25 +08:00
commit 945a5a5b0b
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+/*!
+ * \file      xc6xxx_hal_wdt.c
+ *
+ * \brief     Target xc6xxx hal wdt implementation
+ *
+ * \copyright Revised BSD License, see section \ref LICENSE.
+ *
+ * \code
+ *
+ *            _  __ _       ________    _
+ *           | |/ /(_)___  / ____/ /_  (_)___
+ *           |   // / __ \/ /   / __ \/ / __ \
+ *          /   |/ / / / / /___/ / / / / /_/ /
+ *         /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
+ *                                   /_/
+ *           (C) 2022-2025 XinChip
+ *
+ * \endcode
+ *
+ * \author     ( XinChip ) Alex-J
+ *
+ * \author     ( XinChip )
+ */
+
+/*------------------------------------------------------------------------------------
+                                 INCLUDE HEADE FILES
+--------------------------------------------------------------------------------------*/
+#include "xc_drv_wdt.h"
+#if XC_CHECK(XC_WDT_ENABLED)
+/*------------------------------------------------------------------------------------
+                                    Local Variables
+ -------------------------------------------------------------------------------------*/
+/*------------------------------------------------------------------------------------
+                                    Func Prototype
+ -------------------------------------------------------------------------------------*/
+
+/*------------------------------------------------------------------------------------
+                                    Functions
+-------------------------------------------------------------------------------------*/
+
+void xc_wdt_init(WDT_InitCfg_t *wdt_cfg)
+{
+    cpr_ctlapbclken_grctl__wdt_pclk_en__setf(ENABLE);
+    cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_ENABLE);
+    cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_DISABLE);
+
+    /*
+    SYS_DISABLE | M0_ENABLE :    SYS RST, for low-power reset or quick system reset;
+    SYS_ENABLE  | M0_DISABLE:    M0 RST,  only for m0 reset;
+    SYS_DISABLE | M0_DISABLE:    M0 RST,  m0 reset and low-power reset;
+    */
+    cpr_rstctl_wdtrst_mask_set(
+        (WDT_SYS_RSTN_MASK_DISABLE | WDT_M0_RSTN_MASK_ENABLE));
+    cpr_lp_ctl__wdt_pclk_sel__setf(wdt_cfg->PclkSel);
+    cpr_lp_ctl__wdt_tclk_en__setf(ENABLE);
+
+    wdt_cr__wdt_rmod__setf(wdt_cfg->WorkMode);
+    wdt_torr__wdt_top__setf(wdt_cfg->ReloadValue);
+}
+
+void xc_wdt_start(void)
+{
+    wdt_cr__wdt_rpl__setf(WDT_CR_RPL_4PCLK);
+    wdt_cr__wdt_en__setf(ENABLE);
+    wdt_crr__setf(WDT_CRR_CRR_ENABLE);
+    cpr_ctlapbclken_grctl__wdt_pclk_en__setf(DISABLE);
+}
+
+
+void xc_ext32k_wdt_init(WDT_InitCfg_t *wdt_cfg)
+{
+    cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_ENABLE);
+    cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_DISABLE);
+
+    /*
+    SYS_DISABLE | M0_ENABLE :    SYS RST, for low-power reset or quick system reset;
+    SYS_ENABLE  | M0_DISABLE:    M0 RST,  only for m0 reset;
+    SYS_DISABLE | M0_DISABLE:    M0 RST,  m0 reset and low-power reset;
+    */
+    cpr_rstctl_wdtrst_mask_set(
+        (WDT_SYS_RSTN_MASK_DISABLE | WDT_M0_RSTN_MASK_ENABLE));
+
+//    cpr_rstctl_wdtrst_mask_set(
+//        (WDT_SYS_RSTN_MASK_ENABLE | WDT_M0_RSTN_MASK_DISABLE));
+    cpr_lp_ctl__wdt_pclk_sel__setf(wdt_cfg->PclkSel);
+    cpr_lp_ctl__wdt_tclk_en__setf(ENABLE);
+
+    wdt_cr__wdt_rmod__setf(wdt_cfg->WorkMode);
+    wdt_torr__wdt_top__setf(wdt_cfg->ReloadValue);
+}
+
+void xc_ext32k_wdt_start(void)
+{
+    wdt_cr__wdt_rpl__setf(WDT_CR_RPL_4PCLK);
+    wdt_cr__wdt_en__setf(ENABLE);
+    wdt_crr__setf(WDT_CRR_CRR_ENABLE);
+}
+
+void xc_wdt_stop(void) 
+{
+    wdt_cr__wdt_en__setf(DISABLE); 
+}
+
+void xc_wdt_refresh(void)
+{
+    GLOBAL_INT_DISABLE();
+    cpr_ctlapbclken_grctl__wdt_pclk_en__setf(ENABLE);
+    uint8_t val = wdt_icr_get();
+
+    val = wdt_torr__wdt_top__getf();
+    wdt_torr__wdt_top__setf(val);
+
+    cpr_ctlapbclken_grctl__wdt_pclk_en__setf(DISABLE);
+    GLOBAL_INT_RESTORE();
+}
+
+void xc_wdt_reload(void)
+{
+    GLOBAL_INT_DISABLE();
+    cpr_ctlapbclken_grctl__wdt_pclk_en__setf(ENABLE);
+    uint8_t val = wdt_icr_get();
+
+    val = wdt_torr__wdt_top__getf();
+    wdt_torr__wdt_top__setf(val);
+
+    wdt_crr__setf(WDT_CRR_CRR_ENABLE);
+    cpr_ctlapbclken_grctl__wdt_pclk_en__setf(DISABLE);
+    GLOBAL_INT_RESTORE();
+}
+
+void WDT_Handler()
+{
+    DEBUG("WDT_Handler\n"); 
+
+#if ((XTAL_32K) && (!defined(NO_SUPPORT_LFCLK_XTAL_32768)))
+    cprao_aon_ctl_clk32k_set(0x109);
+
+    WDT_InitCfg_t wdt_cfg ;
+
+    wdt_cfg.WorkMode      = WDT_WORK_MODE0;
+    wdt_cfg.ReloadValue   = WDT_CLK_32M_RESET_MODE0_4096US;
+    wdt_cfg.PclkSel       = WDT_WORK_32M;
+    xc_wdt_init(&wdt_cfg);
+    xc_wdt_start();	
+    while(1);
+#endif
+    xc_wdt_refresh();
+}
+
+#endif // XC_CHECK(XC_WDT_ENABLED)