/*!
 * \file      xc62xx.h
 *
 * \brief     The header of xc62xx chip
 *
 * \copyright Revised BSD License, see section \ref LICENSE.
 *
 * \code
 *
 *            _  __ _       ________    _     
 *           | |/ /(_)___  / ____/ /_  (_)___ 
 *           |   // / __ \/ /   / __ \/ / __ \
 *          /   |/ / / / / /___/ / / / / /_/ /
 *         /_/|_/_/_/ /_/\____/_/ /_/_/ .___/ 
 *                                   /_/      
 *           (C) 2022-2025 XinChip
 *
 * \endcode
 *
 * \author     ( XinChip ) Alex-J
 *
 * \author     ( XinChip )
 */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __XC62XX_H__
#define __XC62XX_H__

#ifdef __cplusplus
extern "C" {
#endif

/*-----------------------------------------------------------------------------------
	                               INCLUDE HEADE FILES
 ------------------------------------------------------------------------------------*/
#include <stdio.h>
#include <stdint.h>
#include <stdbool.h>
#include <string.h>

/*------------------------------------------------------------------------------------
	                                     Macros
 -------------------------------------------------------------------------------------*/    
/* following defines should be used for structure members */
#define __IM                                    volatile const    /*! Defines 'read only' structure member permissions */
#define __OM                                    volatile          /*! Defines 'write only' structure member permissions */
#define __IOM                                   volatile          /*! Defines 'read / write' structure member permissions */

#define __RAM_CODE                              __attribute__((section("ram_code")))

#define __WEAK                                  __attribute__((weak))

#ifndef   __PACKED
  #define __PACKED                              __attribute__((packed))
#endif

#ifndef   __UNALIGNED_UINT32_WRITE
  #define __UNALIGNED_UINT32_WRITE(addr, val)    ((*((__packed uint32_t *)(addr))) = (val))
#endif
#ifndef   __UNALIGNED_UINT32_READ
  #define __UNALIGNED_UINT32_READ(addr)          (*((const __packed uint32_t *)(addr)))
#endif

#define __STATIC_INLINE                         static __inline

#define FMC_SPI_DMA_OFF
#define SPI_OFF
#define SPI_DMA_OFF
#define UART_DMA_OFF

#define QDEC_USE_P12_P13
#define HFCLK_SRC_XTAL_IS_32M

#define XC62XX_CLOCK_CONFIG
#define XC62XX_ROM_DRIVER_ADDR
#define XC62XX_ADC_CALI_PARA
#define XC62XX_ADC_CHANNEL
#define BOR_VERSION_IS_V2

#define NO_SUPPORT_UART2
#define NO_SUPPORT_HFCLK_RC_16M
#define NO_SUPPORT_HFCLK_BBPLL_96M
#define NO_SUPPORT_HFCLK_BBPLL_128M
#define NO_SUPPORT_LFCLK_XTAL_32768
#define NO_SUPPORT_PWM_CAPTURE
#define NO_SUPPORT_PWM_ADC
#define NO_SUPPORT_PWM_BRAKE
#define NO_SUPPORT_PWM_LOWPOWER
#define NO_SUPPORT_DMA
#define NO_SUPPORT_DMA_LINKLIST
#define NO_SUPPORT_QUAD_SPI
#define NO_SUPPORT_M4FPU_FUNTION
/*
 * ==========================================================================
 * ---------- Interrupt Number Definition -----------------------------------
 * ==========================================================================
 */

 typedef enum IRQn
 {
    /******  Cortex-M# Processor Exceptions Numbers ***************************************************/

    /* ToDo: use this Cortex interrupt numbers if your device is a CORTEX-M4 device                   */
    NonMaskableInt_IRQn           = -14,      /*!<  2 Non Maskable Interrupt                        */
    HardFault_IRQn                = -13,      /*!<  3 Hard Fault Interrupt                          */
    SVCall_IRQn                   = -5,       /*!< 11 SV Call Interrupt                             */
    PendSV_IRQn                   = -2,       /*!< 14 Pend SV Interrupt                             */
    SysTick_IRQn                  = -1,       /*!< 15 System Tick Interrupt                         */

    /******  Device Specific Interrupt Numbers ********************************************************/
    /* ToDo: add here your device specific external interrupt numbers
            according the interrupt handlers defined in startup_Device.s
            eg.: Interrupt for Timer#1       TIM1_IRQHandler   ->   TIM1_IRQn                        */

    BLE_IRQn                      = 0,        /*!< Device Interrupt                                 */

    CPR_IRQn                      = 2,
    GPIO_IRQn                     = 3,
    RTC_IRQn                      = 4,
    TIMER0_IRQn                   = 5,
    TIMER1_IRQn                   = 6,
    TIMER2_IRQn                   = 7,
    TIMER3_IRQn                   = 8,
    WDT_IRQn                      = 9,
    I2C_IRQn                      = 10,
    UART0_IRQn                    = 11,
    UART1_IRQn                    = 12,
    SPI0_IRQn                     = 13,

    KBS_IRQn                      = 15,
    QDEC_IRQn                     = 16,
    GADC_IRQn                     = 17,
    PWM_IRQn                      = 18,
    AES_IRQn                      = 19,
    USB_IRQn                      = 20,
    AUDIO_IRQn                    = 21,
    RF24G_IRQn                    = 22,

    MPU_IRQn                      = 24,

    I2S_IRQn                      = 26,
    TIMER_AO0_IRQn                = 27,
    TIMER_AO1_IRQn                = 28,
    CMP_IRQn                      = 29,
    FMC_IRQn                      = 30,
    CAN_IRQn                      = 31
} IRQn_Type;

/*
 * ==========================================================================
 * ----------- Processor and Core Peripheral Section ------------------------
 * ==========================================================================
 */

/* Configuration of the Cortex-M# Processor and Core Peripherals */
/* ToDo: set the defines according your Device                                                    */
#define __MPU_PRESENT             0         /*!< MPU present or not                               */
#define __NVIC_PRIO_BITS          2         /*!< Number of Bits used for Priority Levels          */
#define __Vendor_SysTickConfig    0         /*!< Set to 1 if different SysTick Config is used     */

#if defined ( __CC_ARM   )
  #if defined (__TARGET_FPU_VFP)
    #define __FPU_PRESENT         1         /*!< FPU present or not                               */
  #else
    #define __FPU_PRESENT         0         /*!< FPU present or not                               */
  #endif
#else
    #define __FPU_PRESENT         0         /*!< FPU present or not                               */
#endif

/*@}*/ /* end of group <Device>_CMSIS */

#include "core_cm0.h"          /* Cortex-M4 processor and core peripherals */

/**
  * @}
  */


#ifdef __cplusplus
}
#endif

#endif  /* __XC62XX_H__ */