/*----------------------------------------------------------------------------------------------------
    INCLUDE HEADE FILES
----------------------------------------------------------------------------------------------------*/
//#include "Includes.h"
#include "xc6xxx.h"
#include <stdio.h>
#include <stdarg.h>
#include <string.h>
#include "BootSecond.h"


extern void makeCRC32table(unsigned int table[]);
extern unsigned int crc32table[];

void clock_init(void)
{
    clock_cb.hfclk_src = CLOCK_HFCLK_SRC_XTAL;
    clock_cb.hfclk_in = CLOCK_HFCLK_IN_32M;
    clock_cb.systick_unit = (Systick_Unit_Typedef)(clock_cb.hfclk_in / 1000000);

    /* Set the voltages of bbldo and lpldo */
    cprao_aon_bbldo_adj_set(0x2c);
    cprao_aon_lpoldo_adj_set(7);

    /* Set the 32K lfclk */
    clock_cb.lfclk_src = CLOCK_LFCLK_SRC_RC;
    clock_cb.lfclk_in = CLOCK_LFCLK_IN_32K;

    SysTick_Config(xc_clock_hfclk_in_get() / 100);
    SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
}

void app_uart_init(void)
{
    GPIO_InitCfg_t gpio_cfg = {0};

    gpio_cfg.Mux            = GPIO_Mux0;
    gpio_cfg.Pull           = GPIO_PULLUP;
    gpio_cfg.Int            = NOT_INT;
    gpio_cfg.FunSel         = UART0_TX;

    gpio_cfg.Pin            = GPIO_18;
    gpio_cfg.Dir            = GPIO_DIR_OUTPUT;
    xc_gpio_init(&gpio_cfg);

    gpio_cfg.FunSel = UART0_RX;
    gpio_cfg.Pin    = GPIO_19;
    gpio_cfg.Dir    = GPIO_DIR_INPUT;
    xc_gpio_init(&gpio_cfg);

    UART_InitCfg_t uart_cfg      = {0};

    uart_cfg.Parity              = UART_PARITY_DISABLE;
    uart_cfg.StopBits            = UART_STOP_1_BITS;
    uart_cfg.WordLength          = UART_DATA_8_BITS;
    uart_cfg.BaudRate            = UART_BAUDRATE_115200;
    uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE;

    xc_uart_init(UART0_IDX, &uart_cfg);
}


void printf_string(char *strings)
{
	while(*strings != '\0')
	{
		xc_uart_send_byte(UART0_IDX, *strings);
		strings ++;
	}
}
 
void printf_hex(uint32_t input_data)
{
	uint8_t temp[96];
	uint8_t i = 0;
    
	while(input_data > 0)
	{
        if((input_data % 16) > 9)
            temp[i]=(input_data % 16) - 10 + 'a';
        else
            temp[i]=(input_data % 16) + '0';   
		
		input_data = input_data / 16;
		i ++;
	}
    
	for( ; i>0; i --)
	{
		xc_uart_send_byte(UART0_IDX, temp[i-1]);
	}
}
int uart_printf(const char *fmt,...)
{
	char chr;
	int argint;
    char temp;

	char *argstr;
	va_list va;				
	va_start(va,fmt);		
	
	while((chr= *fmt++) != '\0')
	{
		if(chr != '%')
		{
			xc_uart_send_byte(UART0_IDX, chr);
			continue;
		}
        if(*fmt != '\0')
            temp=*fmt++;
        else
            temp='\0';
		
		switch(temp)
		{
			case '\0':
				xc_uart_send_byte(UART0_IDX, '%');
                break;
			case 'c':
				xc_uart_send_byte(UART0_IDX, va_arg(va,int));
                break;
			case 's':
				argstr = va_arg(va,char *);
				printf_string(argstr);				
			    break;
			case 'x':
			case 'X':
				argint = va_arg(va,int);
				printf_hex(argint);
		        break;
			default :		
				xc_uart_send_byte(UART0_IDX, '%');
				fmt --;
				break;
			
		}
	}
	va_end(va);		
    return 0;
}

__RAM_CODE void Wdt_Rreset(void)
{
	xc_pwr_rom_on();
    cprao_aon_slp_pd_mask_set(0x001);
#if XTAL_32K 
    cprao_aon_ctl_clk32k_set(0x109);
#endif
	
	WDT_InitCfg_t wdt_cfg ;

    wdt_cfg.WorkMode      = WDT_WORK_MODE0;
    wdt_cfg.ReloadValue   = WDT_CLK_32M_RESET_MODE0_4096US;
    wdt_cfg.PclkSel       = WDT_WORK_32M;
//    xc_wdt_init(&wdt_cfg);
//    xc_wdt_start();
    
    // xc_wdt_init
    cpr_ctlapbclken_grctl__wdt_pclk_en__setf(ENABLE);
    cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_ENABLE);
    cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_DISABLE);

    /*
    SYS_DISABLE | M0_ENABLE :    SYS RST, for low-power reset or quick system reset;
    SYS_ENABLE  | M0_DISABLE:    M0 RST,  only for m0 reset;
    SYS_DISABLE | M0_DISABLE:    M0 RST,  m0 reset and low-power reset;
    */
    cpr_rstctl_wdtrst_mask_set(
        (WDT_SYS_RSTN_MASK_DISABLE | WDT_M0_RSTN_MASK_ENABLE));
    cpr_lp_ctl__wdt_pclk_sel__setf(wdt_cfg.PclkSel);
    cpr_lp_ctl__wdt_tclk_en__setf(ENABLE);

    wdt_cr__wdt_rmod__setf(wdt_cfg.WorkMode);
    wdt_torr__wdt_top__setf(wdt_cfg.ReloadValue);

    //xc_wdt_start();
    wdt_cr__wdt_rpl__setf(WDT_CR_RPL_4PCLK);
    wdt_cr__wdt_en__setf(ENABLE);
    wdt_crr__setf(WDT_CRR_CRR_ENABLE);
    cpr_ctlapbclken_grctl__wdt_pclk_en__setf(DISABLE);
    while(1);
}

void wdt_init(void)
{
    WDT_InitCfg_t wdt_cfg ;

    wdt_cfg.WorkMode      = WDT_WORK_MODE0;
    wdt_cfg.ReloadValue   = WDT_CLK_32K_RESET_MODE0_4096MS;
    wdt_cfg.PclkSel       = WDT_WORK_32K;
    
    xc_wdt_init(&wdt_cfg);
    xc_wdt_start();
}

void bor_init(void)
{
    cprao_aon_bor_ctr_reg0__bor_ctrl__setf(0x4);
    cprao_aon_bor_ctr_reg0__bor_rstn_mask__setf(1);
    cprao_aon_bor_ctr_reg0__bor_intr_mask__setf(0);
    NVIC_EnableIRQ(MPU_IRQn);
}

__RAM_CODE void MPU_Handler(void)
{
    Wdt_Rreset();
}

__RAM_CODE void HardFault_Handler()
{
    printf_string("HardFault_Handler\n");
    Wdt_Rreset();
}

int main(void)
{
    wdt_init();
    bor_init();
#ifdef WITHOUT_OTA

#ifdef QUAD_ENABLE
    init_xip(QUAD_MODE);
#else
    init_xip(DUAL_MODE);
    jump_app();
#endif
#endif
    
#ifdef BLE_OTA 
    clock_init();
	app_uart_init();
	uart_printf("boot init\n");
	 



    // Init_spi_master(0, SPIM_CLK_16MHZ);
    flash_init();
//    makeCRC32table(crc32table);
    boot_run_sec();
#endif

#ifdef OTA_24G
    config_2_4g_rf();
    Init_spi_master(0, SPIM_CLK_16MHZ);
    makeCRC32table(crc32table);

    spi_flash_Release_powerdown();
    *((uint32_t volatile *)0x40002450) |= 0x0; //- open rf digital
    // erase_flash_chip();
    printf("erase_flash_chip\n");

    rx_24g_ota();
#endif
    while (1)
        ;
}