/*! * \file spi_slave.c * * \brief Target spi slave device implementation * * \copyright Revised BSD License, see section \ref LICENSE. * * \code * * _ __ _ ________ _ * | |/ /(_)___ / ____/ /_ (_)___ * | // / __ \/ / / __ \/ / __ \ * / |/ / / / / /___/ / / / / /_/ / * /_/|_/_/_/ /_/\____/_/ /_/_/ .___/ * /_/ * (C) 2022-2025 XinChip * * \endcode * * \author ( XinChip ) Alex-J * * \author ( XinChip ) */ /*----------------------------------------------------------------------------------- INCLUDE HEADE FILES ------------------------------------------------------------------------------------*/ #include "spi_slave.h" #include "xc_drv_spi.h" /*------------------------------------------------------------------------------------ Macros -------------------------------------------------------------------------------------*/ #define SL_NODMA_BUFFER_LEN 16U /*------------------------------------------------------------------------------------ Global Variables -------------------------------------------------------------------------------------*/ /*------------------------------------------------------------------------------------ Functions -------------------------------------------------------------------------------------*/ /** * @brief spi_slave_demo * @details * @param void * @retval void */ void spi_slave_demo(void) { DEBUG("__SPI_SLAVE_DEMO__\r"); SPI_InitCfg_t spi_cfg = {0}; GPIO_InitCfg_t gpio_cfg = {0}; gpio_cfg.Mux = GPIO_Mux0; gpio_cfg.Dir = GPIO_DIR_INPUT; gpio_cfg.FunSel = SSI1_CLK; gpio_cfg.Int = NOT_INT; gpio_cfg.Pull = GPIO_PULLDOWN; gpio_cfg.Pin = GPIO_5; xc_gpio_init(&gpio_cfg); gpio_cfg.FunSel = SSI1_SSN; gpio_cfg.Pin = GPIO_15; xc_gpio_init(&gpio_cfg); gpio_cfg.Dir = GPIO_DIR_OUTPUT; gpio_cfg.FunSel = SSI1_TX; gpio_cfg.Pin = GPIO_16; xc_gpio_init(&gpio_cfg); gpio_cfg.Dir = GPIO_DIR_INPUT; gpio_cfg.FunSel = SSI1_RX; gpio_cfg.Pin = GPIO_17; xc_gpio_init(&gpio_cfg); spi_cfg.Mode = SPI_MODE_SLAVE; spi_cfg.DataSize = SSI_CTRL0_DFS_LEN_8BIT; spi_cfg.Direction = SSI_CTRL0_TMOD_WR; spi_cfg.BaudRatePrescaler = SSI_BAUD_DIV_8; spi_cfg.CLKPolarity = SSI_CTRL0_SCPOL_LOW; spi_cfg.CLKPhase = SSI_CTRL0_SCPHA_TRAIL; spi_cfg.FirstBit = SPI_FirstBit_MSB; uint8_t spi_handle = SPI1_IDX; xc_spi_init(spi_handle, &spi_cfg); uint8_t txbuff[SL_NODMA_BUFFER_LEN]; uint8_t rxbuff[SL_NODMA_BUFFER_LEN]; xc_spi_rxftl_fifo_set(spi_handle, SSI_RXFTL_FIFO_7); xc_spi_enable_it(spi_handle, SSI_IE_RXFIE_ENABLE); DEBUG("Write buffer: \n"); for (int i = 0; i < sizeof(txbuff); i++) { txbuff[i] = i + 1; PRINT("%02x ", txbuff[i]); } PRINT("\n"); xc_spi_write_and_read_data(spi_handle,(uint8_t *)txbuff,sizeof(txbuff), (uint8_t *)rxbuff,sizeof(rxbuff)); DEBUG("Read buffer: \n"); for (int i = 0; i < sizeof(rxbuff); i++) { PRINT("%02x ", rxbuff[i]); } PRINT("\n"); DEBUG("__SPI_END__\n"); DEBUG("Write buffer: \n"); memset((uint8_t *)txbuff, 0xbb, sizeof(txbuff)); for (int i = 0; i < sizeof(txbuff); i++) { PRINT("%02x ", txbuff[i]); } PRINT("\n"); xc_spi_write_and_read_data(spi_handle,(uint8_t *)txbuff,sizeof(txbuff), (uint8_t *)rxbuff,sizeof(rxbuff)); DEBUG("Read buffer: \n"); for (int i = 0; i < sizeof(rxbuff); i++) { PRINT("%02x ", rxbuff[i]); } PRINT("\n"); DEBUG("__SPI_END2__\n"); }