/*! * \file xc_drv_flash.h * * \brief The header of flash operation * * \copyright Revised BSD License, see section \ref LICENSE. * * \code * * _ __ _ ________ _ * | |/ /(_)___ / ____/ /_ (_)___ * | // / __ \/ / / __ \/ / __ \ * / |/ / / / / /___/ / / / / /_/ / * /_/|_/_/_/ /_/\____/_/ /_/_/ .___/ * /_/ * (C) 2022-2025 XinChip * * \endcode * * \author ( XinChip ) Alex-J * * \author ( XinChip ) */ #ifndef _XC_DRV_FLASH_H_ #define _XC_DRV_FLASH_H_ /*----------------------------------------------------------------------------------- INCLUDE HEADE FILES ------------------------------------------------------------------------------------*/ #include #include /*------------------------------------------------------------------------------------ Macros -------------------------------------------------------------------------------------*/ #define CMD_READ_DATA (uint8_t)0x03 #define CMD_READ_STATUS (uint8_t)0x05 #define CMD_CHIP_ERASE (uint8_t)0xc7 #define CMD_WRITE_ENABLE (uint8_t)0x06 #define CMD_WRITE_DISABLE (uint8_t)0x04 #define CMD_PAGE_PROGRAM (uint8_t)0x02 #define CMD_BLOCK_ERASE (uint8_t)0xD8 #define CMD_SECTOR_ERASE (uint8_t)0x20 #define CMD_PAGE_ERASE (uint8_t)0x81 #define CMD_RELEASE_PWRDWN (uint8_t)0xAB #define CMD_PWRDWN (uint8_t)0xB9 #define CMD_RUID (uint8_t)0x4B #define CMD_RDID (uint8_t)0x9F #define CMD_QREMS (uint8_t)0x94 #define CMD_WRITE_STATUS_REG (uint8_t)0x01 #define FLASH_PAGE_SIZE 256 #define FLASH_SECTOR_SIZE 4096 #define PUYA_FLASH_STATUS_WIP_SET (0x01UL) #define PUYA_FLASH_STATUS_WIP_RESET (0x00UL) #define CUR_PAGE_NUM(addr) (addr / FLASH_PAGE_SIZE) #define CUR_START_PSR(addr) (addr % FLASH_PAGE_SIZE) #define CUR_SECTOR_NUM(addr) (addr / FLASH_SECTOR_SIZE) #define CUR_SECTOR_PSR(addr) (addr % FLASH_SECTOR_SIZE) #define CUR_SECTOR_PAGE_ADDR(SECTOR_IDX, PAGE_IDX) (((SECTOR_IDX) << 12) + ((PAGE_IDX) << 8)) #define CMD_ERASE_SECURITY_REG (uint8_t)0x44 #define CMD_READ_SECURITY_REG (uint8_t)0x48 #define CMD_PROGRAM_SECURITY_REG (uint8_t)0x42 #define OTP_PROGRAM_PAGE_0 (uint8_t)0x0 #define OTP_PROGRAM_PAGE_1 (uint8_t)0x10 #define OTP_PROGRAM_PAGE_2 (uint8_t)0x20 #define OTP_PROGRAM_PAGE_3 (uint8_t)0x30 #define FLASH_2M_FLAG 0x15 #define FLASH_1M_FLAG 0x14 #define FLASH_512K_FLAG 0x13 #define FLASH_256K_FLAG 0x12 #define FLASH_128K_FLAG 0x11 #define FLASH_2M_SIZE 1024 * 2048 #define FLASH_1M_SIZE 1024 * 1024 #define FLASH_512K_SIZE 1024 * 512 #define FLASH_256K_SIZE 1024 * 256 #define FLASH_128K_SIZE 1024 * 128 #define YOUCUN_FLASH 0x60B3 #define PURAN_128K_FLASH 0x4485 #define GD25WD40_512K_FLASH 0x64C8 #define FLASH_PAGE_SIZE 256 #define FLASH_SECTOR_SIZE 4096 typedef struct board_c { uint32_t adc2v4_cail; uint32_t adc2v4_reverse_verif; uint32_t flash_id; uint32_t flash_id_reverse_verif; uint32_t ft_rest; uint32_t ft_rest_reverse_verif; uint32_t chip_cnt; uint32_t chip_cnt_reverse_verif; uint32_t rc_cail; uint32_t rc_cail_reverse_verif; } board_card_t; #endif /* _XC_DRV_DMA_H_ */