/*!
 * \file      xc_romaddr_define.h
 *
 * \brief     Target xc6xxx hal fmc spi implementation
 *
 * \copyright Revised BSD License, see section \ref LICENSE.
 *
 * \code
 *
 *            _  __ _       ________    _
 *           | |/ /(_)___  / ____/ /_  (_)___
 *           |   // / __ \/ /   / __ \/ / __ \
 *          /   |/ / / / / /___/ / / / / /_/ /
 *         /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
 *                                   /_/
 *           (C) 2022-2025 XinChip
 *
 * \endcode
 *
 * \author     ( XinChip ) Alex-J
 *
 * \author     ( XinChip )
 */

/*-----------------------------------------------------------------------------------
                                       INCLUDE HEADE FILES
 ------------------------------------------------------------------------------------*/
#include "xc6xxx.h"
#include "xc_drv_fmc_spi.h"

#if !defined(NO_SUPPORT_ROM_FMC_SPI)
#if defined(XC62XX_ROM_DRIVER_ADDR)
#define XC_FMC_STATUS_WAIT_IDLE              0x000008ab
#define XC_FMC_SPI_WRITE_NBYTE               0x000008b5
#define XC_FMC_SPI_READ_NBYTE                0x0000095b
#define XC_FMC_SPI_ENABLE                    0x000009d3
#define XC_FMC_SPI_DISABLE                   0x000009ef
#define XC_FMC_SPI_INIT_OPRT                 0x00000a07
#define XC_FMC_SPI_FLASH_POWER_DOWN          0x00000a8d
#define xc_fmc_SPI_FLASH_WAKE_UP             0x00000ab5
#define XC_FMC_SPI_FLASH_ERASE_SECTOR        0x00000b45
#define XC_FMC_SPI_FLASH_RDID                0x00000b85
#define XC_FMC_SPI_FLASH_ERASE_PAGE          0x00000bcb
#define XC_FMC_SPI_FLASH_WRITE_PAGE          0x00000c1b
#define XC_FMC_SPI_OTP_READ_PAGE             0x00000c9d
#define XC_FMC_SPI_FLASH_READ_PAGE           0x00000d2f
#define XC_FMC_SPI_FLASH_WRITE               0x00000d9d
#define XC_FMC_SPI_FLASH_READ                0x00000e5d
#define XC_FMC_SPI_FLASH_RUID                0x00000eff
#elif defined(XC6AXX_ROM_DRIVER_ADDR)
#define XC_FMC_SPI_FLASH_ERASE_SECTOR        0x00000c27
#define XC_FMC_SPI_FLASH_RDID                0x00000fbb
#define XC_FMC_SPI_FLASH_ERASE_PAGE          0x00000c67
#define XC_FMC_SPI_FLASH_WRITE_PAGE          0x00000ca7
#define XC_FMC_FAST_SPI_FLASH_WRITE_PAGE     0x00000d25
#define XC_FMC_SPI_OTP_READ_PAGE             0x00000d7d
#define XC_FMC_SPI_FLASH_READ_PAGE           0x00000e0f
#define XC_FMC_SPI_FLASH_WRITE               0x00000e7d
#define XC_FMC_SPI_FLASH_READ                0x00000ef7
#define XC_FMC_SPI_FLASH_RUID                0x00000f63
#endif
__RAM_CODE void fmc_status_wait_idle_rom(void);
__RAM_CODE void fmc_spi_write_nbyte_rom(uint8_t *txdata, uint16_t size);
__RAM_CODE void fmc_spi_read_nbyte_rom(uint8_t *rxdata, uint16_t size);
__RAM_CODE void fmc_spi_enable_rom(uint8_t dfs);
__RAM_CODE void fmc_spi_disable_rom(void);
__RAM_CODE void fmc_spi_init_oprt_rom(void);
__RAM_CODE void fmc_spi_flash_power_down_rom(void);
__RAM_CODE void fmc_spi_flash_wake_up_rom(void);
__RAM_CODE void fmc_spi_flash_erase_sector_rom(uint32_t addr);
__RAM_CODE void fmc_spi_flash_erase_page_rom(uint32_t addr);
#ifndef FAST_SPI
__RAM_CODE void fmc_spi_flash_write_page_rom(uint32_t addr, uint8_t *data, uint16_t size);
#else
__RAM_CODE void fmc_spi_flash_write_page_rom(uint32_t addr, uint8_t *data, uint16_t size);
#endif
__RAM_CODE void fmc_spi_otp_read_page_rom(uint32_t addr, uint8_t *data, uint16_t size);
__RAM_CODE void fmc_spi_flash_read_page_rom(uint32_t addr, uint8_t *data, uint16_t size);
__RAM_CODE uint8_t fmc_spi_flash_write_rom(uint32_t addr, uint8_t *buff, uint16_t size);
__RAM_CODE uint8_t fmc_spi_flash_read_rom(uint32_t addr, uint8_t *buff, uint16_t size);
__RAM_CODE void fmc_spi_flash_ruid_rom(uint8_t *ruid);
__RAM_CODE void fmc_spi_flash_rdid_rom(uint8_t *rdid);
#endif //NO_SUPPORT_ROM_FMC_SPI