#include "sleep.h"

static void system_sleep_init()
{
    uint32_t wake_it_src;
#if (USE_XIP == 1)
#if (USE_ROM_FLASH)
    FMC_SPI_Init_Oprt();
#else  // (USE_ROM_FLASH)
    xc_fmc_spi_init_oprt();
#endif // (USE_ROM_FLASH)
#endif

#if (USE_XIP != 1)
    SPI_InitCfg_t spi_cfg     = {0};
    spi_cfg.Mode              = SPI_MODE_MASTER;
    spi_cfg.DataSize          = SSI_CTRL0_DFS_LEN_8BIT;
    spi_cfg.Direction         = SSI_CTRL0_TMOD_WR;
    spi_cfg.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
    spi_cfg.CLKPolarity       = SSI_CTRL0_SCPOL_LOW;
    spi_cfg.CLKPhase          = SPI_CPHA_LEAD;
    spi_cfg.FirstBit          = SPI_FirstBit_MSB;

    xc_spi_init(XC_SPI0, &spi_cfg);
    SPI_Flash_PowerDown(XC_SPI0);
#endif
    xc_pwr_gpio_sleep_config();
    wake_it_src = RTC_IRQn_WAKE | TIMER0_IRQn_WAKE | TIMER_AO0_IRQn_WAKE | GPIO_IRQn_WAKE;
    xc_pwr_wake_it_set(wake_it_src);
}

static void system_lightsleep_cfg()
{
#if (USE_XIP != 1)
    cprao_aon_puctrl1_set(0x4); /* puctrl1= 0x4 , SSI0RX must pulldown*/
#endif
    cprao_aon_sys_time_set((RST_READY_TIME << 12) | (OSC32_STABLE_TIME));

    xc_pwr_pd_lightsleep_set();
    xc_pwr_sleepsrc_mask_set(0x1e001e);
    xc_pwr_osc_off();
}

__RAM_CODE void xc_mcu_sleep(void)
{
    xc_adc_powerdown();
    xc_pwr_usb_off();
    xc_pwr_rc16m_off();

//    xc_pwr_rom_off();
    xc_pwr_modem_off();
    xc_pwr_opa_tempsensor_off();
    xc_pwr_opa_volr_off();
    xc_pwr_revddldo_off();
    cprao_aon_reg4__bb_coreldo_normal_sw_mux__setf(0);
//    xc_pwr_bor_off();

    xc_pwr_dcdc_close();
    xc_pwr_rfdigital_off();
    xc_pwr_rc32k_calib_off();
    rtc_rccal_en_set(0x00);

    xc_pwr_pd_lightsleep_set();

#if (USE_XIP == 1)

#if (USE_ROM_FLASH)
    FMC_SPI_Flash_PowerDown();
#else  // (USE_ROM_FLASH)
    xc_fmc_spi_flash_power_down();
#endif // (USE_ROM_FLASH)
    xc_pwr_rom_off();

    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    cpr_fmc_ctl_set(0x3000 | (1 << 9)); // close FMC

    for (int i = 0; i < 10; i++) {
        __NOP();
        __NOP();
        __NOP();
    }
#endif

    __disable_irq();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();

    __WFI();

    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();

    cpr_fmc_ctl_set(0x3503);

    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();

    xc_pwr_rom_on();
    for (int i = 0; i < 10; i++) {
        __NOP();
        __NOP();
        __NOP();
    }
#if (USE_ROM_FLASH)
    FMC_SPI_Flash_WakeUp();
#else  // (USE_ROM_FLASH)
    xc_fmc_spi_flash_wake_up();
#endif // (USE_ROM_FLASH)
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    __NOP();
    xc_pwr_ao_timer_pclk32m_Set();


#ifdef USED_DCDC
    xc_pwr_dcdc_open();
#endif

    xc_pwr_modem_on();

    xc_pwr_rfdigital_on();

    xc_adc_wakeup();
    __enable_irq();
}

void sleep_init(void)
{
    xc_rc32k_calib_by_soft();
    system_sleep_init();
    system_lightsleep_cfg();
    xc_fmc_spi_init_oprt();
    xc_fmc_spi_flash_wake_up();
    cpr_slp_cnt_limit_set(1);
    NVIC_EnableIRQ(TIMER0_IRQn);
}

__RAM_CODE void enter_sleep(void)
{

#if (defined(XC62XX_RFANA2_BIT13_SET) && (CONFIG_HFCLK_IS_OSC32M_PLL_32M == 1))
    extern void rf_ana2_bit13_disable(void);
    rf_ana2_bit13_disable();
#endif // XC62XX_RFANA2_BIT13_SET && CONFIG_HFCLK_IS_OSC32M_PLL_32M==0
    xc_mcu_sleep();
#if (defined(XC62XX_RFANA2_BIT13_SET) && (CONFIG_HFCLK_IS_OSC32M_PLL_32M == 1))
    extern void rf_ana2_bit13_enable(void);
    rf_ana2_bit13_enable();
#endif // XC62XX_RFANA2_BIT13_SET && CONFIG_HFCLK_IS_OSC32M_PLL_32M==0

}


void shipmode_deepsleep_cfg()
{
#if (USE_XIP!=1)
    cprao_aon_puctrl1_set(0xf);
#endif
    cprao_aon_sys_time_set((RST_READY_TIME<<12) | (OSC32_STABLE_TIME));
    xc_pwr_pd_deepsleep_set();
    delay_us(100);
    xc_pwr_sleepsrc_mask_set(0x1e001e);
    xc_pwr_osc_off();
}


void shipmode_gpio_sleep_config(void)
{
#if (USE_XIP == 1)
    /* puctrl1= 0xf ,clk,cs,d0,d1 must pulldown */
//    cprao_aon_puctrl1_set(0xf);
    cprao_aon_puctrl1_set(0x5555F);
#else

    //    if (sleep_mode == LIGHT_SLEEP_MODE) {
    //        XC_CPR_AO->PU_CTRLx[0] = 0x4;
    //    } else if (sleep_mode == DEEP_SLEEP_MODE) {
    //        XC_CPR_AO->PU_CTRLx[0] = 0xf;
    //    }

#endif

    NVIC_DisableIRQ(GPIO_IRQn);

    GPIO_InitCfg_t gpio_cfg = {0};

    gpio_cfg.Mux            = GPIO_Mux0;
    gpio_cfg.Dir            = GPIO_DIR_INPUT;
    gpio_cfg.FunSel         = GPIO_Dx;
    gpio_cfg.Int            = NOT_INT;
    gpio_cfg.Pull           = GPIO_PULLDOWN;

    // The gpio scripts used cannot be configured. gpio36-39 cannot be
    // configured.
    for (int i = 0; i < GPIO_36; i++) {
        gpio_cfg.Pin = i;
#if defined(USE_64M_CRYSTAL)
        if (i == GPIO_18 || i == GPIO_19 || i == GPIO_2) // Default for uart0
#else
        if (i == GPIO_18 || i == GPIO_19 || i == GPIO_11)
#endif // defined(USE_64M_CRYSTAL)
        {

        } else if (i == GPIO_33 || i == GPIO_34) {
            gpio_cfg.Pull = GPIO_PULLDOWN;
            xc_gpio_init(&gpio_cfg);

        }
        else if (i == GPIO_35) {
            gpio_cfg.Pull = GPIO_PULLDOWN;
            xc_gpio_init(&gpio_cfg);
        } else if (i == GPIO_20 || i == GPIO_21) {
#if !defined(NO_SUPPORT_LFCLK_XTAL_32768)
            // Pins required when using an external 32k crystal
            if (xc_clock_lfclk_src_get() != CLOCK_LFCLK_SRC_XTAL) {
                xc_gpio_init(&gpio_cfg);
            }
#endif
        } else {
            xc_gpio_init(&gpio_cfg);
        }
    }
}

void shipmode_sleep_init()
{
    uint32_t wake_it_src;
#if (USE_XIP == 1)
#if (USE_ROM_FLASH)
    FMC_SPI_Init_Oprt();
#else  // (USE_ROM_FLASH)
    xc_fmc_spi_init_oprt();
#endif // (USE_ROM_FLASH)
#endif

#if (USE_XIP != 1)
    SPI_InitCfg_t spi_cfg = {0};
    spi_cfg.Mode                 = SPI_MODE_MASTER;
    spi_cfg.DataSize             = SSI_CTRL0_DFS_LEN_8BIT;
    spi_cfg.Direction            = SSI_CTRL0_TMOD_WR;
    spi_cfg.BaudRatePrescaler    = SPI_BAUDRATEPRESCALER_2;
    spi_cfg.CLKPolarity          = SSI_CTRL0_SCPOL_LOW;
    spi_cfg.CLKPhase             = SPI_CPHA_LEAD;
    spi_cfg.FirstBit             = SPI_FirstBit_MSB;

    xc_spi_init(XC_SPI0, &spi_cfg);
    SPI_Flash_PowerDown(XC_SPI0);
#endif
    //shipmode_gpio_sleep_config();
    wake_it_src = GPIO_IRQn_WAKE | RTC_IRQn_WAKE | MPU_IRQn_WAKE;
    xc_pwr_wake_it_set(wake_it_src);
}