Files
hpw421/component/ble/modules/flash/xc6xxx_fmc_spi.h
2026-07-03 18:08:25 +08:00

155 lines
6.4 KiB
C

/*!
* \file xc6xxx_fmc_spi.h
*
* \brief The header of xc6xxx_fmc_spi.c
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __XC6xxx_FMC_SPI_H_
#define __XC6xxx_FMC_SPI_H_
#ifdef __cplusplus
extern "C" {
#endif
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include <stdio.h>
#include <stdint.h>
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
#define __RAM_CODE __attribute__((section("ram_code")))
#define __WRITE_REG32(REG, VAL) ((*REG) = (VAL))
#define __READ_REG32(REG, VAL) ((VAL) = (*REG))
#define __SET_BIT(REG, BIT) ((REG) |= (BIT))
#define __CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
// Register Address Definition
#define CPR_BASE 0x40000000UL
#define FMC_BASE 0x51000000UL
#define BLE_COMMON_BASE 0x53022000UL
#define CPR_BT_CLK_CTL ((volatile uint32_t *)(CPR_BASE + 0x40))
#define CPR_BT_MODEM_CTL ((volatile uint32_t *)(CPR_BASE + 0x48))
#define CPR_SSI0_MCLK_CTL ((volatile uint32_t *)(CPR_BASE + 0x50))
#define CPR_CTLAPBCLKEN_GRCTL ((volatile uint32_t *)(CPR_BASE + 0x70))
#define CPR_RSTCTL_SUBRST_SW ((volatile uint32_t *)(CPR_BASE + 0x104))
#define FMC_SSI_CTRL0 ((volatile uint32_t *)(FMC_BASE + 0x00))
#define FMC_SSI_CTRL1 ((volatile uint32_t *)(FMC_BASE + 0x04))
#define FMC_SSI_EN ((volatile uint32_t *)(FMC_BASE + 0x08))
#define FMC_SSI_SE ((volatile uint32_t *)(FMC_BASE + 0x10))
#define FMC_SSI_BAUD ((volatile uint32_t *)(FMC_BASE + 0x14))
#define FMC_SSI_TXFTL ((volatile uint32_t *)(FMC_BASE + 0x18))
#define FMC_SSI_RXFTL ((volatile uint32_t *)(FMC_BASE + 0x1C))
#define FMC_SSI_TXFL ((volatile uint32_t *)(FMC_BASE + 0x20))
#define FMC_SSI_RXFL ((volatile uint32_t *)(FMC_BASE + 0x24))
#define FMC_SSI_STS ((volatile uint32_t *)(FMC_BASE + 0x28))
#define FMC_SSI_IE ((volatile uint32_t *)(FMC_BASE + 0x2C))
#define FMC_SSI_DATA ((volatile uint32_t *)(FMC_BASE + 0x60))
#define BLE_COMN_AGC_REG_OUT0 ((volatile uint32_t *)(BLE_COMMON_BASE + 0x28))
#define FMC_IDLE_Pos (31U)
#define FMC_IDLE_Msk (1UL << FMC_IDLE_Pos)
//#define FMC_IDLE_STATUS FMC_IDLE_Msk
#define FMC_SSI_STS_BUSY (1UL)
#define FMC_SSI_STS_REG_TFE_Pos (2UL)
#define FMC_SSI_STS_REG_TFE_EMPTY (1UL << FMC_SSI_STS_REG_TFE_Pos) /*!< 发送 FIFO 空. */
#define FMC_SPI_STS_REG_FLAG_TFE ((uint16_t)FMC_SSI_STS_REG_TFE_EMPTY)
#define FMC_SSI_STS_REG_RFNE_Pos (3UL) /*!< Position of RFNE field. */
#define FMC_SSI_STS_REG_RFNE_NOT_EMPTY (1UL << FMC_SSI_STS_REG_RFNE_Pos) /*!<接收 FIFO 非空 */
#define FMC_SPI_STS_REG_FLAG_RFNE ((uint16_t)FMC_SSI_STS_REG_RFNE_NOT_EMPTY)
#define CMD_ERASE_SECURITY_REG (uint8_t)0x44
#define CMD_READ_SECURITY_REG (uint8_t)0x48
#define CMD_PROGRAM_SECURITY_REG (uint8_t)0x42
#define OTP_PROGRAM_PAGE_1 (uint8_t)0x10
#define OTP_PROGRAM_PAGE_2 (uint8_t)0x20
#define OTP_PROGRAM_PAGE_3 (uint8_t)0x30
//#define CMD_READ_DATA (uint8_t)0x03
//#define CMD_READ_STATUS (uint8_t)0x05
//#define CMD_CHIP_ERASE (uint8_t)0xc7
//#define CMD_WRITE_ENABLE (uint8_t)0x06
//#define CMD_WRITE_DISABLE (uint8_t)0x04
//#define CMD_PAGE_PROGRAM (uint8_t)0x02
//#define CMD_BLOCK_ERASE (uint8_t)0xD8
//#define CMD_SECTOR_ERASE (uint8_t)0x20
//#define CMD_PAGE_ERASE (uint8_t)0x81
//#define CMD_RELEASE_PWRDWN (uint8_t)0xAB
//#define CMD_PWRDWN (uint8_t)0xB9
//#define CMD_RUID (uint8_t)0x4B
//#define CMD_RDID (uint8_t)0x9F
//#define FLASH_PAGE_SIZE 256
//#define CUR_PAGE_NUM(addr) (addr/FLASH_PAGE_SIZE)
//#define CUR_START_PSR(addr) (addr%FLASH_PAGE_SIZE)
/*------------------------------------------------------------------------------------
Inline Functions
-------------------------------------------------------------------------------------*/
__RAM_CODE static inline void __FMC_SPI_SendByte(uint32_t byte)
{
*FMC_SSI_DATA = byte;
}
__RAM_CODE static inline uint32_t __FMC_SPI_RecvByte(void)
{
return (uint32_t)(*FMC_SSI_DATA);
}
/*------------------------------------------------------------------------------------
Exported Functions
-------------------------------------------------------------------------------------*/
__RAM_CODE void FMC_SPI_Init_Oprt(void);
__RAM_CODE void FMC_SPI_Flash_PowerDown(void);
__RAM_CODE void FMC_SPI_Flash_WakeUp(void);
__RAM_CODE void FMC_SPI_Flash_Wait_Busy(void);
__RAM_CODE void FMC_SPI_Flash_Write_Enable(void);
__RAM_CODE void FMC_SPI_Flash_Erase_Sector(uint32_t Dst_Addr);
__RAM_CODE void FMC_SPI_Flash_Erase_Page(uint32_t Dst_Addr);
__RAM_CODE void FMC_SPI_Flash_WritePage(uint32_t WriteAddr, uint8_t *data, uint16_t size);
__RAM_CODE void FMC_SPI_Flash_ReadPage(uint32_t ReadAddr, uint8_t *data, uint16_t size);
__RAM_CODE uint8_t FMC_SPI_FlashWrite(uint32_t writeAddr, uint8_t *buff, uint16_t len);
__RAM_CODE uint8_t FMC_SPI_FlashRead(uint32_t readAddr, uint8_t *buff, uint16_t len);
__RAM_CODE void FMC_SPI_Flash_RUID(uint8_t *ruid);
__RAM_CODE void FMC_SPI_Flash_RDID(uint8_t *rdid);
#ifdef __cplusplus
}
#endif
#endif /* __XC6xxx_FMC_SPI_H_ */