hpw421/component/boot2/bsp/bsp_can.h

#ifndef _BSP_CAN_H_
#define _BSP_CAN_H_

#include "xinc_m0.h"

typedef struct
{
    __IO uint32_t CAN_MCLK_DIV : 12; /**/
    __IO uint32_t CAN_MCLK_EN : 1;   /**/
    __IO uint32_t CAN_PCLK_EN : 1;
    __IO uint32_t RESERVED : 18;

} CPR_CAN_CLK_CTL_T;
#define CPR_CAN_CLK_CTL ((CPR_CAN_CLK_CTL_T *)((CPR_BASE + 0x25c)))

typedef struct
{
    __IO uint32_t RM : 1;  /* Reset Mode */
    __IO uint32_t LOM : 1; /* Listen Only Mode */
    __IO uint32_t STM : 1; /* Self Test Mode */
    __IO uint32_t AFM : 1; /* Acceptance Filter Mode */
    __IO uint32_t SM : 1;  /*Sleep Mode (Can only be written in Operating Mode)*/
    __IO uint32_t RESERVED : 27;
} CAN_MOD_T;

typedef struct
{
    __IO uint32_t TR : 1;  /* Transmission Request */
    __IO uint32_t AT : 1;  /* Abort Transmission */
    __IO uint32_t RRB : 1; /* Release Receive Buffer */
    __IO uint32_t CDO : 1; /* Clear Data Overrun */
    __IO uint32_t SRR : 1; /* Self Reception Request */
    __IO uint32_t RESERVED : 27;
} CAN_CMR_T;

typedef struct
{
    __IO uint32_t RBS : 1; /*Receive Buffer Status*/
    __IO uint32_t DOS : 1; /*Data Overrun Status*/
    __IO uint32_t TBS : 1; /*Transmit Buffer Status*/
    __IO uint32_t TCS : 1; /*Transmission Complete Status*/
    __IO uint32_t RS : 1;  /*Receive Status */
    __IO uint32_t TS : 1;  /*Transmit Status */
    __IO uint32_t ES : 1;  /*Error Status*/
    __IO uint32_t BS : 1;  /*Bus Status*/
    __IO uint32_t RESERVED : 24;
} CAN_SR_T;
typedef struct
{
    __IO uint32_t RI : 1;  /*Receive Interrupt*/
    __IO uint32_t TI : 1;  /*Transmit Interrupt*/
    __IO uint32_t EI : 1;  /*Error Warning Interrupt*/
    __IO uint32_t DOI : 1; /*Data Overrun Interrupt*/
    __IO uint32_t WUI : 1; /*Wake-Up Interrupt*/
    __IO uint32_t EPI : 1; /*Error Passive Interrupt */
    __IO uint32_t ALI : 1; /*Arbitration Lost Interrupt*/
    __IO uint32_t BEI : 1; /*Bus Error Interrupt*/
    __IO uint32_t RESERVED : 24;
} CAN_IR_T;
typedef struct
{
    __IO uint32_t RIE : 1;  /*Receive Interrupt Enable*/
    __IO uint32_t TIE : 1;  /*Transmit Interrupt Enable*/
    __IO uint32_t EIE : 1;  /*Error Warning Interrupt Enable*/
    __IO uint32_t DOIE : 1; /*Data Overrun Interrupt Enable*/
    __IO uint32_t WUIE : 1; /*Wake-Up Interrupt Enable*/
    __IO uint32_t EPIE : 1; /*Error Passive Interrupt Enable*/
    __IO uint32_t ALIE : 1; /*Arbitration Lost Interrupt Enable*/
    __IO uint32_t BEIE : 1; /*Bus Error Interrupt Enable*/
    __IO uint32_t RESERVED : 24;
} CAN_IER_T;
typedef struct
{
    __IO uint32_t BRP : 6; /**/
    __IO uint32_t SJW : 2; /**/
    __IO uint32_t RESERVED : 24;
} CAN_BTR0_T;
typedef struct
{
    __IO uint32_t TSEG1 : 4; /**/
    __IO uint32_t TSEG2 : 3; /**/
    __IO uint32_t SAM : 1;   /**/
    __IO uint32_t RESERVED : 24;
} CAN_BTR1_T;
typedef struct
{

    __IO uint32_t OCMODE : 2; /**/
    __IO uint32_t RESERVED : 30;
} CAN_OCR_T;
typedef struct
{

    __IO uint32_t ALC : 5; /**/
    __IO uint32_t RESERVED : 27;
} CAN_ALC_T;
typedef struct
{
    __IO uint32_t SegmentCode : 5; /**/
    __IO uint32_t Direction : 1;   /**/
    __IO uint32_t ErrorCode : 2;   /**/
    __IO uint32_t RESERVED : 24;
} CAN_ECC_T;
typedef struct
{

    __IO uint32_t EWL : 8; /**/
    __IO uint32_t RESERVED : 24;

} CAN_EWLR_T;
typedef struct
{

    __IO uint32_t RCNT : 8; /**/
    __IO uint32_t RESERVED : 24;

} CAN_RXERR_T;
typedef struct
{

    __IO uint32_t TCNT : 8; /**/
    __IO uint32_t RESERVED : 24;

} CAN_TXERR_T;

typedef struct
{

    __IO uint32_t RIE : 5; /**/
    __IO uint32_t RESERVED : 27;

} CAN_RMC_T;

typedef struct
{

    __IO uint32_t RBSA : 6; /**/
    __IO uint32_t RESERVED : 26;

} CAN_RBSA_T;
typedef struct
{
    __IO uint32_t CDR3 : 3;     /**/
    __IO uint32_t ClockOff : 1; /**/
    __IO uint32_t CDR4 : 4;     /**/
    __IO uint32_t RESERVED : 24;

} CAN_CDR_T;
#define CAN_REG_BASE 0x40011c00
#define CAN_MOD ((CAN_MOD_T *)((CAN_REG_BASE + (0x00 * 4))))
#define CAN_CMR ((CAN_CMR_T *)((CAN_REG_BASE + (0x01 * 4))))
#define CAN_SR ((CAN_SR_T *)((CAN_REG_BASE + (0x02 * 4))))
#define CAN_IR ((CAN_IR_T *)((CAN_REG_BASE + (0x03 * 4))))
#define CAN_IER ((CAN_IER_T *)((CAN_REG_BASE + (0x04 * 4))))
#define CAN_BTR0 ((CAN_BTR0_T *)((CAN_REG_BASE + (0x06 * 4))))
#define CAN_BTR1 ((CAN_BTR1_T *)((CAN_REG_BASE + (0x07 * 4))))
#define CAN_OCR ((CAN_OCR_T *)((CAN_REG_BASE + (0x08 * 4))))
#define CAN_ALC ((CAN_ALC_T *)((CAN_REG_BASE + (0x0B * 4))))
#define CAN_ECC ((CAN_ECC_T *)((CAN_REG_BASE + (0x0C * 4))))
#define CAN_EWLR ((CAN_EWLR_T *)((CAN_REG_BASE + (0x0D * 4))))
#define CAN_RXERR ((CAN_RXERR_T *)((CAN_REG_BASE + (0x0E * 4))))
#define CAN_TXERR ((CAN_TXERR_T *)((CAN_REG_BASE + (0x0F * 4))))
#define CAN_RMC ((CAN_RMC_T *)((CAN_REG_BASE + (0x1D * 4))))
#define CAN_RBSA ((CAN_RBSA_T *)((CAN_REG_BASE + (0x1E * 4))))
#define CAN_CDR ((CAN_CDR_T *)((CAN_REG_BASE + (0x1f * 4))))

// standard frame format  , extended frame format
#define CAN_FI ((volatile unsigned *)((CAN_REG_BASE + (0x10 * 4))))
#define CAN_ID1 ((volatile unsigned *)((CAN_REG_BASE + (0x11 * 4))))
#define CAN_ID2 ((volatile unsigned *)((CAN_REG_BASE + (0x12 * 4))))
#define CAN_ID3 ((volatile unsigned *)((CAN_REG_BASE + (0x13 * 4))))
#define CAN_ID4 ((volatile unsigned *)((CAN_REG_BASE + (0x14 * 4))))

#define CAN_ACR0 (((volatile unsigned *)(CAN_REG_BASE + (0x10 * 4))))
#define CAN_ACR1 (((volatile unsigned *)(CAN_REG_BASE + (0x11 * 4))))
#define CAN_ACR2 (((volatile unsigned *)(CAN_REG_BASE + (0x12 * 4))))
#define CAN_ACR3 (((volatile unsigned *)(CAN_REG_BASE + (0x13 * 4))))
#define CAN_AMR0 (((volatile unsigned *)(CAN_REG_BASE + (0x14 * 4))))
#define CAN_AMR1 (((volatile unsigned *)(CAN_REG_BASE + (0x15 * 4))))
#define CAN_AMR2 (((volatile unsigned *)(CAN_REG_BASE + (0x16 * 4))))
#define CAN_AMR3 (((volatile unsigned *)(CAN_REG_BASE + (0x17 * 4))))

#define CAN_TX_TFI_FIFO ((volatile unsigned *)(CAN_REG_BASE + (0x60 * 4)))
#define CAN_TX_ID1_FIFO ((volatile unsigned *)(CAN_REG_BASE + (0x61 * 4)))
#define CAN_TX_ID2_FIFO ((volatile unsigned *)(CAN_REG_BASE + (0x62 * 4)))
#define CAN_TX_DATA_FIFO(a) ((volatile unsigned *)(CAN_REG_BASE + ((0x63 + a) * 4)))
#define CAN_TX_BUFF(a) ((volatile unsigned *)(CAN_REG_BASE + ((0x13 + a) * 4)))
#define CAN_RX_BUFF(a) ((volatile unsigned *)(CAN_REG_BASE + ((0x13 + a) * 4)))

#endif