xushaoxiang
169 lines
4.4 KiB
C
169 lines
4.4 KiB
C
/*!
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* \file pwr.c
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*
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* \brief Target pwr implementation
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*
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* \copyright Revised BSD License, see section \ref LICENSE.
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*
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* \code
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*
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* _ __ _ ________ _
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* | |/ /(_)___ / ____/ /_ (_)___
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* | // / __ \/ / / __ \/ / __ \
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* / |/ / / / / /___/ / / / / /_/ /
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* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
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* /_/
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* (C) 2022-2025 XinChip
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*
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* \endcode
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*
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* \author ( XinChip ) Alex-J
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*
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* \author ( XinChip )
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*/
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/*-----------------------------------------------------------------------------------
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INCLUDE HEADE FILES
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------------------------------------------------------------------------------------*/
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#include "pwr.h"
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#include "xc6xxx_hal_pwr.h"
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/*------------------------------------------------------------------------------------
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Macros
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-------------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------------
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Global Variables
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-------------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------------
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Functions
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-------------------------------------------------------------------------------------*/
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/**
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* @brief pwr_demo
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* @details
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* @param void
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* @retval void
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*/
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void wakeup_timer_set(uint32_t time) {
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XC_CPR_AO->ALWAYS_ON_REG1 &= (~(1 << 19)); // deep sleep set
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TIMER_BaseInitTypeDef Timer_Init;
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Timer_Init.src_clk = TIMER_CLK_SRC_32K;
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Timer_Init.mode = TIMER_MODE_SINGLE_COUNT;
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Timer_Init.div_clk = TIMER_DIV_CLK_32000Hz;
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// Timer0 Config & Start
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TIMER_Base_Init(XC_AOTIMER0, &Timer_Init);
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TIMER_SetUs(XC_AOTIMER0, time);
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TIMER_Start_IT(XC_AOTIMER0);
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}
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void system_sleep_init() {
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uint32_t WakeITSrc;
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#if (USE_XIP == 1)
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FMC_SPI_Init();
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#endif //(USE_XIP == 1)
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// PWR_InitTypeDef PWR_InitStruct = {0};
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#if (USE_XIP != 1)
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SPI_InitCfg_t spi_cfg = {0};
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spi_cfg.Mode = SPI_MODE_MASTER;
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spi_cfg.DataSize = SSI_CTRL0_DFS_LEN_8BIT;
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spi_cfg.Direction = SSI_CTRL0_TMOD_WR;
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spi_cfg.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
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spi_cfg.CLKPolarity = SSI_CTRL0_SCPOL_LOW;
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spi_cfg.CLKPhase = SPI_CPHA_LEAD;
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spi_cfg.FirstBit = SPI_FirstBit_MSB;
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xc_spi_init(XC_SPI0, &spi_cfg);
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SPI_Flash_PowerDown(XC_SPI0);
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#endif //(USE_XIP!=1)
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GPIO_SleepConfig();
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WakeITSrc =
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GPIO_IRQn_WAKE | RTC_IRQn_WAKE | TIMER_AO0_IRQn_WAKE | TIMER0_IRQn_WAKE;
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__PWR_WakeIT_Set(WakeITSrc);
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}
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void system_lightsleep_cfg() {
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#if (USE_XIP != 1)
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cprao_aon_puctrl1_set(0x4);
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// XC_CPR_AO->PU_CTRLx[0] = 0x4; // 0x4; /* puctrl1= 0x4 , SSI0RX must
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// pulldown*/
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#endif //(USE_XIP!=1)
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XC_CPR_AO->SYS_TIME = (RST_READY_TIME << 12) | (OSC32_STABLE_TIME);
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__PWR_PD_LightSleep_Set();
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__PWR_SleepSrcMask_Set(0x1e001e);
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__PWR_OSC_Off();
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}
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void system_deepsleep_cfg() {
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#if (USE_XIP != 1)
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XC_CPR_AO->PU_CTRLx[0] = 0xf; // 0xF;
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#endif //(USE_XIP!=1)
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XC_CPR_AO->SYS_TIME = (RST_READY_TIME << 12) | (OSC32_STABLE_TIME);
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__PWR_PD_DeepSleep_Set();
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Delay_Us(100);
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__PWR_SleepSrcMask_Set(0x1e001e);
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__PWR_OSC_Off();
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}
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void Sleep_Demo() {
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system_sleep_init();
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PWR_GPIO_LightSleepWakeConfig(GPIO_3, RIS_EDGE_INT);
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PWR_GPIO_LightSleepWakeConfig(GPIO_2, FAIL_EDGE_INT);
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system_lightsleep_cfg();
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while (1) {
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Sleep();
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DEBUG("wakeup\n");
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}
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}
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void DeepSleep_Demo() {
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system_sleep_init();
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// PWRKEY Initialization is required after deep sleep wakeup
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PWR_PWRKEY_Init();
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PWR_PWRKEY_DeepSleepWakeConfig(GPIO_2, DEEP_SLEEP_GPIO_WAKE_HIGH_LEVEL);
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PWR_PWRKEY_DeepSleepWakeConfig(GPIO_3, DEEP_SLEEP_GPIO_WAKE_LOW_LEVEL);
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system_deepsleep_cfg();
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while (1) {
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DeepSleep();
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}
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}
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void DeepSleep_Timerwakeup_Demo() {
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system_sleep_init();
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// PWRKEY Initialization is required after deep sleep wakeup
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PWR_PWRKEY_Init();
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system_deepsleep_cfg();
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while (1) {
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wakeup_timer_set(100 * 1000);
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DeepSleep();
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}
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}
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#define SLEEP_DEMO 1
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#define DEEPSLEEP_DEMO 0
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#define DEEPSLEEP_TIMERWAKEUP_DEMO 0
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void pwr_demo() {
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#if SLEEP_DEMO
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Sleep_Demo();
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#endif
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#if DEEPSLEEP_DEMO
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DeepSleep_Demo();
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#endif
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#if DEEPSLEEP_TIMERWAKEUP_DEMO
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DeepSleep_Timerwakeup_Demo();
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#endif
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}
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