xushaoxiang
3844 lines
224 KiB
Plaintext
3844 lines
224 KiB
Plaintext
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========================================================================
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** ELF Header Information
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File Name: .\Objects\peripheral.axf
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Machine class: ELFCLASS32 (32-bit)
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Data encoding: ELFDATA2LSB (Little endian)
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Header version: EV_CURRENT (Current version)
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Operating System ABI: none
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ABI Version: 0
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File Type: ET_EXEC (Executable) (2)
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Machine: EM_ARM (ARM)
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Image Entry point: 0x100000c1
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Flags: EF_ARM_HASENTRY + EF_ARM_ABI_FLOAT_SOFT (0x05000202)
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ARM ELF revision: 5 (ABI version 2)
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Conforms to Soft float procedure-call standard
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Built with
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Component: ARM Compiler 5.06 update 6 (build 750) Tool: armasm [4d35ec]
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Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed]
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Header size: 52 bytes (0x34)
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Program header entry size: 32 bytes (0x20)
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Section header entry size: 40 bytes (0x28)
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Program header entries: 1
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Section header entries: 16
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Program header offset: 174896 (0x0002ab30)
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Section header offset: 174928 (0x0002ab50)
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Section header string table index: 15
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========================================================================
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** Program header #0 (PT_LOAD) [PF_X + PF_W + PF_R + PF_ARM_ENTRY]
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Size : 10480 bytes (7052 bytes in file)
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Virtual address: 0x10000000 (Alignment 8)
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========================================================================
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** Section #1 'EXE' (SHT_PROGBITS) [SHF_ALLOC + SHF_EXECINSTR]
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Size : 7036 bytes (alignment 4)
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Address: 0x10000000
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$d.realdata
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RESET
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__Vectors
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0x10000000: 100028f0 .(.. DCD 268445936
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0x10000004: 10000159 Y... DCD 268435801
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0x10000008: 10000167 g... DCD 268435815
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0x1000000c: 10000169 i... DCD 268435817
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0x10000010: 1000016b k... DCD 268435819
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0x10000014: 1000016d m... DCD 268435821
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0x10000018: 1000016f o... DCD 268435823
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0x1000001c: 00000000 .... DCD 0
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0x10000020: 00000000 .... DCD 0
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0x10000024: 00000000 .... DCD 0
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0x10000028: 00000000 .... DCD 0
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0x1000002c: 10000171 q... DCD 268435825
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0x10000030: 10000173 s... DCD 268435827
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0x10000034: 00000000 .... DCD 0
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0x10000038: 10000175 u... DCD 268435829
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0x1000003c: 10001923 #... DCD 268441891
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0x10000040: 00000000 .... DCD 0
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0x10000044: 10000175 u... DCD 268435829
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0x10000048: 10000175 u... DCD 268435829
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0x1000004c: 1000192d -... DCD 268441901
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0x10000050: 10000175 u... DCD 268435829
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0x10000054: 10000175 u... DCD 268435829
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0x10000058: 10000175 u... DCD 268435829
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0x1000005c: 10000175 u... DCD 268435829
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0x10000060: 10000175 u... DCD 268435829
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0x10000064: 10000175 u... DCD 268435829
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0x10000068: 10000175 u... DCD 268435829
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0x1000006c: 10000585 .... DCD 268436869
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0x10000070: 1000058f .... DCD 268436879
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0x10000074: 10000175 u... DCD 268435829
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0x10000078: 10000175 u... DCD 268435829
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0x1000007c: 00000000 .... DCD 0
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0x10000080: 00000000 .... DCD 0
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0x10000084: 10000175 u... DCD 268435829
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0x10000088: 00000000 .... DCD 0
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0x1000008c: 00000000 .... DCD 0
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0x10000090: 00000000 .... DCD 0
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0x10000094: 00000000 .... DCD 0
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0x10000098: 10001b0d .... DCD 268442381
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0x1000009c: 10000175 u... DCD 268435829
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0x100000a0: 10000175 u... DCD 268435829
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0x100000a4: 00000000 .... DCD 0
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0x100000a8: 00000000 .... DCD 0
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0x100000ac: 10000175 u... DCD 268435829
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0x100000b0: 10000175 u... DCD 268435829
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0x100000b4: 10000175 u... DCD 268435829
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0x100000b8: 10000175 u... DCD 268435829
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0x100000bc: 10000175 u... DCD 268435829
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$t
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!!!main
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__Vectors_End
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__main
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0x100000c0: f000f802 .... BL __scatterload ; 0x100000c8
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0x100000c4: f000f838 ..8. BL __rt_entry ; 0x10000138
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!!!scatter
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__scatterload
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__scatterload_rt2
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__scatterload_rt2_thumb_only
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0x100000c8: a00c .. ADR r0,{pc}+0x34 ; 0x100000fc
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0x100000ca: c830 0. LDM r0!,{r4,r5}
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0x100000cc: 3808 .8 SUBS r0,r0,#8
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0x100000ce: 1824 $. ADDS r4,r4,r0
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0x100000d0: 182d -. ADDS r5,r5,r0
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0x100000d2: 46a2 .F MOV r10,r4
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0x100000d4: 1e67 g. SUBS r7,r4,#1
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0x100000d6: 46ab .F MOV r11,r5
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__scatterload_null
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0x100000d8: 4654 TF MOV r4,r10
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0x100000da: 465d ]F MOV r5,r11
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0x100000dc: 42ac .B CMP r4,r5
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0x100000de: d101 .. BNE 0x100000e4 ; __scatterload_null + 12
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0x100000e0: f000f82a ..*. BL __rt_entry ; 0x10000138
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0x100000e4: 467e ~F MOV r6,pc
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0x100000e6: 3e0f .> SUBS r6,r6,#0xf
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0x100000e8: cc0f .. LDM r4!,{r0-r3}
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0x100000ea: 46b6 .F MOV lr,r6
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0x100000ec: 2601 .& MOVS r6,#1
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0x100000ee: 4233 3B TST r3,r6
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0x100000f0: d000 .. BEQ 0x100000f4 ; __scatterload_null + 28
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0x100000f2: 1afb .. SUBS r3,r7,r3
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0x100000f4: 46a2 .F MOV r10,r4
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0x100000f6: 46ab .F MOV r11,r5
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0x100000f8: 4333 3C ORRS r3,r3,r6
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0x100000fa: 4718 .G BX r3
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$d
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0x100000fc: 00001a70 p... DCD 6768
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0x10000100: 00001a80 .... DCD 6784
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$t
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!!handler_zi
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__scatterload_zeroinit
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0x10000104: 2300 .# MOVS r3,#0
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0x10000106: 2400 .$ MOVS r4,#0
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0x10000108: 2500 .% MOVS r5,#0
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0x1000010a: 2600 .& MOVS r6,#0
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0x1000010c: 3a10 .: SUBS r2,r2,#0x10
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0x1000010e: d301 .. BCC 0x10000114 ; __scatterload_zeroinit + 16
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0x10000110: c178 x. STM r1!,{r3-r6}
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0x10000112: d8fb .. BHI 0x1000010c ; __scatterload_zeroinit + 8
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0x10000114: 0752 R. LSLS r2,r2,#29
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0x10000116: d300 .. BCC 0x1000011a ; __scatterload_zeroinit + 22
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0x10000118: c130 0. STM r1!,{r4,r5}
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0x1000011a: d500 .. BPL 0x1000011e ; __scatterload_zeroinit + 26
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0x1000011c: 600b .` STR r3,[r1,#0]
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0x1000011e: 4770 pG BX lr
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.ARM.Collect$$_printf_percent$$00000000
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_printf_percent
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0x10000120: b510 .. PUSH {r4,lr}
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.ARM.Collect$$_printf_percent$$00000009
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_printf_d
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0x10000122: 2964 d) CMP r1,#0x64
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0x10000124: d102 .. BNE _printf_percent_end ; 0x1000012c
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0x10000126: f000f87f .... BL _printf_int_dec ; 0x10000228
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0x1000012a: bd10 .. POP {r4,pc}
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.ARM.Collect$$_printf_percent$$00000017
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_printf_percent_end
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0x1000012c: 2000 . MOVS r0,#0
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0x1000012e: bd10 .. POP {r4,pc}
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.ARM.Collect$$libinit$$00000000
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__rt_lib_init
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0x10000130: b51f .. PUSH {r0-r4,lr}
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.ARM.Collect$$libinit$$00000002
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.ARM.Collect$$libinit$$00000004
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.ARM.Collect$$libinit$$0000000A
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.ARM.Collect$$libinit$$0000000C
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.ARM.Collect$$libinit$$0000000E
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.ARM.Collect$$libinit$$00000011
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.ARM.Collect$$libinit$$00000013
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.ARM.Collect$$libinit$$00000015
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.ARM.Collect$$libinit$$00000017
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.ARM.Collect$$libinit$$00000019
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.ARM.Collect$$libinit$$0000001B
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.ARM.Collect$$libinit$$0000001D
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.ARM.Collect$$libinit$$0000001F
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.ARM.Collect$$libinit$$00000021
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.ARM.Collect$$libinit$$00000023
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.ARM.Collect$$libinit$$00000025
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.ARM.Collect$$libinit$$0000002C
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.ARM.Collect$$libinit$$0000002E
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.ARM.Collect$$libinit$$00000030
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.ARM.Collect$$libinit$$00000032
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.ARM.Collect$$libinit$$00000033
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__rt_lib_init_alloca_1
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__rt_lib_init_argv_1
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__rt_lib_init_atexit_1
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__rt_lib_init_clock_1
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__rt_lib_init_cpp_1
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__rt_lib_init_exceptions_1
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__rt_lib_init_fp_1
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__rt_lib_init_fp_trap_1
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__rt_lib_init_getenv_1
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__rt_lib_init_heap_1
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__rt_lib_init_lc_collate_1
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__rt_lib_init_lc_ctype_1
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__rt_lib_init_lc_monetary_1
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__rt_lib_init_lc_numeric_1
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__rt_lib_init_lc_time_1
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__rt_lib_init_preinit_1
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__rt_lib_init_rand_1
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__rt_lib_init_return
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__rt_lib_init_signal_1
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__rt_lib_init_stdio_1
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__rt_lib_init_user_alloc_1
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0x10000132: bd1f .. POP {r0-r4,pc}
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.ARM.Collect$$libshutdown$$00000000
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__rt_lib_shutdown
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0x10000134: b510 .. PUSH {r4,lr}
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.ARM.Collect$$libshutdown$$00000002
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.ARM.Collect$$libshutdown$$00000004
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.ARM.Collect$$libshutdown$$00000007
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.ARM.Collect$$libshutdown$$0000000A
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.ARM.Collect$$libshutdown$$0000000C
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.ARM.Collect$$libshutdown$$0000000F
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.ARM.Collect$$libshutdown$$00000010
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__rt_lib_shutdown_cpp_1
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__rt_lib_shutdown_fp_trap_1
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__rt_lib_shutdown_heap_1
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__rt_lib_shutdown_return
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__rt_lib_shutdown_signal_1
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__rt_lib_shutdown_stdio_1
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__rt_lib_shutdown_user_alloc_1
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0x10000136: bd10 .. POP {r4,pc}
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.ARM.Collect$$rtentry$$00000000
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.ARM.Collect$$rtentry$$00000002
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.ARM.Collect$$rtentry$$00000004
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__rt_entry
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__rt_entry_presh_1
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__rt_entry_sh
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0x10000138: f000f9f4 .... BL __user_setup_stackheap ; 0x10000524
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0x1000013c: 4611 .F MOV r1,r2
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.ARM.Collect$$rtentry$$00000009
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.ARM.Collect$$rtentry$$0000000A
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__rt_entry_li
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__rt_entry_postsh_1
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0x1000013e: f7fffff7 .... BL __rt_lib_init ; 0x10000130
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.ARM.Collect$$rtentry$$0000000C
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.ARM.Collect$$rtentry$$0000000D
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__rt_entry_main
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__rt_entry_postli_1
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0x10000142: f000fb59 ..Y. BL main ; 0x100007f8
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0x10000146: f000fa0c .... BL exit ; 0x10000562
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.ARM.Collect$$rtexit$$00000000
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__rt_exit
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0x1000014a: b403 .. PUSH {r0,r1}
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.ARM.Collect$$rtexit$$00000002
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.ARM.Collect$$rtexit$$00000003
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__rt_exit_ls
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__rt_exit_prels_1
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0x1000014c: f7fffff2 .... BL __rt_lib_shutdown ; 0x10000134
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.ARM.Collect$$rtexit$$00000004
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__rt_exit_exit
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0x10000150: bc03 .. POP {r0,r1}
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0x10000152: f000fa63 ..c. BL _sys_exit ; 0x1000061c
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0x10000156: 0000 .. MOVS r0,r0
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.text
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Reset_Handler
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0x10000158: 480a .H LDR r0,[pc,#40] ; [0x10000184] = 0x4000013c
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0x1000015a: 490b .I LDR r1,[pc,#44] ; [0x10000188] = 0x10000001
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0x1000015c: 6001 .` STR r1,[r0,#0]
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0x1000015e: 480b .H LDR r0,[pc,#44] ; [0x1000018c] = 0x1000057d
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0x10000160: 4780 .G BLX r0
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0x10000162: 480b .H LDR r0,[pc,#44] ; [0x10000190] = 0x100000c1
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0x10000164: 4700 .G BX r0
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NMI_Handler
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0x10000166: e7fe .. B NMI_Handler ; 0x10000166
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HardFault_Handler
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0x10000168: e7fe .. B HardFault_Handler ; 0x10000168
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MemManage_Handler
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0x1000016a: e7fe .. B MemManage_Handler ; 0x1000016a
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BusFault_Handler
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0x1000016c: e7fe .. B BusFault_Handler ; 0x1000016c
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UsageFault_Handler
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0x1000016e: e7fe .. B UsageFault_Handler ; 0x1000016e
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SVC_Handler
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0x10000170: e7fe .. B SVC_Handler ; 0x10000170
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DebugMon_Handler
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0x10000172: e7fe .. B DebugMon_Handler ; 0x10000172
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AOTIMER0_Handler
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AOTIMER1_Handler
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BOR_Handler
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CAN_Handler
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CMP_Handler
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CPR_Handler
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DMAS_Handler
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FMC_Handler
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GADC_Handler
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I2C_Handler
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PWM_Handler
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PendSV_Handler
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RTC_Handler
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SPI0_Handler
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SPI1_Handler
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TIMER0_Handler
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TIMER1_Handler
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TIMER2_Handler
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TIMER3_Handler
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WDT_Handler
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0x10000174: e7fe .. B AOTIMER0_Handler ; 0x10000174
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$d
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0x10000176: 0000 .. DCW 0
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$t
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__user_initial_stackheap
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0x10000178: 4806 .H LDR r0,[pc,#24] ; [0x10000194] = 0x100022f0
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0x1000017a: 4907 .I LDR r1,[pc,#28] ; [0x10000198] = 0x100028f0
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0x1000017c: 4a05 .J LDR r2,[pc,#20] ; [0x10000194] = 0x100022f0
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0x1000017e: 4b07 .K LDR r3,[pc,#28] ; [0x1000019c] = 0x100022f0
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0x10000180: 4770 pG BX lr
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$d
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0x10000182: 0000 .. DCW 0
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0x10000184: 4000013c <..@ DCD 1073742140
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0x10000188: 10000001 .... DCD 268435457
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0x1000018c: 1000057d }... DCD 268436861
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0x10000190: 100000c1 .... DCD 268435649
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0x10000194: 100022f0 .".. DCD 268444400
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0x10000198: 100028f0 .(.. DCD 268445936
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0x1000019c: 100022f0 .".. DCD 268444400
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$t
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.text
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__2printf
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0x100001a0: b40f .. PUSH {r0-r3}
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0x100001a2: 4905 .I LDR r1,[pc,#20] ; [0x100001b8] = 0x10001b7c
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0x100001a4: b510 .. PUSH {r4,lr}
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0x100001a6: aa03 .. ADD r2,sp,#0xc
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0x100001a8: 9802 .. LDR r0,[sp,#8]
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0x100001aa: f000f97b ..{. BL _printf_char_file ; 0x100004a4
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0x100001ae: bc10 .. POP {r4}
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0x100001b0: bc08 .. POP {r3}
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0x100001b2: b004 .. ADD sp,sp,#0x10
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0x100001b4: 4718 .G BX r3
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$d
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0x100001b6: 0000 .. DCW 0
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0x100001b8: 10001b7c |... DCD 268442492
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$t
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.text
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__printf
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0x100001bc: b5f8 .. PUSH {r3-r7,lr}
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0x100001be: 460e .F MOV r6,r1
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0x100001c0: 4604 .F MOV r4,r0
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0x100001c2: 2000 . MOVS r0,#0
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0x100001c4: 6220 b STR r0,[r4,#0x20]
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0x100001c6: 4620 F MOV r0,r4
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0x100001c8: 68e1 .h LDR r1,[r4,#0xc]
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0x100001ca: 4788 .G BLX r1
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0x100001cc: 2800 .( CMP r0,#0
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0x100001ce: d029 ). BEQ 0x10000224 ; __printf + 104
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0x100001d0: 2825 %( CMP r0,#0x25
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0x100001d2: d002 .. BEQ 0x100001da ; __printf + 30
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0x100001d4: 6862 bh LDR r2,[r4,#4]
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0x100001d6: 68a1 .h LDR r1,[r4,#8]
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0x100001d8: e020 . B 0x1000021c ; __printf + 96
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0x100001da: 68e1 .h LDR r1,[r4,#0xc]
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0x100001dc: 4620 F MOV r0,r4
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0x100001de: 2700 .' MOVS r7,#0
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0x100001e0: 4788 .G BLX r1
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0x100001e2: 0005 .. MOVS r5,r0
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0x100001e4: d01e .. BEQ 0x10000224 ; __printf + 104
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0x100001e6: 4628 (F MOV r0,r5
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0x100001e8: 3841 A8 SUBS r0,r0,#0x41
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0x100001ea: 2819 .( CMP r0,#0x19
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0x100001ec: d802 .. BHI 0x100001f4 ; __printf + 56
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0x100001ee: 2701 .' MOVS r7,#1
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0x100001f0: 02ff .. LSLS r7,r7,#11
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0x100001f2: 3520 5 ADDS r5,r5,#0x20
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0x100001f4: 4632 2F MOV r2,r6
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0x100001f6: 4620 F MOV r0,r4
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0x100001f8: 6027 '` STR r7,[r4,#0]
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0x100001fa: 4629 )F MOV r1,r5
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0x100001fc: f7ffff90 .... BL _printf_percent ; 0x10000120
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0x10000200: 2800 .( CMP r0,#0
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0x10000202: d008 .. BEQ 0x10000216 ; __printf + 90
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0x10000204: 2801 .( CMP r0,#1
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0x10000206: d004 .. BEQ 0x10000212 ; __printf + 86
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0x10000208: 1df6 .. ADDS r6,r6,#7
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0x1000020a: 08f6 .. LSRS r6,r6,#3
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0x1000020c: 00f6 .. LSLS r6,r6,#3
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0x1000020e: 3608 .6 ADDS r6,r6,#8
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0x10000210: e7d9 .. B 0x100001c6 ; __printf + 10
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0x10000212: 1d36 6. ADDS r6,r6,#4
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0x10000214: e7d7 .. B 0x100001c6 ; __printf + 10
|
|
0x10000216: 6862 bh LDR r2,[r4,#4]
|
|
0x10000218: 4628 (F MOV r0,r5
|
|
0x1000021a: 68a1 .h LDR r1,[r4,#8]
|
|
0x1000021c: 4790 .G BLX r2
|
|
0x1000021e: 6a20 j LDR r0,[r4,#0x20]
|
|
0x10000220: 1c40 @. ADDS r0,r0,#1
|
|
0x10000222: e7cf .. B 0x100001c4 ; __printf + 8
|
|
0x10000224: 6a20 j LDR r0,[r4,#0x20]
|
|
0x10000226: bdf8 .. POP {r3-r7,pc}
|
|
.text
|
|
_printf_int_dec
|
|
0x10000228: b5f7 .. PUSH {r0-r2,r4-r7,lr}
|
|
0x1000022a: 2500 .% MOVS r5,#0
|
|
0x1000022c: 2975 u) CMP r1,#0x75
|
|
0x1000022e: 6810 .h LDR r0,[r2,#0]
|
|
0x10000230: 9900 .. LDR r1,[sp,#0]
|
|
0x10000232: a614 .. ADR r6,{pc}+0x52 ; 0x10000284
|
|
0x10000234: d011 .. BEQ 0x1000025a ; _printf_int_dec + 50
|
|
0x10000236: 46c0 .F MOV r8,r8
|
|
0x10000238: 46c0 .F MOV r8,r8
|
|
0x1000023a: 2800 .( CMP r0,#0
|
|
0x1000023c: da02 .. BGE 0x10000244 ; _printf_int_dec + 28
|
|
0x1000023e: 4240 @B RSBS r0,r0,#0
|
|
0x10000240: a611 .. ADR r6,{pc}+0x48 ; 0x10000288
|
|
0x10000242: e008 .. B 0x10000256 ; _printf_int_dec + 46
|
|
0x10000244: 9900 .. LDR r1,[sp,#0]
|
|
0x10000246: 6809 .h LDR r1,[r1,#0]
|
|
0x10000248: 078a .. LSLS r2,r1,#30
|
|
0x1000024a: d501 .. BPL 0x10000250 ; _printf_int_dec + 40
|
|
0x1000024c: a60f .. ADR r6,{pc}+0x40 ; 0x1000028c
|
|
0x1000024e: e002 .. B 0x10000256 ; _printf_int_dec + 46
|
|
0x10000250: 0749 I. LSLS r1,r1,#29
|
|
0x10000252: d504 .. BPL 0x1000025e ; _printf_int_dec + 54
|
|
0x10000254: a60e .. ADR r6,{pc}+0x3c ; 0x10000290
|
|
0x10000256: 2501 .% MOVS r5,#1
|
|
0x10000258: e001 .. B 0x1000025e ; _printf_int_dec + 54
|
|
0x1000025a: 46c0 .F MOV r8,r8
|
|
0x1000025c: 46c0 .F MOV r8,r8
|
|
0x1000025e: 9f00 .. LDR r7,[sp,#0]
|
|
0x10000260: 2400 .$ MOVS r4,#0
|
|
0x10000262: 3724 $7 ADDS r7,r7,#0x24
|
|
0x10000264: e004 .. B 0x10000270 ; _printf_int_dec + 72
|
|
0x10000266: f000f931 ..1. BL __rt_udiv10 ; 0x100004cc
|
|
0x1000026a: 3130 01 ADDS r1,r1,#0x30
|
|
0x1000026c: 5539 9U STRB r1,[r7,r4]
|
|
0x1000026e: 1c64 d. ADDS r4,r4,#1
|
|
0x10000270: 2800 .( CMP r0,#0
|
|
0x10000272: d1f8 .. BNE 0x10000266 ; _printf_int_dec + 62
|
|
0x10000274: 462b +F MOV r3,r5
|
|
0x10000276: 4632 2F MOV r2,r6
|
|
0x10000278: 4621 !F MOV r1,r4
|
|
0x1000027a: 9800 .. LDR r0,[sp,#0]
|
|
0x1000027c: f000f8ba .... BL _printf_int_common ; 0x100003f4
|
|
0x10000280: bdfe .. POP {r1-r7,pc}
|
|
$d
|
|
0x10000282: 0000 .. DCW 0
|
|
0x10000284: 00000000 .... DCD 0
|
|
0x10000288: 0000002d -... DCD 45
|
|
0x1000028c: 0000002b +... DCD 43
|
|
0x10000290: 00000020 ... DCD 32
|
|
$t
|
|
.text
|
|
__aeabi_uidiv
|
|
__aeabi_uidivmod
|
|
0x10000294: 2200 ." MOVS r2,#0
|
|
0x10000296: 0903 .. LSRS r3,r0,#4
|
|
0x10000298: 428b .B CMP r3,r1
|
|
0x1000029a: d32c ,. BCC 0x100002f6 ; __aeabi_idiv + 78
|
|
0x1000029c: 0a03 .. LSRS r3,r0,#8
|
|
0x1000029e: 428b .B CMP r3,r1
|
|
0x100002a0: d311 .. BCC 0x100002c6 ; __aeabi_idiv + 30
|
|
0x100002a2: 2300 .# MOVS r3,#0
|
|
0x100002a4: 469c .F MOV r12,r3
|
|
0x100002a6: e04e N. B 0x10000346 ; __aeabi_idiv + 158
|
|
__aeabi_idiv
|
|
__aeabi_idivmod
|
|
0x100002a8: 4603 .F MOV r3,r0
|
|
0x100002aa: 430b .C ORRS r3,r3,r1
|
|
0x100002ac: d43c <. BMI 0x10000328 ; __aeabi_idiv + 128
|
|
0x100002ae: 2200 ." MOVS r2,#0
|
|
0x100002b0: 0843 C. LSRS r3,r0,#1
|
|
0x100002b2: 428b .B CMP r3,r1
|
|
0x100002b4: d331 1. BCC 0x1000031a ; __aeabi_idiv + 114
|
|
0x100002b6: 0903 .. LSRS r3,r0,#4
|
|
0x100002b8: 428b .B CMP r3,r1
|
|
0x100002ba: d31c .. BCC 0x100002f6 ; __aeabi_idiv + 78
|
|
0x100002bc: 0a03 .. LSRS r3,r0,#8
|
|
0x100002be: 428b .B CMP r3,r1
|
|
0x100002c0: d301 .. BCC 0x100002c6 ; __aeabi_idiv + 30
|
|
0x100002c2: 4694 .F MOV r12,r2
|
|
0x100002c4: e03f ?. B 0x10000346 ; __aeabi_idiv + 158
|
|
0x100002c6: 09c3 .. LSRS r3,r0,#7
|
|
0x100002c8: 428b .B CMP r3,r1
|
|
0x100002ca: d301 .. BCC 0x100002d0 ; __aeabi_idiv + 40
|
|
0x100002cc: 01cb .. LSLS r3,r1,#7
|
|
0x100002ce: 1ac0 .. SUBS r0,r0,r3
|
|
0x100002d0: 4152 RA ADCS r2,r2,r2
|
|
0x100002d2: 0983 .. LSRS r3,r0,#6
|
|
0x100002d4: 428b .B CMP r3,r1
|
|
0x100002d6: d301 .. BCC 0x100002dc ; __aeabi_idiv + 52
|
|
0x100002d8: 018b .. LSLS r3,r1,#6
|
|
0x100002da: 1ac0 .. SUBS r0,r0,r3
|
|
0x100002dc: 4152 RA ADCS r2,r2,r2
|
|
0x100002de: 0943 C. LSRS r3,r0,#5
|
|
0x100002e0: 428b .B CMP r3,r1
|
|
0x100002e2: d301 .. BCC 0x100002e8 ; __aeabi_idiv + 64
|
|
0x100002e4: 014b K. LSLS r3,r1,#5
|
|
0x100002e6: 1ac0 .. SUBS r0,r0,r3
|
|
0x100002e8: 4152 RA ADCS r2,r2,r2
|
|
0x100002ea: 0903 .. LSRS r3,r0,#4
|
|
0x100002ec: 428b .B CMP r3,r1
|
|
0x100002ee: d301 .. BCC 0x100002f4 ; __aeabi_idiv + 76
|
|
0x100002f0: 010b .. LSLS r3,r1,#4
|
|
0x100002f2: 1ac0 .. SUBS r0,r0,r3
|
|
0x100002f4: 4152 RA ADCS r2,r2,r2
|
|
0x100002f6: 08c3 .. LSRS r3,r0,#3
|
|
0x100002f8: 428b .B CMP r3,r1
|
|
0x100002fa: d301 .. BCC 0x10000300 ; __aeabi_idiv + 88
|
|
0x100002fc: 00cb .. LSLS r3,r1,#3
|
|
0x100002fe: 1ac0 .. SUBS r0,r0,r3
|
|
0x10000300: 4152 RA ADCS r2,r2,r2
|
|
0x10000302: 0883 .. LSRS r3,r0,#2
|
|
0x10000304: 428b .B CMP r3,r1
|
|
0x10000306: d301 .. BCC 0x1000030c ; __aeabi_idiv + 100
|
|
0x10000308: 008b .. LSLS r3,r1,#2
|
|
0x1000030a: 1ac0 .. SUBS r0,r0,r3
|
|
0x1000030c: 4152 RA ADCS r2,r2,r2
|
|
0x1000030e: 0843 C. LSRS r3,r0,#1
|
|
0x10000310: 428b .B CMP r3,r1
|
|
0x10000312: d301 .. BCC 0x10000318 ; __aeabi_idiv + 112
|
|
0x10000314: 004b K. LSLS r3,r1,#1
|
|
0x10000316: 1ac0 .. SUBS r0,r0,r3
|
|
0x10000318: 4152 RA ADCS r2,r2,r2
|
|
0x1000031a: 1a41 A. SUBS r1,r0,r1
|
|
0x1000031c: d200 .. BCS 0x10000320 ; __aeabi_idiv + 120
|
|
0x1000031e: 4601 .F MOV r1,r0
|
|
0x10000320: 4152 RA ADCS r2,r2,r2
|
|
0x10000322: 4610 .F MOV r0,r2
|
|
0x10000324: 4770 pG BX lr
|
|
0x10000326: e05d ]. B 0x100003e4 ; __aeabi_idiv + 316
|
|
0x10000328: 0fca .. LSRS r2,r1,#31
|
|
0x1000032a: d000 .. BEQ 0x1000032e ; __aeabi_idiv + 134
|
|
0x1000032c: 4249 IB RSBS r1,r1,#0
|
|
0x1000032e: 1003 .. ASRS r3,r0,#32
|
|
0x10000330: d300 .. BCC 0x10000334 ; __aeabi_idiv + 140
|
|
0x10000332: 4240 @B RSBS r0,r0,#0
|
|
0x10000334: 4053 S@ EORS r3,r3,r2
|
|
0x10000336: 2200 ." MOVS r2,#0
|
|
0x10000338: 469c .F MOV r12,r3
|
|
0x1000033a: 0903 .. LSRS r3,r0,#4
|
|
0x1000033c: 428b .B CMP r3,r1
|
|
0x1000033e: d32d -. BCC 0x1000039c ; __aeabi_idiv + 244
|
|
0x10000340: 0a03 .. LSRS r3,r0,#8
|
|
0x10000342: 428b .B CMP r3,r1
|
|
0x10000344: d312 .. BCC 0x1000036c ; __aeabi_idiv + 196
|
|
0x10000346: 22fc ." MOVS r2,#0xfc
|
|
0x10000348: 0189 .. LSLS r1,r1,#6
|
|
0x1000034a: ba12 .. REV r2,r2
|
|
0x1000034c: 0a03 .. LSRS r3,r0,#8
|
|
0x1000034e: 428b .B CMP r3,r1
|
|
0x10000350: d30c .. BCC 0x1000036c ; __aeabi_idiv + 196
|
|
0x10000352: 0189 .. LSLS r1,r1,#6
|
|
0x10000354: 1192 .. ASRS r2,r2,#6
|
|
0x10000356: 428b .B CMP r3,r1
|
|
0x10000358: d308 .. BCC 0x1000036c ; __aeabi_idiv + 196
|
|
0x1000035a: 0189 .. LSLS r1,r1,#6
|
|
0x1000035c: 1192 .. ASRS r2,r2,#6
|
|
0x1000035e: 428b .B CMP r3,r1
|
|
0x10000360: d304 .. BCC 0x1000036c ; __aeabi_idiv + 196
|
|
0x10000362: 0189 .. LSLS r1,r1,#6
|
|
0x10000364: d03a :. BEQ 0x100003dc ; __aeabi_idiv + 308
|
|
0x10000366: 1192 .. ASRS r2,r2,#6
|
|
0x10000368: e000 .. B 0x1000036c ; __aeabi_idiv + 196
|
|
0x1000036a: 0989 .. LSRS r1,r1,#6
|
|
0x1000036c: 09c3 .. LSRS r3,r0,#7
|
|
0x1000036e: 428b .B CMP r3,r1
|
|
0x10000370: d301 .. BCC 0x10000376 ; __aeabi_idiv + 206
|
|
0x10000372: 01cb .. LSLS r3,r1,#7
|
|
0x10000374: 1ac0 .. SUBS r0,r0,r3
|
|
0x10000376: 4152 RA ADCS r2,r2,r2
|
|
0x10000378: 0983 .. LSRS r3,r0,#6
|
|
0x1000037a: 428b .B CMP r3,r1
|
|
0x1000037c: d301 .. BCC 0x10000382 ; __aeabi_idiv + 218
|
|
0x1000037e: 018b .. LSLS r3,r1,#6
|
|
0x10000380: 1ac0 .. SUBS r0,r0,r3
|
|
0x10000382: 4152 RA ADCS r2,r2,r2
|
|
0x10000384: 0943 C. LSRS r3,r0,#5
|
|
0x10000386: 428b .B CMP r3,r1
|
|
0x10000388: d301 .. BCC 0x1000038e ; __aeabi_idiv + 230
|
|
0x1000038a: 014b K. LSLS r3,r1,#5
|
|
0x1000038c: 1ac0 .. SUBS r0,r0,r3
|
|
0x1000038e: 4152 RA ADCS r2,r2,r2
|
|
0x10000390: 0903 .. LSRS r3,r0,#4
|
|
0x10000392: 428b .B CMP r3,r1
|
|
0x10000394: d301 .. BCC 0x1000039a ; __aeabi_idiv + 242
|
|
0x10000396: 010b .. LSLS r3,r1,#4
|
|
0x10000398: 1ac0 .. SUBS r0,r0,r3
|
|
0x1000039a: 4152 RA ADCS r2,r2,r2
|
|
0x1000039c: 08c3 .. LSRS r3,r0,#3
|
|
0x1000039e: 428b .B CMP r3,r1
|
|
0x100003a0: d301 .. BCC 0x100003a6 ; __aeabi_idiv + 254
|
|
0x100003a2: 00cb .. LSLS r3,r1,#3
|
|
0x100003a4: 1ac0 .. SUBS r0,r0,r3
|
|
0x100003a6: 4152 RA ADCS r2,r2,r2
|
|
0x100003a8: 0883 .. LSRS r3,r0,#2
|
|
0x100003aa: 428b .B CMP r3,r1
|
|
0x100003ac: d301 .. BCC 0x100003b2 ; __aeabi_idiv + 266
|
|
0x100003ae: 008b .. LSLS r3,r1,#2
|
|
0x100003b0: 1ac0 .. SUBS r0,r0,r3
|
|
0x100003b2: 4152 RA ADCS r2,r2,r2
|
|
0x100003b4: d2d9 .. BCS 0x1000036a ; __aeabi_idiv + 194
|
|
0x100003b6: 0843 C. LSRS r3,r0,#1
|
|
0x100003b8: 428b .B CMP r3,r1
|
|
0x100003ba: d301 .. BCC 0x100003c0 ; __aeabi_idiv + 280
|
|
0x100003bc: 004b K. LSLS r3,r1,#1
|
|
0x100003be: 1ac0 .. SUBS r0,r0,r3
|
|
0x100003c0: 4152 RA ADCS r2,r2,r2
|
|
0x100003c2: 1a41 A. SUBS r1,r0,r1
|
|
0x100003c4: d200 .. BCS 0x100003c8 ; __aeabi_idiv + 288
|
|
0x100003c6: 4601 .F MOV r1,r0
|
|
0x100003c8: 4663 cF MOV r3,r12
|
|
0x100003ca: 4152 RA ADCS r2,r2,r2
|
|
0x100003cc: 105b [. ASRS r3,r3,#1
|
|
0x100003ce: 4610 .F MOV r0,r2
|
|
0x100003d0: d301 .. BCC 0x100003d6 ; __aeabi_idiv + 302
|
|
0x100003d2: 4240 @B RSBS r0,r0,#0
|
|
0x100003d4: 2b00 .+ CMP r3,#0
|
|
0x100003d6: d500 .. BPL 0x100003da ; __aeabi_idiv + 306
|
|
0x100003d8: 4249 IB RSBS r1,r1,#0
|
|
0x100003da: 4770 pG BX lr
|
|
0x100003dc: 4663 cF MOV r3,r12
|
|
0x100003de: 105b [. ASRS r3,r3,#1
|
|
0x100003e0: d300 .. BCC 0x100003e4 ; __aeabi_idiv + 316
|
|
0x100003e2: 4240 @B RSBS r0,r0,#0
|
|
0x100003e4: b501 .. PUSH {r0,lr}
|
|
0x100003e6: 2000 . MOVS r0,#0
|
|
0x100003e8: 46c0 .F MOV r8,r8
|
|
0x100003ea: 46c0 .F MOV r8,r8
|
|
0x100003ec: bd02 .. POP {r1,pc}
|
|
.text
|
|
__use_two_region_memory
|
|
0x100003ee: 4770 pG BX lr
|
|
__rt_heap_escrow$2region
|
|
0x100003f0: 4770 pG BX lr
|
|
__rt_heap_expand$2region
|
|
0x100003f2: 4770 pG BX lr
|
|
.text
|
|
_printf_int_common
|
|
0x100003f4: b5ff .. PUSH {r0-r7,lr}
|
|
0x100003f6: 4604 .F MOV r4,r0
|
|
0x100003f8: 460d .F MOV r5,r1
|
|
0x100003fa: b081 .. SUB sp,sp,#4
|
|
0x100003fc: 3024 $0 ADDS r0,r0,#0x24
|
|
0x100003fe: 9000 .. STR r0,[sp,#0]
|
|
0x10000400: 6821 !h LDR r1,[r4,#0]
|
|
0x10000402: 0688 .. LSLS r0,r1,#26
|
|
0x10000404: d504 .. BPL 0x10000410 ; _printf_int_common + 28
|
|
0x10000406: 2210 ." MOVS r2,#0x10
|
|
0x10000408: 69e0 .i LDR r0,[r4,#0x1c]
|
|
0x1000040a: 4391 .C BICS r1,r1,r2
|
|
0x1000040c: 6021 !` STR r1,[r4,#0]
|
|
0x1000040e: e000 .. B 0x10000412 ; _printf_int_common + 30
|
|
0x10000410: 2001 . MOVS r0,#1
|
|
0x10000412: 42a8 .B CMP r0,r5
|
|
0x10000414: dd01 .. BLE 0x1000041a ; _printf_int_common + 38
|
|
0x10000416: 1b47 G. SUBS r7,r0,r5
|
|
0x10000418: e000 .. B 0x1000041c ; _printf_int_common + 40
|
|
0x1000041a: 2700 .' MOVS r7,#0
|
|
0x1000041c: 9804 .. LDR r0,[sp,#0x10]
|
|
0x1000041e: 69a1 .i LDR r1,[r4,#0x18]
|
|
0x10000420: 197a z. ADDS r2,r7,r5
|
|
0x10000422: 1810 .. ADDS r0,r2,r0
|
|
0x10000424: 1a08 .. SUBS r0,r1,r0
|
|
0x10000426: 61a0 .a STR r0,[r4,#0x18]
|
|
0x10000428: 7820 x LDRB r0,[r4,#0]
|
|
0x1000042a: 06c0 .. LSLS r0,r0,#27
|
|
0x1000042c: d402 .. BMI 0x10000434 ; _printf_int_common + 64
|
|
0x1000042e: 4620 F MOV r0,r4
|
|
0x10000430: 46c0 .F MOV r8,r8
|
|
0x10000432: 46c0 .F MOV r8,r8
|
|
0x10000434: 2600 .& MOVS r6,#0
|
|
0x10000436: e008 .. B 0x1000044a ; _printf_int_common + 86
|
|
0x10000438: 9803 .. LDR r0,[sp,#0xc]
|
|
0x1000043a: 6862 bh LDR r2,[r4,#4]
|
|
0x1000043c: 68a1 .h LDR r1,[r4,#8]
|
|
0x1000043e: 5d80 .] LDRB r0,[r0,r6]
|
|
0x10000440: 4790 .G BLX r2
|
|
0x10000442: 6a20 j LDR r0,[r4,#0x20]
|
|
0x10000444: 1c40 @. ADDS r0,r0,#1
|
|
0x10000446: 1c76 v. ADDS r6,r6,#1
|
|
0x10000448: 6220 b STR r0,[r4,#0x20]
|
|
0x1000044a: 9804 .. LDR r0,[sp,#0x10]
|
|
0x1000044c: 4286 .B CMP r6,r0
|
|
0x1000044e: dbf3 .. BLT 0x10000438 ; _printf_int_common + 68
|
|
0x10000450: 7820 x LDRB r0,[r4,#0]
|
|
0x10000452: 06c0 .. LSLS r0,r0,#27
|
|
0x10000454: d50a .. BPL 0x1000046c ; _printf_int_common + 120
|
|
0x10000456: 4620 F MOV r0,r4
|
|
0x10000458: 46c0 .F MOV r8,r8
|
|
0x1000045a: 46c0 .F MOV r8,r8
|
|
0x1000045c: e006 .. B 0x1000046c ; _printf_int_common + 120
|
|
0x1000045e: 6862 bh LDR r2,[r4,#4]
|
|
0x10000460: 68a1 .h LDR r1,[r4,#8]
|
|
0x10000462: 2030 0 MOVS r0,#0x30
|
|
0x10000464: 4790 .G BLX r2
|
|
0x10000466: 6a20 j LDR r0,[r4,#0x20]
|
|
0x10000468: 1c40 @. ADDS r0,r0,#1
|
|
0x1000046a: 6220 b STR r0,[r4,#0x20]
|
|
0x1000046c: 4638 8F MOV r0,r7
|
|
0x1000046e: 1e7f .. SUBS r7,r7,#1
|
|
0x10000470: 2800 .( CMP r0,#0
|
|
0x10000472: dcf4 .. BGT 0x1000045e ; _printf_int_common + 106
|
|
0x10000474: e007 .. B 0x10000486 ; _printf_int_common + 146
|
|
0x10000476: 9800 .. LDR r0,[sp,#0]
|
|
0x10000478: 6862 bh LDR r2,[r4,#4]
|
|
0x1000047a: 68a1 .h LDR r1,[r4,#8]
|
|
0x1000047c: 5d40 @] LDRB r0,[r0,r5]
|
|
0x1000047e: 4790 .G BLX r2
|
|
0x10000480: 6a20 j LDR r0,[r4,#0x20]
|
|
0x10000482: 1c40 @. ADDS r0,r0,#1
|
|
0x10000484: 6220 b STR r0,[r4,#0x20]
|
|
0x10000486: 4628 (F MOV r0,r5
|
|
0x10000488: 1e6d m. SUBS r5,r5,#1
|
|
0x1000048a: 2800 .( CMP r0,#0
|
|
0x1000048c: dcf3 .. BGT 0x10000476 ; _printf_int_common + 130
|
|
0x1000048e: 4620 F MOV r0,r4
|
|
0x10000490: 46c0 .F MOV r8,r8
|
|
0x10000492: 46c0 .F MOV r8,r8
|
|
0x10000494: 7820 x LDRB r0,[r4,#0]
|
|
0x10000496: 0600 .. LSLS r0,r0,#24
|
|
0x10000498: d502 .. BPL 0x100004a0 ; _printf_int_common + 172
|
|
0x1000049a: 2002 . MOVS r0,#2
|
|
0x1000049c: b005 .. ADD sp,sp,#0x14
|
|
0x1000049e: bdf0 .. POP {r4-r7,pc}
|
|
0x100004a0: 2001 . MOVS r0,#1
|
|
0x100004a2: e7fb .. B 0x1000049c ; _printf_int_common + 168
|
|
.text
|
|
_printf_char_file
|
|
0x100004a4: 4b08 .K LDR r3,[pc,#32] ; [0x100004c8] = 0x1447
|
|
0x100004a6: b570 p. PUSH {r4-r6,lr}
|
|
0x100004a8: 460d .F MOV r5,r1
|
|
0x100004aa: 447b {D ADD r3,r3,pc
|
|
0x100004ac: f000f827 ..'. BL _printf_char_common ; 0x100004fe
|
|
0x100004b0: 4604 .F MOV r4,r0
|
|
0x100004b2: 4628 (F MOV r0,r5
|
|
0x100004b4: f000f99a .... BL ferror ; 0x100007ec
|
|
0x100004b8: 2800 .( CMP r0,#0
|
|
0x100004ba: d002 .. BEQ 0x100004c2 ; _printf_char_file + 30
|
|
0x100004bc: 2000 . MOVS r0,#0
|
|
0x100004be: 43c0 .C MVNS r0,r0
|
|
0x100004c0: bd70 p. POP {r4-r6,pc}
|
|
0x100004c2: 4620 F MOV r0,r4
|
|
0x100004c4: bd70 p. POP {r4-r6,pc}
|
|
$d
|
|
0x100004c6: 0000 .. DCW 0
|
|
0x100004c8: 00001447 G... DCD 5191
|
|
$t
|
|
.text
|
|
__rt_udiv10
|
|
0x100004cc: 4601 .F MOV r1,r0
|
|
0x100004ce: 0880 .. LSRS r0,r0,#2
|
|
0x100004d0: 1a08 .. SUBS r0,r1,r0
|
|
0x100004d2: 0902 .. LSRS r2,r0,#4
|
|
0x100004d4: 1810 .. ADDS r0,r2,r0
|
|
0x100004d6: 0a02 .. LSRS r2,r0,#8
|
|
0x100004d8: 1810 .. ADDS r0,r2,r0
|
|
0x100004da: 0c02 .. LSRS r2,r0,#16
|
|
0x100004dc: 1810 .. ADDS r0,r2,r0
|
|
0x100004de: 08c0 .. LSRS r0,r0,#3
|
|
0x100004e0: 0082 .. LSLS r2,r0,#2
|
|
0x100004e2: 1812 .. ADDS r2,r2,r0
|
|
0x100004e4: 0052 R. LSLS r2,r2,#1
|
|
0x100004e6: 1a89 .. SUBS r1,r1,r2
|
|
0x100004e8: e001 .. B 0x100004ee ; __rt_udiv10 + 34
|
|
0x100004ea: 1c40 @. ADDS r0,r0,#1
|
|
0x100004ec: 390a .9 SUBS r1,r1,#0xa
|
|
0x100004ee: 290a .) CMP r1,#0xa
|
|
0x100004f0: d2fb .. BCS 0x100004ea ; __rt_udiv10 + 30
|
|
0x100004f2: 4770 pG BX lr
|
|
.text
|
|
_printf_input_char
|
|
0x100004f4: 6901 .i LDR r1,[r0,#0x10]
|
|
0x100004f6: 1c4a J. ADDS r2,r1,#1
|
|
0x100004f8: 6102 .a STR r2,[r0,#0x10]
|
|
0x100004fa: 7808 .x LDRB r0,[r1,#0]
|
|
0x100004fc: 4770 pG BX lr
|
|
_printf_char_common
|
|
0x100004fe: b500 .. PUSH {lr}
|
|
0x10000500: b08f .. SUB sp,sp,#0x3c
|
|
0x10000502: 9102 .. STR r1,[sp,#8]
|
|
0x10000504: 2100 .! MOVS r1,#0
|
|
0x10000506: 9105 .. STR r1,[sp,#0x14]
|
|
0x10000508: 4905 .I LDR r1,[pc,#20] ; [0x10000520] = 0xffffffe5
|
|
0x1000050a: 9301 .. STR r3,[sp,#4]
|
|
0x1000050c: 4479 yD ADD r1,r1,pc
|
|
0x1000050e: 9103 .. STR r1,[sp,#0xc]
|
|
0x10000510: 4611 .F MOV r1,r2
|
|
0x10000512: 9004 .. STR r0,[sp,#0x10]
|
|
0x10000514: 4668 hF MOV r0,sp
|
|
0x10000516: f7fffe51 ..Q. BL __printf ; 0x100001bc
|
|
0x1000051a: b00f .. ADD sp,sp,#0x3c
|
|
0x1000051c: bd00 .. POP {pc}
|
|
$d
|
|
0x1000051e: 0000 .. DCW 0
|
|
0x10000520: ffffffe5 .... DCD 4294967269
|
|
$t
|
|
.text
|
|
__user_setup_stackheap
|
|
0x10000524: 4675 uF MOV r5,lr
|
|
0x10000526: f000f825 ..%. BL __user_libspace ; 0x10000574
|
|
0x1000052a: 46ae .F MOV lr,r5
|
|
0x1000052c: 0005 .. MOVS r5,r0
|
|
0x1000052e: 4669 iF MOV r1,sp
|
|
0x10000530: 4653 SF MOV r3,r10
|
|
0x10000532: 08c0 .. LSRS r0,r0,#3
|
|
0x10000534: 00c0 .. LSLS r0,r0,#3
|
|
0x10000536: 4685 .F MOV sp,r0
|
|
0x10000538: b018 .. ADD sp,sp,#0x60
|
|
0x1000053a: b520 . PUSH {r5,lr}
|
|
0x1000053c: f7fffe1c .... BL __user_initial_stackheap ; 0x10000178
|
|
0x10000540: bc60 `. POP {r5,r6}
|
|
0x10000542: 2700 .' MOVS r7,#0
|
|
0x10000544: 0849 I. LSRS r1,r1,#1
|
|
0x10000546: 46b6 .F MOV lr,r6
|
|
0x10000548: 2600 .& MOVS r6,#0
|
|
0x1000054a: c5c0 .. STM r5!,{r6,r7}
|
|
0x1000054c: c5c0 .. STM r5!,{r6,r7}
|
|
0x1000054e: c5c0 .. STM r5!,{r6,r7}
|
|
0x10000550: c5c0 .. STM r5!,{r6,r7}
|
|
0x10000552: c5c0 .. STM r5!,{r6,r7}
|
|
0x10000554: c5c0 .. STM r5!,{r6,r7}
|
|
0x10000556: c5c0 .. STM r5!,{r6,r7}
|
|
0x10000558: c5c0 .. STM r5!,{r6,r7}
|
|
0x1000055a: 3d40 @= SUBS r5,r5,#0x40
|
|
0x1000055c: 0049 I. LSLS r1,r1,#1
|
|
0x1000055e: 468d .F MOV sp,r1
|
|
0x10000560: 4770 pG BX lr
|
|
.text
|
|
exit
|
|
0x10000562: b510 .. PUSH {r4,lr}
|
|
0x10000564: 4604 .F MOV r4,r0
|
|
0x10000566: 46c0 .F MOV r8,r8
|
|
0x10000568: 46c0 .F MOV r8,r8
|
|
0x1000056a: 4620 F MOV r0,r4
|
|
0x1000056c: f7fffded .... BL __rt_exit ; 0x1000014a
|
|
0x10000570: bd10 .. POP {r4,pc}
|
|
0x10000572: 0000 .. MOVS r0,r0
|
|
.text
|
|
__user_libspace
|
|
__user_perproc_libspace
|
|
__user_perthread_libspace
|
|
0x10000574: 4800 .H LDR r0,[pc,#0] ; [0x10000578] = 0x10002290
|
|
0x10000576: 4770 pG BX lr
|
|
$d
|
|
0x10000578: 10002290 .".. DCD 268444304
|
|
$t
|
|
i.SystemInit
|
|
SystemInit
|
|
0x1000057c: b510 .. PUSH {r4,lr}
|
|
0x1000057e: f000f80b .... BL WDT_ResetInit ; 0x10000598
|
|
0x10000582: bd10 .. POP {r4,pc}
|
|
i.UART0_Handler
|
|
UART0_Handler
|
|
0x10000584: b510 .. PUSH {r4,lr}
|
|
0x10000586: 2000 . MOVS r0,#0
|
|
0x10000588: f000fad0 .... BL uart_handler_callback ; 0x10000b2c
|
|
0x1000058c: bd10 .. POP {r4,pc}
|
|
i.UART1_Handler
|
|
UART1_Handler
|
|
0x1000058e: b510 .. PUSH {r4,lr}
|
|
0x10000590: 2001 . MOVS r0,#1
|
|
0x10000592: f000facb .... BL uart_handler_callback ; 0x10000b2c
|
|
0x10000596: bd10 .. POP {r4,pc}
|
|
i.WDT_ResetInit
|
|
WDT_ResetInit
|
|
0x10000598: 2001 . MOVS r0,#1
|
|
0x1000059a: 491e .I LDR r1,[pc,#120] ; [0x10000614] = 0x40000040
|
|
0x1000059c: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x1000059e: 4381 .C BICS r1,r1,r0
|
|
0x100005a0: 0402 .. LSLS r2,r0,#16
|
|
0x100005a2: 1882 .. ADDS r2,r0,r2
|
|
0x100005a4: 4311 .C ORRS r1,r1,r2
|
|
0x100005a6: 4a1b .J LDR r2,[pc,#108] ; [0x10000614] = 0x40000040
|
|
0x100005a8: 6311 .c STR r1,[r2,#0x30]
|
|
0x100005aa: bf00 .. NOP
|
|
0x100005ac: 2000 . MOVS r0,#0
|
|
0x100005ae: 4919 .I LDR r1,[pc,#100] ; [0x10000614] = 0x40000040
|
|
0x100005b0: 31c0 .1 ADDS r1,r1,#0xc0
|
|
0x100005b2: 6809 .h LDR r1,[r1,#0]
|
|
0x100005b4: 2204 ." MOVS r2,#4
|
|
0x100005b6: 4391 .C BICS r1,r1,r2
|
|
0x100005b8: 0082 .. LSLS r2,r0,#2
|
|
0x100005ba: 2301 .# MOVS r3,#1
|
|
0x100005bc: 049b .. LSLS r3,r3,#18
|
|
0x100005be: 18d2 .. ADDS r2,r2,r3
|
|
0x100005c0: 4311 .C ORRS r1,r1,r2
|
|
0x100005c2: 4a14 .J LDR r2,[pc,#80] ; [0x10000614] = 0x40000040
|
|
0x100005c4: 32c0 .2 ADDS r2,r2,#0xc0
|
|
0x100005c6: 6011 .` STR r1,[r2,#0]
|
|
0x100005c8: bf00 .. NOP
|
|
0x100005ca: 2001 . MOVS r0,#1
|
|
0x100005cc: 4611 .F MOV r1,r2
|
|
0x100005ce: 6809 .h LDR r1,[r1,#0]
|
|
0x100005d0: 2204 ." MOVS r2,#4
|
|
0x100005d2: 4391 .C BICS r1,r1,r2
|
|
0x100005d4: 0082 .. LSLS r2,r0,#2
|
|
0x100005d6: 18d2 .. ADDS r2,r2,r3
|
|
0x100005d8: 4311 .C ORRS r1,r1,r2
|
|
0x100005da: 4a0e .J LDR r2,[pc,#56] ; [0x10000614] = 0x40000040
|
|
0x100005dc: 32c0 .2 ADDS r2,r2,#0xc0
|
|
0x100005de: 6011 .` STR r1,[r2,#0]
|
|
0x100005e0: bf00 .. NOP
|
|
0x100005e2: 2002 . MOVS r0,#2
|
|
0x100005e4: 4611 .F MOV r1,r2
|
|
0x100005e6: 6148 Ha STR r0,[r1,#0x14]
|
|
0x100005e8: bf00 .. NOP
|
|
0x100005ea: 2001 . MOVS r0,#1
|
|
0x100005ec: 6989 .i LDR r1,[r1,#0x18]
|
|
0x100005ee: 0302 .. LSLS r2,r0,#12
|
|
0x100005f0: 4391 .C BICS r1,r1,r2
|
|
0x100005f2: 0302 .. LSLS r2,r0,#12
|
|
0x100005f4: 4311 .C ORRS r1,r1,r2
|
|
0x100005f6: 4a07 .J LDR r2,[pc,#28] ; [0x10000614] = 0x40000040
|
|
0x100005f8: 32c0 .2 ADDS r2,r2,#0xc0
|
|
0x100005fa: 6191 .a STR r1,[r2,#0x18]
|
|
0x100005fc: bf00 .. NOP
|
|
0x100005fe: 2000 . MOVS r0,#0
|
|
0x10000600: 4905 .I LDR r1,[pc,#20] ; [0x10000618] = 0x40004000
|
|
0x10000602: 6809 .h LDR r1,[r1,#0]
|
|
0x10000604: 0849 I. LSRS r1,r1,#1
|
|
0x10000606: 0049 I. LSLS r1,r1,#1
|
|
0x10000608: 4301 .C ORRS r1,r1,r0
|
|
0x1000060a: 4a03 .J LDR r2,[pc,#12] ; [0x10000618] = 0x40004000
|
|
0x1000060c: 6011 .` STR r1,[r2,#0]
|
|
0x1000060e: bf00 .. NOP
|
|
0x10000610: 4770 pG BX lr
|
|
$d
|
|
0x10000612: 0000 .. DCW 0
|
|
0x10000614: 40000040 @..@ DCD 1073741888
|
|
0x10000618: 40004000 .@.@ DCD 1073758208
|
|
$t
|
|
i._sys_exit
|
|
_sys_exit
|
|
0x1000061c: bf00 .. NOP
|
|
0x1000061e: e7fe .. B 0x1000061e ; _sys_exit + 2
|
|
i.app_uart_init
|
|
app_uart_init
|
|
0x10000620: b500 .. PUSH {lr}
|
|
0x10000622: b085 .. SUB sp,sp,#0x14
|
|
0x10000624: 2000 . MOVS r0,#0
|
|
0x10000626: 9003 .. STR r0,[sp,#0xc]
|
|
0x10000628: 9004 .. STR r0,[sp,#0x10]
|
|
0x1000062a: 2100 .! MOVS r1,#0
|
|
0x1000062c: 4668 hF MOV r0,sp
|
|
0x1000062e: 7381 .s STRB r1,[r0,#0xe]
|
|
0x10000630: 7441 At STRB r1,[r0,#0x11]
|
|
0x10000632: 7481 .t STRB r1,[r0,#0x12]
|
|
0x10000634: 2101 .! MOVS r1,#1
|
|
0x10000636: 73c1 .s STRB r1,[r0,#0xf]
|
|
0x10000638: 2112 .! MOVS r1,#0x12
|
|
0x1000063a: 8181 .. STRH r1,[r0,#0xc]
|
|
0x1000063c: 2101 .! MOVS r1,#1
|
|
0x1000063e: 7401 .t STRB r1,[r0,#0x10]
|
|
0x10000640: a803 .. ADD r0,sp,#0xc
|
|
0x10000642: f000fdc1 .... BL xc_gpio_init ; 0x100011c8
|
|
0x10000646: 2102 .! MOVS r1,#2
|
|
0x10000648: 4668 hF MOV r0,sp
|
|
0x1000064a: 73c1 .s STRB r1,[r0,#0xf]
|
|
0x1000064c: 2113 .! MOVS r1,#0x13
|
|
0x1000064e: 8181 .. STRH r1,[r0,#0xc]
|
|
0x10000650: 2100 .! MOVS r1,#0
|
|
0x10000652: 7401 .t STRB r1,[r0,#0x10]
|
|
0x10000654: a803 .. ADD r0,sp,#0xc
|
|
0x10000656: f000fdb7 .... BL xc_gpio_init ; 0x100011c8
|
|
0x1000065a: 2000 . MOVS r0,#0
|
|
0x1000065c: 9000 .. STR r0,[sp,#0]
|
|
0x1000065e: 9001 .. STR r0,[sp,#4]
|
|
0x10000660: 9002 .. STR r0,[sp,#8]
|
|
0x10000662: 2100 .! MOVS r1,#0
|
|
0x10000664: 4668 hF MOV r0,sp
|
|
0x10000666: 8101 .. STRH r1,[r0,#8]
|
|
0x10000668: 80c1 .. STRH r1,[r0,#6]
|
|
0x1000066a: 2103 .! MOVS r1,#3
|
|
0x1000066c: 8081 .. STRH r1,[r0,#4]
|
|
0x1000066e: 4805 .H LDR r0,[pc,#20] ; [0x10000684] = 0x4802711
|
|
0x10000670: 9000 .. STR r0,[sp,#0]
|
|
0x10000672: 2100 .! MOVS r1,#0
|
|
0x10000674: 4668 hF MOV r0,sp
|
|
0x10000676: 8141 A. STRH r1,[r0,#0xa]
|
|
0x10000678: 4669 iF MOV r1,sp
|
|
0x1000067a: 2000 . MOVS r0,#0
|
|
0x1000067c: f000ff74 ..t. BL xc_uart_init ; 0x10001568
|
|
0x10000680: b005 .. ADD sp,sp,#0x14
|
|
0x10000682: bd00 .. POP {pc}
|
|
$d
|
|
0x10000684: 04802711 .'.. DCD 75507473
|
|
$t
|
|
i.clock_init
|
|
clock_init
|
|
0x10000688: b53e >. PUSH {r1-r5,lr}
|
|
0x1000068a: 2101 .! MOVS r1,#1
|
|
0x1000068c: 4668 hF MOV r0,sp
|
|
0x1000068e: 7001 .p STRB r1,[r0,#0]
|
|
0x10000690: 4834 4H LDR r0,[pc,#208] ; [0x10000764] = 0x1e84800
|
|
0x10000692: 9001 .. STR r0,[sp,#4]
|
|
0x10000694: 4668 hF MOV r0,sp
|
|
0x10000696: 7a00 .z LDRB r0,[r0,#8]
|
|
0x10000698: 2801 .( CMP r0,#1
|
|
0x1000069a: d103 .. BNE 0x100006a4 ; clock_init + 28
|
|
0x1000069c: 03c0 .. LSLS r0,r0,#15
|
|
0x1000069e: 4669 iF MOV r1,sp
|
|
0x100006a0: 8148 H. STRH r0,[r1,#0xa]
|
|
0x100006a2: e007 .. B 0x100006b4 ; clock_init + 44
|
|
0x100006a4: 4668 hF MOV r0,sp
|
|
0x100006a6: 7a00 .z LDRB r0,[r0,#8]
|
|
0x100006a8: 2800 .( CMP r0,#0
|
|
0x100006aa: d103 .. BNE 0x100006b4 ; clock_init + 44
|
|
0x100006ac: 207d } MOVS r0,#0x7d
|
|
0x100006ae: 0200 .. LSLS r0,r0,#8
|
|
0x100006b0: 4669 iF MOV r1,sp
|
|
0x100006b2: 8148 H. STRH r0,[r1,#0xa]
|
|
0x100006b4: 4668 hF MOV r0,sp
|
|
0x100006b6: f001f927 ..'. BL xc_clock_init_cfg ; 0x10001908
|
|
0x100006ba: f000fb59 ..Y. BL xc_clock_hfclk_in_get ; 0x10000d70
|
|
0x100006be: 4605 .F MOV r5,r0
|
|
0x100006c0: 2164 d! MOVS r1,#0x64
|
|
0x100006c2: f7fffde7 .... BL __aeabi_uidiv ; 0x10000294
|
|
0x100006c6: 4604 .F MOV r4,r0
|
|
0x100006c8: 4827 'H LDR r0,[pc,#156] ; [0x10000768] = 0xffffff
|
|
0x100006ca: 4284 .B CMP r4,r0
|
|
0x100006cc: d900 .. BLS 0x100006d0 ; clock_init + 72
|
|
0x100006ce: e042 B. B 0x10000756 ; clock_init + 206
|
|
0x100006d0: 0220 . LSLS r0,r4,#8
|
|
0x100006d2: 0a00 .. LSRS r0,r0,#8
|
|
0x100006d4: 1e40 @. SUBS r0,r0,#1
|
|
0x100006d6: 4925 %I LDR r1,[pc,#148] ; [0x1000076c] = 0xe000e000
|
|
0x100006d8: 6148 Ha STR r0,[r1,#0x14]
|
|
0x100006da: 1748 H. ASRS r0,r1,#29
|
|
0x100006dc: 2103 .! MOVS r1,#3
|
|
0x100006de: 2800 .( CMP r0,#0
|
|
0x100006e0: da19 .. BGE 0x10000716 ; clock_init + 142
|
|
0x100006e2: 4a23 #J LDR r2,[pc,#140] ; [0x10000770] = 0xe000ed1c
|
|
0x100006e4: 0703 .. LSLS r3,r0,#28
|
|
0x100006e6: 0f1b .. LSRS r3,r3,#28
|
|
0x100006e8: 3b08 .; SUBS r3,r3,#8
|
|
0x100006ea: 089b .. LSRS r3,r3,#2
|
|
0x100006ec: 009b .. LSLS r3,r3,#2
|
|
0x100006ee: 58d2 .X LDR r2,[r2,r3]
|
|
0x100006f0: 0783 .. LSLS r3,r0,#30
|
|
0x100006f2: 0edd .. LSRS r5,r3,#27
|
|
0x100006f4: 23ff .# MOVS r3,#0xff
|
|
0x100006f6: 40ab .@ LSLS r3,r3,r5
|
|
0x100006f8: 439a .C BICS r2,r2,r3
|
|
0x100006fa: 078b .. LSLS r3,r1,#30
|
|
0x100006fc: 0e1b .. LSRS r3,r3,#24
|
|
0x100006fe: 0785 .. LSLS r5,r0,#30
|
|
0x10000700: 0eed .. LSRS r5,r5,#27
|
|
0x10000702: 40ab .@ LSLS r3,r3,r5
|
|
0x10000704: 431a .C ORRS r2,r2,r3
|
|
0x10000706: 4b1a .K LDR r3,[pc,#104] ; [0x10000770] = 0xe000ed1c
|
|
0x10000708: 0705 .. LSLS r5,r0,#28
|
|
0x1000070a: 0f2d -. LSRS r5,r5,#28
|
|
0x1000070c: 3d08 .= SUBS r5,r5,#8
|
|
0x1000070e: 08ad .. LSRS r5,r5,#2
|
|
0x10000710: 00ad .. LSLS r5,r5,#2
|
|
0x10000712: 515a ZQ STR r2,[r3,r5]
|
|
0x10000714: e018 .. B 0x10000748 ; clock_init + 192
|
|
0x10000716: 4a17 .J LDR r2,[pc,#92] ; [0x10000774] = 0xe000e100
|
|
0x10000718: 2303 .# MOVS r3,#3
|
|
0x1000071a: 021b .. LSLS r3,r3,#8
|
|
0x1000071c: 18d2 .. ADDS r2,r2,r3
|
|
0x1000071e: 0883 .. LSRS r3,r0,#2
|
|
0x10000720: 009b .. LSLS r3,r3,#2
|
|
0x10000722: 58d2 .X LDR r2,[r2,r3]
|
|
0x10000724: 0783 .. LSLS r3,r0,#30
|
|
0x10000726: 0edd .. LSRS r5,r3,#27
|
|
0x10000728: 23ff .# MOVS r3,#0xff
|
|
0x1000072a: 40ab .@ LSLS r3,r3,r5
|
|
0x1000072c: 439a .C BICS r2,r2,r3
|
|
0x1000072e: 078b .. LSLS r3,r1,#30
|
|
0x10000730: 0e1b .. LSRS r3,r3,#24
|
|
0x10000732: 0785 .. LSLS r5,r0,#30
|
|
0x10000734: 0eed .. LSRS r5,r5,#27
|
|
0x10000736: 40ab .@ LSLS r3,r3,r5
|
|
0x10000738: 431a .C ORRS r2,r2,r3
|
|
0x1000073a: 4b0e .K LDR r3,[pc,#56] ; [0x10000774] = 0xe000e100
|
|
0x1000073c: 2503 .% MOVS r5,#3
|
|
0x1000073e: 022d -. LSLS r5,r5,#8
|
|
0x10000740: 195b [. ADDS r3,r3,r5
|
|
0x10000742: 0885 .. LSRS r5,r0,#2
|
|
0x10000744: 00ad .. LSLS r5,r5,#2
|
|
0x10000746: 515a ZQ STR r2,[r3,r5]
|
|
0x10000748: bf00 .. NOP
|
|
0x1000074a: 2000 . MOVS r0,#0
|
|
0x1000074c: 4907 .I LDR r1,[pc,#28] ; [0x1000076c] = 0xe000e000
|
|
0x1000074e: 6188 .a STR r0,[r1,#0x18]
|
|
0x10000750: 2007 . MOVS r0,#7
|
|
0x10000752: 6108 .a STR r0,[r1,#0x10]
|
|
0x10000754: bf00 .. NOP
|
|
0x10000756: 4805 .H LDR r0,[pc,#20] ; [0x1000076c] = 0xe000e000
|
|
0x10000758: 6900 .i LDR r0,[r0,#0x10]
|
|
0x1000075a: 2102 .! MOVS r1,#2
|
|
0x1000075c: 4388 .C BICS r0,r0,r1
|
|
0x1000075e: 4903 .I LDR r1,[pc,#12] ; [0x1000076c] = 0xe000e000
|
|
0x10000760: 6108 .a STR r0,[r1,#0x10]
|
|
0x10000762: bd3e >. POP {r1-r5,pc}
|
|
$d
|
|
0x10000764: 01e84800 .H.. DCD 32000000
|
|
0x10000768: 00ffffff .... DCD 16777215
|
|
0x1000076c: e000e000 .... DCD 3758153728
|
|
0x10000770: e000ed1c .... DCD 3758157084
|
|
0x10000774: e000e100 .... DCD 3758153984
|
|
$t
|
|
i.delay_ms
|
|
delay_ms
|
|
0x10000778: b510 .. PUSH {r4,lr}
|
|
0x1000077a: 4604 .F MOV r4,r0
|
|
0x1000077c: 2c00 ., CMP r4,#0
|
|
0x1000077e: d100 .. BNE 0x10000782 ; delay_ms + 10
|
|
0x10000780: bd10 .. POP {r4,pc}
|
|
0x10000782: bf00 .. NOP
|
|
0x10000784: 207d } MOVS r0,#0x7d
|
|
0x10000786: 00c0 .. LSLS r0,r0,#3
|
|
0x10000788: f000f806 .... BL delay_us ; 0x10000798
|
|
0x1000078c: 1e60 `. SUBS r0,r4,#1
|
|
0x1000078e: 1e04 .. SUBS r4,r0,#0
|
|
0x10000790: d1f8 .. BNE 0x10000784 ; delay_ms + 12
|
|
0x10000792: bf00 .. NOP
|
|
0x10000794: e7f4 .. B 0x10000780 ; delay_ms + 8
|
|
0x10000796: 0000 .. MOVS r0,r0
|
|
i.delay_us
|
|
delay_us
|
|
0x10000798: b5fe .. PUSH {r1-r7,lr}
|
|
0x1000079a: 4607 .F MOV r7,r0
|
|
0x1000079c: 2600 .& MOVS r6,#0
|
|
0x1000079e: 4811 .H LDR r0,[pc,#68] ; [0x100007e4] = 0xe000e000
|
|
0x100007a0: 6940 @i LDR r0,[r0,#0x14]
|
|
0x100007a2: 9001 .. STR r0,[sp,#4]
|
|
0x100007a4: f000fae4 .... BL xc_clock_hfclk_in_get ; 0x10000d70
|
|
0x100007a8: 490f .I LDR r1,[pc,#60] ; [0x100007e8] = 0xf4240
|
|
0x100007aa: 9000 .. STR r0,[sp,#0]
|
|
0x100007ac: f7fffd72 ..r. BL __aeabi_uidiv ; 0x10000294
|
|
0x100007b0: 4378 xC MULS r0,r7,r0
|
|
0x100007b2: 9002 .. STR r0,[sp,#8]
|
|
0x100007b4: 480b .H LDR r0,[pc,#44] ; [0x100007e4] = 0xe000e000
|
|
0x100007b6: 6985 .i LDR r5,[r0,#0x18]
|
|
0x100007b8: e011 .. B 0x100007de ; delay_us + 70
|
|
0x100007ba: 480a .H LDR r0,[pc,#40] ; [0x100007e4] = 0xe000e000
|
|
0x100007bc: 6984 .i LDR r4,[r0,#0x18]
|
|
0x100007be: 42ac .B CMP r4,r5
|
|
0x100007c0: d00d .. BEQ 0x100007de ; delay_us + 70
|
|
0x100007c2: 42ac .B CMP r4,r5
|
|
0x100007c4: d202 .. BCS 0x100007cc ; delay_us + 52
|
|
0x100007c6: 1b28 (. SUBS r0,r5,r4
|
|
0x100007c8: 1986 .. ADDS r6,r0,r6
|
|
0x100007ca: e003 .. B 0x100007d4 ; delay_us + 60
|
|
0x100007cc: 9801 .. LDR r0,[sp,#4]
|
|
0x100007ce: 1b00 .. SUBS r0,r0,r4
|
|
0x100007d0: 1940 @. ADDS r0,r0,r5
|
|
0x100007d2: 1986 .. ADDS r6,r0,r6
|
|
0x100007d4: 4625 %F MOV r5,r4
|
|
0x100007d6: 9802 .. LDR r0,[sp,#8]
|
|
0x100007d8: 4286 .B CMP r6,r0
|
|
0x100007da: d300 .. BCC 0x100007de ; delay_us + 70
|
|
0x100007dc: e000 .. B 0x100007e0 ; delay_us + 72
|
|
0x100007de: e7ec .. B 0x100007ba ; delay_us + 34
|
|
0x100007e0: bf00 .. NOP
|
|
0x100007e2: bdfe .. POP {r1-r7,pc}
|
|
$d
|
|
0x100007e4: e000e000 .... DCD 3758153728
|
|
0x100007e8: 000f4240 @B.. DCD 1000000
|
|
$t
|
|
i.ferror
|
|
ferror
|
|
0x100007ec: 4601 .F MOV r1,r0
|
|
0x100007ee: 2000 . MOVS r0,#0
|
|
0x100007f0: 43c0 .C MVNS r0,r0
|
|
0x100007f2: 4770 pG BX lr
|
|
i.gpio_intr_callback
|
|
gpio_intr_callback
|
|
0x100007f4: 4770 pG BX lr
|
|
0x100007f6: 0000 .. MOVS r0,r0
|
|
i.main
|
|
main
|
|
0x100007f8: f7ffff46 ..F. BL clock_init ; 0x10000688
|
|
0x100007fc: f7ffff10 .... BL app_uart_init ; 0x10000620
|
|
0x10000800: a00c .. ADR r0,{pc}+0x34 ; 0x10000834
|
|
0x10000802: f7fffccd .... BL __2printf ; 0x100001a0
|
|
0x10000806: f000f8fb .... BL rf_single_init ; 0x10000a00
|
|
0x1000080a: 480d .H LDR r0,[pc,#52] ; [0x10000840] = 0x96a
|
|
0x1000080c: f000f8f2 .... BL rf_set_channel ; 0x100009f4
|
|
0x10000810: 244b K$ MOVS r4,#0x4b
|
|
0x10000812: 0164 d. LSLS r4,r4,#5
|
|
0x10000814: bf00 .. NOP
|
|
0x10000816: 2064 d MOVS r0,#0x64
|
|
0x10000818: f7ffffae .... BL delay_ms ; 0x10000778
|
|
0x1000081c: 4620 F MOV r0,r4
|
|
0x1000081e: f000f8e9 .... BL rf_set_channel ; 0x100009f4
|
|
0x10000822: 1c60 `. ADDS r0,r4,#1
|
|
0x10000824: b284 .. UXTH r4,r0
|
|
0x10000826: 4806 .H LDR r0,[pc,#24] ; [0x10000840] = 0x96a
|
|
0x10000828: 3049 I0 ADDS r0,r0,#0x49
|
|
0x1000082a: 4284 .B CMP r4,r0
|
|
0x1000082c: dbf3 .. BLT 0x10000816 ; main + 30
|
|
0x1000082e: 244b K$ MOVS r4,#0x4b
|
|
0x10000830: 0164 d. LSLS r4,r4,#5
|
|
0x10000832: e7f0 .. B 0x10000816 ; main + 30
|
|
$d
|
|
0x10000834: 54535f5f __ST DCD 1414750047
|
|
0x10000838: 5f545241 ART_ DCD 1599361601
|
|
0x1000083c: 00000a5f _... DCD 2655
|
|
0x10000840: 0000096a j... DCD 2410
|
|
$t
|
|
i.nop_cnt
|
|
nop_cnt
|
|
0x10000844: 2100 .! MOVS r1,#0
|
|
0x10000846: e001 .. B 0x1000084c ; nop_cnt + 8
|
|
0x10000848: bf00 .. NOP
|
|
0x1000084a: 1c49 I. ADDS r1,r1,#1
|
|
0x1000084c: 4281 .B CMP r1,r0
|
|
0x1000084e: d3fb .. BCC 0x10000848 ; nop_cnt + 4
|
|
0x10000850: 4770 pG BX lr
|
|
0x10000852: 0000 .. MOVS r0,r0
|
|
i.reset_rf2_4g
|
|
reset_rf2_4g
|
|
0x10000854: b510 .. PUSH {r4,lr}
|
|
0x10000856: 2400 .$ MOVS r4,#0
|
|
0x10000858: bf00 .. NOP
|
|
0x1000085a: 480c .H LDR r0,[pc,#48] ; [0x1000088c] = 0x40000180
|
|
0x1000085c: 6b40 @k LDR r0,[r0,#0x34]
|
|
0x1000085e: 4604 .F MOV r4,r0
|
|
0x10000860: 2101 .! MOVS r1,#1
|
|
0x10000862: 0549 I. LSLS r1,r1,#21
|
|
0x10000864: 4620 F MOV r0,r4
|
|
0x10000866: 4388 .C BICS r0,r0,r1
|
|
0x10000868: 4908 .I LDR r1,[pc,#32] ; [0x1000088c] = 0x40000180
|
|
0x1000086a: 6348 Hc STR r0,[r1,#0x34]
|
|
0x1000086c: bf00 .. NOP
|
|
0x1000086e: 2002 . MOVS r0,#2
|
|
0x10000870: f7ffff82 .... BL delay_ms ; 0x10000778
|
|
0x10000874: 2101 .! MOVS r1,#1
|
|
0x10000876: 0549 I. LSLS r1,r1,#21
|
|
0x10000878: 4620 F MOV r0,r4
|
|
0x1000087a: 4308 .C ORRS r0,r0,r1
|
|
0x1000087c: 4903 .I LDR r1,[pc,#12] ; [0x1000088c] = 0x40000180
|
|
0x1000087e: 6348 Hc STR r0,[r1,#0x34]
|
|
0x10000880: bf00 .. NOP
|
|
0x10000882: 2001 . MOVS r0,#1
|
|
0x10000884: f7ffff78 ..x. BL delay_ms ; 0x10000778
|
|
0x10000888: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x1000088a: 0000 .. DCW 0
|
|
0x1000088c: 40000180 ...@ DCD 1073742208
|
|
$t
|
|
i.rf24g_config
|
|
rf24g_config
|
|
0x10000890: b510 .. PUSH {r4,lr}
|
|
0x10000892: 4835 5H LDR r0,[pc,#212] ; [0x10000968] = 0x53021088
|
|
0x10000894: 8e00 .. LDRH r0,[r0,#0x30]
|
|
0x10000896: 2107 .! MOVS r1,#7
|
|
0x10000898: 0349 I. LSLS r1,r1,#13
|
|
0x1000089a: 4308 .C ORRS r0,r0,r1
|
|
0x1000089c: 4932 2I LDR r1,[pc,#200] ; [0x10000968] = 0x53021088
|
|
0x1000089e: 8608 .. STRH r0,[r1,#0x30]
|
|
0x100008a0: 4831 1H LDR r0,[pc,#196] ; [0x10000968] = 0x53021088
|
|
0x100008a2: 3848 H8 SUBS r0,r0,#0x48
|
|
0x100008a4: 8a80 .. LDRH r0,[r0,#0x14]
|
|
0x100008a6: 2107 .! MOVS r1,#7
|
|
0x100008a8: 0309 .. LSLS r1,r1,#12
|
|
0x100008aa: 4388 .C BICS r0,r0,r1
|
|
0x100008ac: 2103 .! MOVS r1,#3
|
|
0x100008ae: 0309 .. LSLS r1,r1,#12
|
|
0x100008b0: 1840 @. ADDS r0,r0,r1
|
|
0x100008b2: 492d -I LDR r1,[pc,#180] ; [0x10000968] = 0x53021088
|
|
0x100008b4: 3948 H9 SUBS r1,r1,#0x48
|
|
0x100008b6: 8288 .. STRH r0,[r1,#0x14]
|
|
0x100008b8: 482b +H LDR r0,[pc,#172] ; [0x10000968] = 0x53021088
|
|
0x100008ba: 3828 (8 SUBS r0,r0,#0x28
|
|
0x100008bc: 8a80 .. LDRH r0,[r0,#0x14]
|
|
0x100008be: 2102 .! MOVS r1,#2
|
|
0x100008c0: 4308 .C ORRS r0,r0,r1
|
|
0x100008c2: 4929 )I LDR r1,[pc,#164] ; [0x10000968] = 0x53021088
|
|
0x100008c4: 3928 (9 SUBS r1,r1,#0x28
|
|
0x100008c6: 8288 .. STRH r0,[r1,#0x14]
|
|
0x100008c8: 4608 .F MOV r0,r1
|
|
0x100008ca: 8a00 .. LDRH r0,[r0,#0x10]
|
|
0x100008cc: 2101 .! MOVS r1,#1
|
|
0x100008ce: 4308 .C ORRS r0,r0,r1
|
|
0x100008d0: 4925 %I LDR r1,[pc,#148] ; [0x10000968] = 0x53021088
|
|
0x100008d2: 3928 (9 SUBS r1,r1,#0x28
|
|
0x100008d4: 8208 .. STRH r0,[r1,#0x10]
|
|
0x100008d6: f7ffffbd .... BL reset_rf2_4g ; 0x10000854
|
|
0x100008da: 4824 $H LDR r0,[pc,#144] ; [0x1000096c] = 0x20c010
|
|
0x100008dc: 4924 $I LDR r1,[pc,#144] ; [0x10000970] = 0x40000180
|
|
0x100008de: 6348 Hc STR r0,[r1,#0x34]
|
|
0x100008e0: bf00 .. NOP
|
|
0x100008e2: 2001 . MOVS r0,#1
|
|
0x100008e4: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x100008e6: 0282 .. LSLS r2,r0,#10
|
|
0x100008e8: 4391 .C BICS r1,r1,r2
|
|
0x100008ea: 0282 .. LSLS r2,r0,#10
|
|
0x100008ec: 4311 .C ORRS r1,r1,r2
|
|
0x100008ee: 4a20 J LDR r2,[pc,#128] ; [0x10000970] = 0x40000180
|
|
0x100008f0: 6311 .c STR r1,[r2,#0x30]
|
|
0x100008f2: bf00 .. NOP
|
|
0x100008f4: bf00 .. NOP
|
|
0x100008f6: 4611 .F MOV r1,r2
|
|
0x100008f8: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x100008fa: 0242 B. LSLS r2,r0,#9
|
|
0x100008fc: 4391 .C BICS r1,r1,r2
|
|
0x100008fe: 0242 B. LSLS r2,r0,#9
|
|
0x10000900: 4311 .C ORRS r1,r1,r2
|
|
0x10000902: 4a1b .J LDR r2,[pc,#108] ; [0x10000970] = 0x40000180
|
|
0x10000904: 6311 .c STR r1,[r2,#0x30]
|
|
0x10000906: bf00 .. NOP
|
|
0x10000908: 481a .H LDR r0,[pc,#104] ; [0x10000974] = 0x53022040
|
|
0x1000090a: 6800 .h LDR r0,[r0,#0]
|
|
0x1000090c: 2107 .! MOVS r1,#7
|
|
0x1000090e: 0209 .. LSLS r1,r1,#8
|
|
0x10000910: 4308 .C ORRS r0,r0,r1
|
|
0x10000912: 4918 .I LDR r1,[pc,#96] ; [0x10000974] = 0x53022040
|
|
0x10000914: 6008 .` STR r0,[r1,#0]
|
|
0x10000916: 4814 .H LDR r0,[pc,#80] ; [0x10000968] = 0x53021088
|
|
0x10000918: 8e80 .. LDRH r0,[r0,#0x34]
|
|
0x1000091a: 1451 Q. ASRS r1,r2,#17
|
|
0x1000091c: 4308 .C ORRS r0,r0,r1
|
|
0x1000091e: 4912 .I LDR r1,[pc,#72] ; [0x10000968] = 0x53021088
|
|
0x10000920: 8688 .. STRH r0,[r1,#0x34]
|
|
0x10000922: 4608 .F MOV r0,r1
|
|
0x10000924: 8e80 .. LDRH r0,[r0,#0x34]
|
|
0x10000926: 1491 .. ASRS r1,r2,#18
|
|
0x10000928: 4388 .C BICS r0,r0,r1
|
|
0x1000092a: 490f .I LDR r1,[pc,#60] ; [0x10000968] = 0x53021088
|
|
0x1000092c: 8688 .. STRH r0,[r1,#0x34]
|
|
0x1000092e: 4608 .F MOV r0,r1
|
|
0x10000930: 8e80 .. LDRH r0,[r0,#0x34]
|
|
0x10000932: 1451 Q. ASRS r1,r2,#17
|
|
0x10000934: 4308 .C ORRS r0,r0,r1
|
|
0x10000936: 490c .I LDR r1,[pc,#48] ; [0x10000968] = 0x53021088
|
|
0x10000938: 8688 .. STRH r0,[r1,#0x34]
|
|
0x1000093a: 4608 .F MOV r0,r1
|
|
0x1000093c: 8e80 .. LDRH r0,[r0,#0x34]
|
|
0x1000093e: 1491 .. ASRS r1,r2,#18
|
|
0x10000940: 4388 .C BICS r0,r0,r1
|
|
0x10000942: 4909 .I LDR r1,[pc,#36] ; [0x10000968] = 0x53021088
|
|
0x10000944: 8688 .. STRH r0,[r1,#0x34]
|
|
0x10000946: 4808 .H LDR r0,[pc,#32] ; [0x10000968] = 0x53021088
|
|
0x10000948: 3888 .8 SUBS r0,r0,#0x88
|
|
0x1000094a: 8900 .. LDRH r0,[r0,#8]
|
|
0x1000094c: 490a .I LDR r1,[pc,#40] ; [0x10000978] = 0xffff1e1f
|
|
0x1000094e: 4008 .@ ANDS r0,r0,r1
|
|
0x10000950: 4905 .I LDR r1,[pc,#20] ; [0x10000968] = 0x53021088
|
|
0x10000952: 3988 .9 SUBS r1,r1,#0x88
|
|
0x10000954: 8108 .. STRH r0,[r1,#8]
|
|
0x10000956: 4608 .F MOV r0,r1
|
|
0x10000958: 8900 .. LDRH r0,[r0,#8]
|
|
0x1000095a: 4908 .I LDR r1,[pc,#32] ; [0x1000097c] = 0x6120
|
|
0x1000095c: 4308 .C ORRS r0,r0,r1
|
|
0x1000095e: 4902 .I LDR r1,[pc,#8] ; [0x10000968] = 0x53021088
|
|
0x10000960: 3988 .9 SUBS r1,r1,#0x88
|
|
0x10000962: 8108 .. STRH r0,[r1,#8]
|
|
0x10000964: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x10000966: 0000 .. DCW 0
|
|
0x10000968: 53021088 ...S DCD 1392644232
|
|
0x1000096c: 0020c010 .. . DCD 2146320
|
|
0x10000970: 40000180 ...@ DCD 1073742208
|
|
0x10000974: 53022040 @ .S DCD 1392648256
|
|
0x10000978: ffff1e1f .... DCD 4294909471
|
|
0x1000097c: 00006120 a.. DCD 24864
|
|
$t
|
|
i.rf24g_modem_init
|
|
rf24g_modem_init
|
|
0x10000980: 2001 . MOVS r0,#1
|
|
0x10000982: 4919 .I LDR r1,[pc,#100] ; [0x100009e8] = 0x40000040
|
|
0x10000984: 6809 .h LDR r1,[r1,#0]
|
|
0x10000986: 2210 ." MOVS r2,#0x10
|
|
0x10000988: 4391 .C BICS r1,r1,r2
|
|
0x1000098a: 0102 .. LSLS r2,r0,#4
|
|
0x1000098c: 0503 .. LSLS r3,r0,#20
|
|
0x1000098e: 18d2 .. ADDS r2,r2,r3
|
|
0x10000990: 4311 .C ORRS r1,r1,r2
|
|
0x10000992: 4a15 .J LDR r2,[pc,#84] ; [0x100009e8] = 0x40000040
|
|
0x10000994: 6011 .` STR r1,[r2,#0]
|
|
0x10000996: bf00 .. NOP
|
|
0x10000998: bf00 .. NOP
|
|
0x1000099a: 4611 .F MOV r1,r2
|
|
0x1000099c: 6889 .h LDR r1,[r1,#8]
|
|
0x1000099e: 2210 ." MOVS r2,#0x10
|
|
0x100009a0: 4391 .C BICS r1,r1,r2
|
|
0x100009a2: 0102 .. LSLS r2,r0,#4
|
|
0x100009a4: 18d2 .. ADDS r2,r2,r3
|
|
0x100009a6: 4311 .C ORRS r1,r1,r2
|
|
0x100009a8: 4a0f .J LDR r2,[pc,#60] ; [0x100009e8] = 0x40000040
|
|
0x100009aa: 6091 .` STR r1,[r2,#8]
|
|
0x100009ac: bf00 .. NOP
|
|
0x100009ae: bf00 .. NOP
|
|
0x100009b0: 4611 .F MOV r1,r2
|
|
0x100009b2: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x100009b4: 0282 .. LSLS r2,r0,#10
|
|
0x100009b6: 4391 .C BICS r1,r1,r2
|
|
0x100009b8: 0282 .. LSLS r2,r0,#10
|
|
0x100009ba: 0683 .. LSLS r3,r0,#26
|
|
0x100009bc: 18d2 .. ADDS r2,r2,r3
|
|
0x100009be: 4311 .C ORRS r1,r1,r2
|
|
0x100009c0: 4a09 .J LDR r2,[pc,#36] ; [0x100009e8] = 0x40000040
|
|
0x100009c2: 6311 .c STR r1,[r2,#0x30]
|
|
0x100009c4: bf00 .. NOP
|
|
0x100009c6: bf00 .. NOP
|
|
0x100009c8: 4908 .I LDR r1,[pc,#32] ; [0x100009ec] = 0x40002440
|
|
0x100009ca: 6108 .a STR r0,[r1,#0x10]
|
|
0x100009cc: bf00 .. NOP
|
|
0x100009ce: 4808 .H LDR r0,[pc,#32] ; [0x100009f0] = 0x53021040
|
|
0x100009d0: 8900 .. LDRH r0,[r0,#8]
|
|
0x100009d2: 0980 .. LSRS r0,r0,#6
|
|
0x100009d4: 0180 .. LSLS r0,r0,#6
|
|
0x100009d6: 4906 .I LDR r1,[pc,#24] ; [0x100009f0] = 0x53021040
|
|
0x100009d8: 8108 .. STRH r0,[r1,#8]
|
|
0x100009da: 4608 .F MOV r0,r1
|
|
0x100009dc: 8900 .. LDRH r0,[r0,#8]
|
|
0x100009de: 2108 .! MOVS r1,#8
|
|
0x100009e0: 4308 .C ORRS r0,r0,r1
|
|
0x100009e2: 4903 .I LDR r1,[pc,#12] ; [0x100009f0] = 0x53021040
|
|
0x100009e4: 8108 .. STRH r0,[r1,#8]
|
|
0x100009e6: 4770 pG BX lr
|
|
$d
|
|
0x100009e8: 40000040 @..@ DCD 1073741888
|
|
0x100009ec: 40002440 @$.@ DCD 1073751104
|
|
0x100009f0: 53021040 @..S DCD 1392644160
|
|
$t
|
|
i.rf_set_channel
|
|
rf_set_channel
|
|
0x100009f4: b510 .. PUSH {r4,lr}
|
|
0x100009f6: 4604 .F MOV r4,r0
|
|
0x100009f8: 4620 F MOV r0,r4
|
|
0x100009fa: f000f855 ..U. BL set_rf_channel ; 0x10000aa8
|
|
0x100009fe: bd10 .. POP {r4,pc}
|
|
i.rf_single_init
|
|
rf_single_init
|
|
0x10000a00: b510 .. PUSH {r4,lr}
|
|
0x10000a02: f7ffffbd .... BL rf24g_modem_init ; 0x10000980
|
|
0x10000a06: f7ffff43 ..C. BL rf24g_config ; 0x10000890
|
|
0x10000a0a: 2000 . MOVS r0,#0
|
|
0x10000a0c: 4906 .I LDR r1,[pc,#24] ; [0x10000a28] = 0x53023080
|
|
0x10000a0e: 6088 .` STR r0,[r1,#8]
|
|
0x10000a10: 2003 . MOVS r0,#3
|
|
0x10000a12: f000f843 ..C. BL set_rf_DR ; 0x10000a9c
|
|
0x10000a16: 4805 .H LDR r0,[pc,#20] ; [0x10000a2c] = 0x298272
|
|
0x10000a18: 4903 .I LDR r1,[pc,#12] ; [0x10000a28] = 0x53023080
|
|
0x10000a1a: 3980 .9 SUBS r1,r1,#0x80
|
|
0x10000a1c: 6008 .` STR r0,[r1,#0]
|
|
0x10000a1e: 2008 . MOVS r0,#8
|
|
0x10000a20: f000f86a ..j. BL set_rf_power ; 0x10000af8
|
|
0x10000a24: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x10000a26: 0000 .. DCW 0
|
|
0x10000a28: 53023080 .0.S DCD 1392652416
|
|
0x10000a2c: 00298272 r.). DCD 2720370
|
|
$t
|
|
i.ring_buffer_create
|
|
ring_buffer_create
|
|
0x10000a30: 2800 .( CMP r0,#0
|
|
0x10000a32: d003 .. BEQ 0x10000a3c ; ring_buffer_create + 12
|
|
0x10000a34: 2900 .) CMP r1,#0
|
|
0x10000a36: d001 .. BEQ 0x10000a3c ; ring_buffer_create + 12
|
|
0x10000a38: 2a00 .* CMP r2,#0
|
|
0x10000a3a: d100 .. BNE 0x10000a3e ; ring_buffer_create + 14
|
|
0x10000a3c: 4770 pG BX lr
|
|
0x10000a3e: 6001 .` STR r1,[r0,#0]
|
|
0x10000a40: 6042 B` STR r2,[r0,#4]
|
|
0x10000a42: 2300 .# MOVS r3,#0
|
|
0x10000a44: 6083 .` STR r3,[r0,#8]
|
|
0x10000a46: 60c3 .` STR r3,[r0,#0xc]
|
|
0x10000a48: 7403 .t STRB r3,[r0,#0x10]
|
|
0x10000a4a: bf00 .. NOP
|
|
0x10000a4c: e7f6 .. B 0x10000a3c ; ring_buffer_create + 12
|
|
i.ring_buffer_is_full
|
|
ring_buffer_is_full
|
|
0x10000a4e: 4601 .F MOV r1,r0
|
|
0x10000a50: 688a .h LDR r2,[r1,#8]
|
|
0x10000a52: 68c8 .h LDR r0,[r1,#0xc]
|
|
0x10000a54: 1a80 .. SUBS r0,r0,r2
|
|
0x10000a56: 684a Jh LDR r2,[r1,#4]
|
|
0x10000a58: 1e52 R. SUBS r2,r2,#1
|
|
0x10000a5a: 4010 .@ ANDS r0,r0,r2
|
|
0x10000a5c: 684a Jh LDR r2,[r1,#4]
|
|
0x10000a5e: 1e52 R. SUBS r2,r2,#1
|
|
0x10000a60: 4290 .B CMP r0,r2
|
|
0x10000a62: d101 .. BNE 0x10000a68 ; ring_buffer_is_full + 26
|
|
0x10000a64: 2001 . MOVS r0,#1
|
|
0x10000a66: 4770 pG BX lr
|
|
0x10000a68: 2000 . MOVS r0,#0
|
|
0x10000a6a: e7fc .. B 0x10000a66 ; ring_buffer_is_full + 24
|
|
i.ring_buffer_queue
|
|
ring_buffer_queue
|
|
0x10000a6c: b570 p. PUSH {r4-r6,lr}
|
|
0x10000a6e: 4604 .F MOV r4,r0
|
|
0x10000a70: 460d .F MOV r5,r1
|
|
0x10000a72: 4620 F MOV r0,r4
|
|
0x10000a74: f7ffffeb .... BL ring_buffer_is_full ; 0x10000a4e
|
|
0x10000a78: 2800 .( CMP r0,#0
|
|
0x10000a7a: d005 .. BEQ 0x10000a88 ; ring_buffer_queue + 28
|
|
0x10000a7c: 68a0 .h LDR r0,[r4,#8]
|
|
0x10000a7e: 1c40 @. ADDS r0,r0,#1
|
|
0x10000a80: 6861 ah LDR r1,[r4,#4]
|
|
0x10000a82: 1e49 I. SUBS r1,r1,#1
|
|
0x10000a84: 4008 .@ ANDS r0,r0,r1
|
|
0x10000a86: 60a0 .` STR r0,[r4,#8]
|
|
0x10000a88: 68e1 .h LDR r1,[r4,#0xc]
|
|
0x10000a8a: 6820 h LDR r0,[r4,#0]
|
|
0x10000a8c: 5445 ET STRB r5,[r0,r1]
|
|
0x10000a8e: 68e0 .h LDR r0,[r4,#0xc]
|
|
0x10000a90: 1c40 @. ADDS r0,r0,#1
|
|
0x10000a92: 6861 ah LDR r1,[r4,#4]
|
|
0x10000a94: 1e49 I. SUBS r1,r1,#1
|
|
0x10000a96: 4008 .@ ANDS r0,r0,r1
|
|
0x10000a98: 60e0 .` STR r0,[r4,#0xc]
|
|
0x10000a9a: bd70 p. POP {r4-r6,pc}
|
|
i.set_rf_DR
|
|
set_rf_DR
|
|
0x10000a9c: 4901 .I LDR r1,[pc,#4] ; [0x10000aa4] = 0x53023000
|
|
0x10000a9e: 6188 .a STR r0,[r1,#0x18]
|
|
0x10000aa0: 4770 pG BX lr
|
|
$d
|
|
0x10000aa2: 0000 .. DCW 0
|
|
0x10000aa4: 53023000 .0.S DCD 1392652288
|
|
$t
|
|
i.set_rf_channel
|
|
set_rf_channel
|
|
0x10000aa8: b510 .. PUSH {r4,lr}
|
|
0x10000aaa: 4604 .F MOV r4,r0
|
|
0x10000aac: 4810 .H LDR r0,[pc,#64] ; [0x10000af0] = 0x53023000
|
|
0x10000aae: 6800 .h LDR r0,[r0,#0]
|
|
0x10000ab0: 07c0 .. LSLS r0,r0,#31
|
|
0x10000ab2: 0fc0 .. LSRS r0,r0,#31
|
|
0x10000ab4: 2800 .( CMP r0,#0
|
|
0x10000ab6: d001 .. BEQ 0x10000abc ; set_rf_channel + 20
|
|
0x10000ab8: 1e60 `. SUBS r0,r4,#1
|
|
0x10000aba: e000 .. B 0x10000abe ; set_rf_channel + 22
|
|
0x10000abc: 4620 F MOV r0,r4
|
|
0x10000abe: 490c .I LDR r1,[pc,#48] ; [0x10000af0] = 0x53023000
|
|
0x10000ac0: 6148 Ha STR r0,[r1,#0x14]
|
|
0x10000ac2: 2001 . MOVS r0,#1
|
|
0x10000ac4: f7fffe68 ..h. BL delay_us ; 0x10000798
|
|
0x10000ac8: 480a .H LDR r0,[pc,#40] ; [0x10000af4] = 0x53021060
|
|
0x10000aca: 8a00 .. LDRH r0,[r0,#0x10]
|
|
0x10000acc: 0840 @. LSRS r0,r0,#1
|
|
0x10000ace: 0040 @. LSLS r0,r0,#1
|
|
0x10000ad0: 4908 .I LDR r1,[pc,#32] ; [0x10000af4] = 0x53021060
|
|
0x10000ad2: 8208 .. STRH r0,[r1,#0x10]
|
|
0x10000ad4: 2001 . MOVS r0,#1
|
|
0x10000ad6: f7fffe5f .._. BL delay_us ; 0x10000798
|
|
0x10000ada: 4806 .H LDR r0,[pc,#24] ; [0x10000af4] = 0x53021060
|
|
0x10000adc: 8a00 .. LDRH r0,[r0,#0x10]
|
|
0x10000ade: 2101 .! MOVS r1,#1
|
|
0x10000ae0: 4308 .C ORRS r0,r0,r1
|
|
0x10000ae2: 4904 .I LDR r1,[pc,#16] ; [0x10000af4] = 0x53021060
|
|
0x10000ae4: 8208 .. STRH r0,[r1,#0x10]
|
|
0x10000ae6: 2001 . MOVS r0,#1
|
|
0x10000ae8: f7fffe56 ..V. BL delay_us ; 0x10000798
|
|
0x10000aec: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x10000aee: 0000 .. DCW 0
|
|
0x10000af0: 53023000 .0.S DCD 1392652288
|
|
0x10000af4: 53021060 `..S DCD 1392644192
|
|
$t
|
|
i.set_rf_power
|
|
set_rf_power
|
|
0x10000af8: 4909 .I LDR r1,[pc,#36] ; [0x10000b20] = 0x53021040
|
|
0x10000afa: 8a89 .. LDRH r1,[r1,#0x14]
|
|
0x10000afc: 223f ?" MOVS r2,#0x3f
|
|
0x10000afe: 0192 .. LSLS r2,r2,#6
|
|
0x10000b00: 4391 .C BICS r1,r1,r2
|
|
0x10000b02: 0682 .. LSLS r2,r0,#26
|
|
0x10000b04: 0d12 .. LSRS r2,r2,#20
|
|
0x10000b06: 4311 .C ORRS r1,r1,r2
|
|
0x10000b08: 4a05 .J LDR r2,[pc,#20] ; [0x10000b20] = 0x53021040
|
|
0x10000b0a: 8291 .. STRH r1,[r2,#0x14]
|
|
0x10000b0c: 4905 .I LDR r1,[pc,#20] ; [0x10000b24] = 0x53023000
|
|
0x10000b0e: 6949 Ii LDR r1,[r1,#0x14]
|
|
0x10000b10: 223f ?" MOVS r2,#0x3f
|
|
0x10000b12: 0412 .. LSLS r2,r2,#16
|
|
0x10000b14: 4391 .C BICS r1,r1,r2
|
|
0x10000b16: 0402 .. LSLS r2,r0,#16
|
|
0x10000b18: 4311 .C ORRS r1,r1,r2
|
|
0x10000b1a: 4a02 .J LDR r2,[pc,#8] ; [0x10000b24] = 0x53023000
|
|
0x10000b1c: 6151 Qa STR r1,[r2,#0x14]
|
|
0x10000b1e: 4770 pG BX lr
|
|
$d
|
|
0x10000b20: 53021040 @..S DCD 1392644160
|
|
0x10000b24: 53023000 .0.S DCD 1392652288
|
|
$t
|
|
i.systick_callback
|
|
systick_callback
|
|
0x10000b28: 4770 pG BX lr
|
|
0x10000b2a: 0000 .. MOVS r0,r0
|
|
i.uart_handler_callback
|
|
uart_handler_callback
|
|
0x10000b2c: b5f8 .. PUSH {r3-r7,lr}
|
|
0x10000b2e: 4604 .F MOV r4,r0
|
|
0x10000b30: 2c00 ., CMP r4,#0
|
|
0x10000b32: d100 .. BNE 0x10000b36 ; uart_handler_callback + 10
|
|
0x10000b34: e004 .. B 0x10000b40 ; uart_handler_callback + 20
|
|
0x10000b36: 2c01 ., CMP r4,#1
|
|
0x10000b38: d101 .. BNE 0x10000b3e ; uart_handler_callback + 18
|
|
0x10000b3a: 2001 . MOVS r0,#1
|
|
0x10000b3c: e000 .. B 0x10000b40 ; uart_handler_callback + 20
|
|
0x10000b3e: 2002 . MOVS r0,#2
|
|
0x10000b40: 9000 .. STR r0,[sp,#0]
|
|
0x10000b42: bf00 .. NOP
|
|
0x10000b44: 0061 a. LSLS r1,r4,#1
|
|
0x10000b46: 4a35 5J LDR r2,[pc,#212] ; [0x10000c1c] = 0x10001b5e
|
|
0x10000b48: 5a51 QZ LDRH r1,[r2,r1]
|
|
0x10000b4a: 4a35 5J LDR r2,[pc,#212] ; [0x10000c20] = 0x40010000
|
|
0x10000b4c: 1889 .. ADDS r1,r1,r2
|
|
0x10000b4e: 6888 .h LDR r0,[r1,#8]
|
|
0x10000b50: 0706 .. LSLS r6,r0,#28
|
|
0x10000b52: 0f36 6. LSRS r6,r6,#28
|
|
0x10000b54: bf00 .. NOP
|
|
0x10000b56: bf00 .. NOP
|
|
0x10000b58: 0060 `. LSLS r0,r4,#1
|
|
0x10000b5a: 4930 0I LDR r1,[pc,#192] ; [0x10000c1c] = 0x10001b5e
|
|
0x10000b5c: 5a08 .Z LDRH r0,[r1,r0]
|
|
0x10000b5e: 4611 .F MOV r1,r2
|
|
0x10000b60: 1840 @. ADDS r0,r0,r1
|
|
0x10000b62: 6945 Ei LDR r5,[r0,#0x14]
|
|
0x10000b64: bf00 .. NOP
|
|
0x10000b66: 2e06 .. CMP r6,#6
|
|
0x10000b68: d103 .. BNE 0x10000b72 ; uart_handler_callback + 70
|
|
0x10000b6a: 21cc .! MOVS r1,#0xcc
|
|
0x10000b6c: a02d -. ADR r0,{pc}+0xb8 ; 0x10000c24
|
|
0x10000b6e: f7fffb17 .... BL __2printf ; 0x100001a0
|
|
0x10000b72: 0730 0. LSLS r0,r6,#28
|
|
0x10000b74: 0f00 .. LSRS r0,r0,#28
|
|
0x10000b76: 2804 .( CMP r0,#4
|
|
0x10000b78: d125 %. BNE 0x10000bc6 ; uart_handler_callback + 154
|
|
0x10000b7a: bf00 .. NOP
|
|
0x10000b7c: 0060 `. LSLS r0,r4,#1
|
|
0x10000b7e: 4927 'I LDR r1,[pc,#156] ; [0x10000c1c] = 0x10001b5e
|
|
0x10000b80: 5a08 .Z LDRH r0,[r1,r0]
|
|
0x10000b82: 4927 'I LDR r1,[pc,#156] ; [0x10000c20] = 0x40010000
|
|
0x10000b84: 1840 @. ADDS r0,r0,r1
|
|
0x10000b86: 6940 @i LDR r0,[r0,#0x14]
|
|
0x10000b88: 4605 .F MOV r5,r0
|
|
0x10000b8a: e018 .. B 0x10000bbe ; uart_handler_callback + 146
|
|
0x10000b8c: bf00 .. NOP
|
|
0x10000b8e: 0061 a. LSLS r1,r4,#1
|
|
0x10000b90: 4a22 "J LDR r2,[pc,#136] ; [0x10000c1c] = 0x10001b5e
|
|
0x10000b92: 5a51 QZ LDRH r1,[r2,r1]
|
|
0x10000b94: 4a22 "J LDR r2,[pc,#136] ; [0x10000c20] = 0x40010000
|
|
0x10000b96: 1889 .. ADDS r1,r1,r2
|
|
0x10000b98: 6808 .h LDR r0,[r1,#0]
|
|
0x10000b9a: b2c7 .. UXTB r7,r0
|
|
0x10000b9c: bf00 .. NOP
|
|
0x10000b9e: bf00 .. NOP
|
|
0x10000ba0: 0060 `. LSLS r0,r4,#1
|
|
0x10000ba2: 491e .I LDR r1,[pc,#120] ; [0x10000c1c] = 0x10001b5e
|
|
0x10000ba4: 5a08 .Z LDRH r0,[r1,r0]
|
|
0x10000ba6: 4611 .F MOV r1,r2
|
|
0x10000ba8: 1840 @. ADDS r0,r0,r1
|
|
0x10000baa: 6945 Ei LDR r5,[r0,#0x14]
|
|
0x10000bac: bf00 .. NOP
|
|
0x10000bae: 2214 ." MOVS r2,#0x14
|
|
0x10000bb0: 9900 .. LDR r1,[sp,#0]
|
|
0x10000bb2: 4351 QC MULS r1,r2,r1
|
|
0x10000bb4: 4a21 !J LDR r2,[pc,#132] ; [0x10000c3c] = 0x10001c54
|
|
0x10000bb6: 1888 .. ADDS r0,r1,r2
|
|
0x10000bb8: 4639 9F MOV r1,r7
|
|
0x10000bba: f7ffff57 ..W. BL ring_buffer_queue ; 0x10000a6c
|
|
0x10000bbe: 07e8 .. LSLS r0,r5,#31
|
|
0x10000bc0: 0fc0 .. LSRS r0,r0,#31
|
|
0x10000bc2: 2800 .( CMP r0,#0
|
|
0x10000bc4: d1e2 .. BNE 0x10000b8c ; uart_handler_callback + 96
|
|
0x10000bc6: 0730 0. LSLS r0,r6,#28
|
|
0x10000bc8: 0f00 .. LSRS r0,r0,#28
|
|
0x10000bca: 280c .( CMP r0,#0xc
|
|
0x10000bcc: d125 %. BNE 0x10000c1a ; uart_handler_callback + 238
|
|
0x10000bce: bf00 .. NOP
|
|
0x10000bd0: 0060 `. LSLS r0,r4,#1
|
|
0x10000bd2: 4912 .I LDR r1,[pc,#72] ; [0x10000c1c] = 0x10001b5e
|
|
0x10000bd4: 5a08 .Z LDRH r0,[r1,r0]
|
|
0x10000bd6: 4912 .I LDR r1,[pc,#72] ; [0x10000c20] = 0x40010000
|
|
0x10000bd8: 1840 @. ADDS r0,r0,r1
|
|
0x10000bda: 6940 @i LDR r0,[r0,#0x14]
|
|
0x10000bdc: 4605 .F MOV r5,r0
|
|
0x10000bde: e018 .. B 0x10000c12 ; uart_handler_callback + 230
|
|
0x10000be0: bf00 .. NOP
|
|
0x10000be2: 0061 a. LSLS r1,r4,#1
|
|
0x10000be4: 4a0d .J LDR r2,[pc,#52] ; [0x10000c1c] = 0x10001b5e
|
|
0x10000be6: 5a51 QZ LDRH r1,[r2,r1]
|
|
0x10000be8: 4a0d .J LDR r2,[pc,#52] ; [0x10000c20] = 0x40010000
|
|
0x10000bea: 1889 .. ADDS r1,r1,r2
|
|
0x10000bec: 6808 .h LDR r0,[r1,#0]
|
|
0x10000bee: b2c7 .. UXTB r7,r0
|
|
0x10000bf0: bf00 .. NOP
|
|
0x10000bf2: bf00 .. NOP
|
|
0x10000bf4: 0060 `. LSLS r0,r4,#1
|
|
0x10000bf6: 4909 .I LDR r1,[pc,#36] ; [0x10000c1c] = 0x10001b5e
|
|
0x10000bf8: 5a08 .Z LDRH r0,[r1,r0]
|
|
0x10000bfa: 4611 .F MOV r1,r2
|
|
0x10000bfc: 1840 @. ADDS r0,r0,r1
|
|
0x10000bfe: 6945 Ei LDR r5,[r0,#0x14]
|
|
0x10000c00: bf00 .. NOP
|
|
0x10000c02: 2214 ." MOVS r2,#0x14
|
|
0x10000c04: 9900 .. LDR r1,[sp,#0]
|
|
0x10000c06: 4351 QC MULS r1,r2,r1
|
|
0x10000c08: 4a0c .J LDR r2,[pc,#48] ; [0x10000c3c] = 0x10001c54
|
|
0x10000c0a: 1888 .. ADDS r0,r1,r2
|
|
0x10000c0c: 4639 9F MOV r1,r7
|
|
0x10000c0e: f7ffff2d ..-. BL ring_buffer_queue ; 0x10000a6c
|
|
0x10000c12: 07e8 .. LSLS r0,r5,#31
|
|
0x10000c14: 0fc0 .. LSRS r0,r0,#31
|
|
0x10000c16: 2800 .( CMP r0,#0
|
|
0x10000c18: d1e2 .. BNE 0x10000be0 ; uart_handler_callback + 180
|
|
0x10000c1a: bdf8 .. POP {r3-r7,pc}
|
|
$d
|
|
0x10000c1c: 10001b5e ^... DCD 268442462
|
|
0x10000c20: 40010000 ...@ DCD 1073807360
|
|
0x10000c24: 656e696c line DCD 1701734764
|
|
0x10000c28: 2c64253d =%d, DCD 744760637
|
|
0x10000c2c: 72726520 err DCD 1920099616
|
|
0x10000c30: 6820726f or h DCD 1746956911
|
|
0x10000c34: 6c646e61 andl DCD 1818521185
|
|
0x10000c38: 000a2065 e .. DCD 663653
|
|
0x10000c3c: 10001c54 T... DCD 268442708
|
|
$t
|
|
i.xc_clock_bbpll_common_cfg
|
|
xc_clock_bbpll_common_cfg
|
|
0x10000c40: 2001 . MOVS r0,#1
|
|
0x10000c42: 4913 .I LDR r1,[pc,#76] ; [0x10000c90] = 0x40000040
|
|
0x10000c44: 6809 .h LDR r1,[r1,#0]
|
|
0x10000c46: 2210 ." MOVS r2,#0x10
|
|
0x10000c48: 4391 .C BICS r1,r1,r2
|
|
0x10000c4a: 0102 .. LSLS r2,r0,#4
|
|
0x10000c4c: 0503 .. LSLS r3,r0,#20
|
|
0x10000c4e: 18d2 .. ADDS r2,r2,r3
|
|
0x10000c50: 4311 .C ORRS r1,r1,r2
|
|
0x10000c52: 4a0f .J LDR r2,[pc,#60] ; [0x10000c90] = 0x40000040
|
|
0x10000c54: 6011 .` STR r1,[r2,#0]
|
|
0x10000c56: bf00 .. NOP
|
|
0x10000c58: bf00 .. NOP
|
|
0x10000c5a: 4611 .F MOV r1,r2
|
|
0x10000c5c: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x10000c5e: 0282 .. LSLS r2,r0,#10
|
|
0x10000c60: 4391 .C BICS r1,r1,r2
|
|
0x10000c62: 0282 .. LSLS r2,r0,#10
|
|
0x10000c64: 0683 .. LSLS r3,r0,#26
|
|
0x10000c66: 18d2 .. ADDS r2,r2,r3
|
|
0x10000c68: 4311 .C ORRS r1,r1,r2
|
|
0x10000c6a: 4a09 .J LDR r2,[pc,#36] ; [0x10000c90] = 0x40000040
|
|
0x10000c6c: 6311 .c STR r1,[r2,#0x30]
|
|
0x10000c6e: bf00 .. NOP
|
|
0x10000c70: bf00 .. NOP
|
|
0x10000c72: 4908 .I LDR r1,[pc,#32] ; [0x10000c94] = 0x53021080
|
|
0x10000c74: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x10000c76: 0382 .. LSLS r2,r0,#14
|
|
0x10000c78: 4391 .C BICS r1,r1,r2
|
|
0x10000c7a: 0382 .. LSLS r2,r0,#14
|
|
0x10000c7c: 4311 .C ORRS r1,r1,r2
|
|
0x10000c7e: 4a05 .J LDR r2,[pc,#20] ; [0x10000c94] = 0x53021080
|
|
0x10000c80: 6311 .c STR r1,[r2,#0x30]
|
|
0x10000c82: bf00 .. NOP
|
|
0x10000c84: bf00 .. NOP
|
|
0x10000c86: 4904 .I LDR r1,[pc,#16] ; [0x10000c98] = 0x40002440
|
|
0x10000c88: 6108 .a STR r0,[r1,#0x10]
|
|
0x10000c8a: bf00 .. NOP
|
|
0x10000c8c: 4770 pG BX lr
|
|
$d
|
|
0x10000c8e: 0000 .. DCW 0
|
|
0x10000c90: 40000040 @..@ DCD 1073741888
|
|
0x10000c94: 53021080 ...S DCD 1392644224
|
|
0x10000c98: 40002440 @$.@ DCD 1073751104
|
|
$t
|
|
i.xc_clock_bbpll_freq_cfg
|
|
xc_clock_bbpll_freq_cfg
|
|
0x10000c9c: b530 0. PUSH {r4,r5,lr}
|
|
0x10000c9e: 2800 .( CMP r0,#0
|
|
0x10000ca0: d10a .. BNE 0x10000cb8 ; xc_clock_bbpll_freq_cfg + 28
|
|
0x10000ca2: 2301 .# MOVS r3,#1
|
|
0x10000ca4: 4c30 0L LDR r4,[pc,#192] ; [0x10000d68] = 0x53021040
|
|
0x10000ca6: 6ae4 .j LDR r4,[r4,#0x2c]
|
|
0x10000ca8: 2580 .% MOVS r5,#0x80
|
|
0x10000caa: 43ac .C BICS r4,r4,r5
|
|
0x10000cac: 01dd .. LSLS r5,r3,#7
|
|
0x10000cae: 432c ,C ORRS r4,r4,r5
|
|
0x10000cb0: 4d2d -M LDR r5,[pc,#180] ; [0x10000d68] = 0x53021040
|
|
0x10000cb2: 62ec .b STR r4,[r5,#0x2c]
|
|
0x10000cb4: bf00 .. NOP
|
|
0x10000cb6: e00a .. B 0x10000cce ; xc_clock_bbpll_freq_cfg + 50
|
|
0x10000cb8: 2300 .# MOVS r3,#0
|
|
0x10000cba: 4c2b +L LDR r4,[pc,#172] ; [0x10000d68] = 0x53021040
|
|
0x10000cbc: 6ae4 .j LDR r4,[r4,#0x2c]
|
|
0x10000cbe: 2580 .% MOVS r5,#0x80
|
|
0x10000cc0: 43ac .C BICS r4,r4,r5
|
|
0x10000cc2: 01dd .. LSLS r5,r3,#7
|
|
0x10000cc4: 432c ,C ORRS r4,r4,r5
|
|
0x10000cc6: 4d28 (M LDR r5,[pc,#160] ; [0x10000d68] = 0x53021040
|
|
0x10000cc8: 62ec .b STR r4,[r5,#0x2c]
|
|
0x10000cca: bf00 .. NOP
|
|
0x10000ccc: bf00 .. NOP
|
|
0x10000cce: 2301 .# MOVS r3,#1
|
|
0x10000cd0: 4c25 %L LDR r4,[pc,#148] ; [0x10000d68] = 0x53021040
|
|
0x10000cd2: 6ae4 .j LDR r4,[r4,#0x2c]
|
|
0x10000cd4: 2502 .% MOVS r5,#2
|
|
0x10000cd6: 43ac .C BICS r4,r4,r5
|
|
0x10000cd8: 005d ]. LSLS r5,r3,#1
|
|
0x10000cda: 432c ,C ORRS r4,r4,r5
|
|
0x10000cdc: 4d22 "M LDR r5,[pc,#136] ; [0x10000d68] = 0x53021040
|
|
0x10000cde: 62ec .b STR r4,[r5,#0x2c]
|
|
0x10000ce0: bf00 .. NOP
|
|
0x10000ce2: b2cb .. UXTB r3,r1
|
|
0x10000ce4: 462c ,F MOV r4,r5
|
|
0x10000ce6: 6aa4 .j LDR r4,[r4,#0x28]
|
|
0x10000ce8: 09a4 .. LSRS r4,r4,#6
|
|
0x10000cea: 01a4 .. LSLS r4,r4,#6
|
|
0x10000cec: 431c .C ORRS r4,r4,r3
|
|
0x10000cee: 62ac .b STR r4,[r5,#0x28]
|
|
0x10000cf0: bf00 .. NOP
|
|
0x10000cf2: 2301 .# MOVS r3,#1
|
|
0x10000cf4: 462c ,F MOV r4,r5
|
|
0x10000cf6: 6aa4 .j LDR r4,[r4,#0x28]
|
|
0x10000cf8: 03dd .. LSLS r5,r3,#15
|
|
0x10000cfa: 43ac .C BICS r4,r4,r5
|
|
0x10000cfc: 03dd .. LSLS r5,r3,#15
|
|
0x10000cfe: 432c ,C ORRS r4,r4,r5
|
|
0x10000d00: 4d19 .M LDR r5,[pc,#100] ; [0x10000d68] = 0x53021040
|
|
0x10000d02: 62ac .b STR r4,[r5,#0x28]
|
|
0x10000d04: bf00 .. NOP
|
|
0x10000d06: bf00 .. NOP
|
|
0x10000d08: 462c ,F MOV r4,r5
|
|
0x10000d0a: 6aa4 .j LDR r4,[r4,#0x28]
|
|
0x10000d0c: 039d .. LSLS r5,r3,#14
|
|
0x10000d0e: 43ac .C BICS r4,r4,r5
|
|
0x10000d10: 039d .. LSLS r5,r3,#14
|
|
0x10000d12: 432c ,C ORRS r4,r4,r5
|
|
0x10000d14: 4d14 .M LDR r5,[pc,#80] ; [0x10000d68] = 0x53021040
|
|
0x10000d16: 62ac .b STR r4,[r5,#0x28]
|
|
0x10000d18: bf00 .. NOP
|
|
0x10000d1a: bf00 .. NOP
|
|
0x10000d1c: 462c ,F MOV r4,r5
|
|
0x10000d1e: 6aa4 .j LDR r4,[r4,#0x28]
|
|
0x10000d20: 035d ]. LSLS r5,r3,#13
|
|
0x10000d22: 43ac .C BICS r4,r4,r5
|
|
0x10000d24: 035d ]. LSLS r5,r3,#13
|
|
0x10000d26: 432c ,C ORRS r4,r4,r5
|
|
0x10000d28: 4d0f .M LDR r5,[pc,#60] ; [0x10000d68] = 0x53021040
|
|
0x10000d2a: 62ac .b STR r4,[r5,#0x28]
|
|
0x10000d2c: bf00 .. NOP
|
|
0x10000d2e: bf00 .. NOP
|
|
0x10000d30: 462c ,F MOV r4,r5
|
|
0x10000d32: 6aa4 .j LDR r4,[r4,#0x28]
|
|
0x10000d34: 031d .. LSLS r5,r3,#12
|
|
0x10000d36: 43ac .C BICS r4,r4,r5
|
|
0x10000d38: 031d .. LSLS r5,r3,#12
|
|
0x10000d3a: 432c ,C ORRS r4,r4,r5
|
|
0x10000d3c: 4d0a .M LDR r5,[pc,#40] ; [0x10000d68] = 0x53021040
|
|
0x10000d3e: 62ac .b STR r4,[r5,#0x28]
|
|
0x10000d40: bf00 .. NOP
|
|
0x10000d42: bf00 .. NOP
|
|
0x10000d44: 4b09 .K LDR r3,[pc,#36] ; [0x10000d6c] = 0x40000100
|
|
0x10000d46: 6b5b [k LDR r3,[r3,#0x34]
|
|
0x10000d48: 091b .. LSRS r3,r3,#4
|
|
0x10000d4a: 011b .. LSLS r3,r3,#4
|
|
0x10000d4c: 4313 .C ORRS r3,r3,r2
|
|
0x10000d4e: 4c07 .L LDR r4,[pc,#28] ; [0x10000d6c] = 0x40000100
|
|
0x10000d50: 6363 cc STR r3,[r4,#0x34]
|
|
0x10000d52: bf00 .. NOP
|
|
0x10000d54: 2301 .# MOVS r3,#1
|
|
0x10000d56: 6b64 dk LDR r4,[r4,#0x34]
|
|
0x10000d58: 2510 .% MOVS r5,#0x10
|
|
0x10000d5a: 43ac .C BICS r4,r4,r5
|
|
0x10000d5c: 011d .. LSLS r5,r3,#4
|
|
0x10000d5e: 432c ,C ORRS r4,r4,r5
|
|
0x10000d60: 4d02 .M LDR r5,[pc,#8] ; [0x10000d6c] = 0x40000100
|
|
0x10000d62: 636c lc STR r4,[r5,#0x34]
|
|
0x10000d64: bf00 .. NOP
|
|
0x10000d66: bd30 0. POP {r4,r5,pc}
|
|
$d
|
|
0x10000d68: 53021040 @..S DCD 1392644160
|
|
0x10000d6c: 40000100 ...@ DCD 1073742080
|
|
$t
|
|
i.xc_clock_hfclk_in_get
|
|
xc_clock_hfclk_in_get
|
|
0x10000d70: 4801 .H LDR r0,[pc,#4] ; [0x10000d78] = 0x10001b8c
|
|
0x10000d72: 6840 @h LDR r0,[r0,#4]
|
|
0x10000d74: 4770 pG BX lr
|
|
$d
|
|
0x10000d76: 0000 .. DCW 0
|
|
0x10000d78: 10001b8c .... DCD 268442508
|
|
$t
|
|
i.xc_clock_hfclk_set
|
|
xc_clock_hfclk_set
|
|
0x10000d7c: b5f0 .. PUSH {r4-r7,lr}
|
|
0x10000d7e: b087 .. SUB sp,sp,#0x1c
|
|
0x10000d80: 4607 .F MOV r7,r0
|
|
0x10000d82: 460c .F MOV r4,r1
|
|
0x10000d84: 483d =H LDR r0,[pc,#244] ; [0x10000e7c] = 0x10001b8c
|
|
0x10000d86: 9001 .. STR r0,[sp,#4]
|
|
0x10000d88: 9801 .. LDR r0,[sp,#4]
|
|
0x10000d8a: 7007 .p STRB r7,[r0,#0]
|
|
0x10000d8c: 2f00 ./ CMP r7,#0
|
|
0x10000d8e: d002 .. BEQ 0x10000d96 ; xc_clock_hfclk_set + 26
|
|
0x10000d90: 2f01 ./ CMP r7,#1
|
|
0x10000d92: d146 F. BNE 0x10000e22 ; xc_clock_hfclk_set + 166
|
|
0x10000d94: e022 ". B 0x10000ddc ; xc_clock_hfclk_set + 96
|
|
0x10000d96: 483a :H LDR r0,[pc,#232] ; [0x10000e80] = 0xf42400
|
|
0x10000d98: 4284 .B CMP r4,r0
|
|
0x10000d9a: d103 .. BNE 0x10000da4 ; xc_clock_hfclk_set + 40
|
|
0x10000d9c: 9801 .. LDR r0,[sp,#4]
|
|
0x10000d9e: f000f95f .._. BL xc_clock_set_rc16m ; 0x10001060
|
|
0x10000da2: e01a .. B 0x10000dda ; xc_clock_hfclk_set + 94
|
|
0x10000da4: 4837 7H LDR r0,[pc,#220] ; [0x10000e84] = 0x1e84800
|
|
0x10000da6: 4284 .B CMP r4,r0
|
|
0x10000da8: d103 .. BNE 0x10000db2 ; xc_clock_hfclk_set + 54
|
|
0x10000daa: 9801 .. LDR r0,[sp,#4]
|
|
0x10000dac: f000f96a ..j. BL xc_clock_set_rc16m_bbpll_32m ; 0x10001084
|
|
0x10000db0: e013 .. B 0x10000dda ; xc_clock_hfclk_set + 94
|
|
0x10000db2: 4835 5H LDR r0,[pc,#212] ; [0x10000e88] = 0x2dc6c00
|
|
0x10000db4: 4284 .B CMP r4,r0
|
|
0x10000db6: d103 .. BNE 0x10000dc0 ; xc_clock_hfclk_set + 68
|
|
0x10000db8: 9801 .. LDR r0,[sp,#4]
|
|
0x10000dba: f000f97d ..}. BL xc_clock_set_rc16m_bbpll_48m ; 0x100010b8
|
|
0x10000dbe: e00c .. B 0x10000dda ; xc_clock_hfclk_set + 94
|
|
0x10000dc0: 4832 2H LDR r0,[pc,#200] ; [0x10000e8c] = 0x3d09000
|
|
0x10000dc2: 4284 .B CMP r4,r0
|
|
0x10000dc4: d103 .. BNE 0x10000dce ; xc_clock_hfclk_set + 82
|
|
0x10000dc6: 9801 .. LDR r0,[sp,#4]
|
|
0x10000dc8: f000f990 .... BL xc_clock_set_rc16m_bbpll_64m ; 0x100010ec
|
|
0x10000dcc: e005 .. B 0x10000dda ; xc_clock_hfclk_set + 94
|
|
0x10000dce: 4830 0H LDR r0,[pc,#192] ; [0x10000e90] = 0x5b8d800
|
|
0x10000dd0: 4284 .B CMP r4,r0
|
|
0x10000dd2: d102 .. BNE 0x10000dda ; xc_clock_hfclk_set + 94
|
|
0x10000dd4: 9801 .. LDR r0,[sp,#4]
|
|
0x10000dd6: f000f9a3 .... BL xc_clock_set_rc16m_bbpll_96m ; 0x10001120
|
|
0x10000dda: e022 ". B 0x10000e22 ; xc_clock_hfclk_set + 166
|
|
0x10000ddc: 4828 (H LDR r0,[pc,#160] ; [0x10000e80] = 0xf42400
|
|
0x10000dde: 4284 .B CMP r4,r0
|
|
0x10000de0: d103 .. BNE 0x10000dea ; xc_clock_hfclk_set + 110
|
|
0x10000de2: 9801 .. LDR r0,[sp,#4]
|
|
0x10000de4: f000f8fc .... BL xc_clock_set_osc32m_div_16m ; 0x10000fe0
|
|
0x10000de8: e01a .. B 0x10000e20 ; xc_clock_hfclk_set + 164
|
|
0x10000dea: 4826 &H LDR r0,[pc,#152] ; [0x10000e84] = 0x1e84800
|
|
0x10000dec: 4284 .B CMP r4,r0
|
|
0x10000dee: d103 .. BNE 0x10000df8 ; xc_clock_hfclk_set + 124
|
|
0x10000df0: 9801 .. LDR r0,[sp,#4]
|
|
0x10000df2: f000f895 .... BL xc_clock_set_osc32m ; 0x10000f20
|
|
0x10000df6: e013 .. B 0x10000e20 ; xc_clock_hfclk_set + 164
|
|
0x10000df8: 4823 #H LDR r0,[pc,#140] ; [0x10000e88] = 0x2dc6c00
|
|
0x10000dfa: 4284 .B CMP r4,r0
|
|
0x10000dfc: d103 .. BNE 0x10000e06 ; xc_clock_hfclk_set + 138
|
|
0x10000dfe: 9801 .. LDR r0,[sp,#4]
|
|
0x10000e00: f000f8a0 .... BL xc_clock_set_osc32m_bbpll_48m ; 0x10000f44
|
|
0x10000e04: e00c .. B 0x10000e20 ; xc_clock_hfclk_set + 164
|
|
0x10000e06: 4821 !H LDR r0,[pc,#132] ; [0x10000e8c] = 0x3d09000
|
|
0x10000e08: 4284 .B CMP r4,r0
|
|
0x10000e0a: d103 .. BNE 0x10000e14 ; xc_clock_hfclk_set + 152
|
|
0x10000e0c: 9801 .. LDR r0,[sp,#4]
|
|
0x10000e0e: f000f8b3 .... BL xc_clock_set_osc32m_bbpll_64m ; 0x10000f78
|
|
0x10000e12: e005 .. B 0x10000e20 ; xc_clock_hfclk_set + 164
|
|
0x10000e14: 481e .H LDR r0,[pc,#120] ; [0x10000e90] = 0x5b8d800
|
|
0x10000e16: 4284 .B CMP r4,r0
|
|
0x10000e18: d102 .. BNE 0x10000e20 ; xc_clock_hfclk_set + 164
|
|
0x10000e1a: 9801 .. LDR r0,[sp,#4]
|
|
0x10000e1c: f000f8c6 .... BL xc_clock_set_osc32m_bbpll_96m ; 0x10000fac
|
|
0x10000e20: bf00 .. NOP
|
|
0x10000e22: bf00 .. NOP
|
|
0x10000e24: bf00 .. NOP
|
|
0x10000e26: 2101 .! MOVS r1,#1
|
|
0x10000e28: 0789 .. LSLS r1,r1,#30
|
|
0x10000e2a: 6a08 .j LDR r0,[r1,#0x20]
|
|
0x10000e2c: 210f .! MOVS r1,#0xf
|
|
0x10000e2e: 0209 .. LSLS r1,r1,#8
|
|
0x10000e30: 4001 .@ ANDS r1,r1,r0
|
|
0x10000e32: 0a09 .. LSRS r1,r1,#8
|
|
0x10000e34: 9102 .. STR r1,[sp,#8]
|
|
0x10000e36: f7ffff9b .... BL xc_clock_hfclk_in_get ; 0x10000d70
|
|
0x10000e3a: 4601 .F MOV r1,r0
|
|
0x10000e3c: 9802 .. LDR r0,[sp,#8]
|
|
0x10000e3e: 1c40 @. ADDS r0,r0,#1
|
|
0x10000e40: 4341 AC MULS r1,r0,r1
|
|
0x10000e42: 9106 .. STR r1,[sp,#0x18]
|
|
0x10000e44: bf00 .. NOP
|
|
0x10000e46: 2001 . MOVS r0,#1
|
|
0x10000e48: 0780 .. LSLS r0,r0,#30
|
|
0x10000e4a: 6b45 Ek LDR r5,[r0,#0x34]
|
|
0x10000e4c: bf00 .. NOP
|
|
0x10000e4e: 0c28 (. LSRS r0,r5,#16
|
|
0x10000e50: 9004 .. STR r0,[sp,#0x10]
|
|
0x10000e52: b2a8 .. UXTH r0,r5
|
|
0x10000e54: 9005 .. STR r0,[sp,#0x14]
|
|
0x10000e56: 490f .I LDR r1,[pc,#60] ; [0x10000e94] = 0xf4240
|
|
0x10000e58: 9806 .. LDR r0,[sp,#0x18]
|
|
0x10000e5a: f7fffa1b .... BL __aeabi_uidiv ; 0x10000294
|
|
0x10000e5e: 9003 .. STR r0,[sp,#0xc]
|
|
0x10000e60: 9804 .. LDR r0,[sp,#0x10]
|
|
0x10000e62: 0406 .. LSLS r6,r0,#16
|
|
0x10000e64: 9903 .. LDR r1,[sp,#0xc]
|
|
0x10000e66: 9805 .. LDR r0,[sp,#0x14]
|
|
0x10000e68: 4348 HC MULS r0,r1,r0
|
|
0x10000e6a: 0940 @. LSRS r0,r0,#5
|
|
0x10000e6c: 4306 .C ORRS r6,r6,r0
|
|
0x10000e6e: bf00 .. NOP
|
|
0x10000e70: 2001 . MOVS r0,#1
|
|
0x10000e72: 0780 .. LSLS r0,r0,#30
|
|
0x10000e74: 6346 Fc STR r6,[r0,#0x34]
|
|
0x10000e76: bf00 .. NOP
|
|
0x10000e78: b007 .. ADD sp,sp,#0x1c
|
|
0x10000e7a: bdf0 .. POP {r4-r7,pc}
|
|
$d
|
|
0x10000e7c: 10001b8c .... DCD 268442508
|
|
0x10000e80: 00f42400 .$.. DCD 16000000
|
|
0x10000e84: 01e84800 .H.. DCD 32000000
|
|
0x10000e88: 02dc6c00 .l.. DCD 48000000
|
|
0x10000e8c: 03d09000 .... DCD 64000000
|
|
0x10000e90: 05b8d800 .... DCD 96000000
|
|
0x10000e94: 000f4240 @B.. DCD 1000000
|
|
$t
|
|
i.xc_clock_lfclk_set
|
|
xc_clock_lfclk_set
|
|
0x10000e98: b57c |. PUSH {r2-r6,lr}
|
|
0x10000e9a: 4604 .F MOV r4,r0
|
|
0x10000e9c: 460d .F MOV r5,r1
|
|
0x10000e9e: 481d .H LDR r0,[pc,#116] ; [0x10000f14] = 0x10001b8c
|
|
0x10000ea0: 7204 .r STRB r4,[r0,#8]
|
|
0x10000ea2: 8145 E. STRH r5,[r0,#0xa]
|
|
0x10000ea4: 2c01 ., CMP r4,#1
|
|
0x10000ea6: d133 3. BNE 0x10000f10 ; xc_clock_lfclk_set + 120
|
|
0x10000ea8: 2000 . MOVS r0,#0
|
|
0x10000eaa: 9000 .. STR r0,[sp,#0]
|
|
0x10000eac: 9001 .. STR r0,[sp,#4]
|
|
0x10000eae: 2100 .! MOVS r1,#0
|
|
0x10000eb0: 4668 hF MOV r0,sp
|
|
0x10000eb2: 7081 .p STRB r1,[r0,#2]
|
|
0x10000eb4: 70c1 .p STRB r1,[r0,#3]
|
|
0x10000eb6: 7101 .q STRB r1,[r0,#4]
|
|
0x10000eb8: 2102 .! MOVS r1,#2
|
|
0x10000eba: 7141 Aq STRB r1,[r0,#5]
|
|
0x10000ebc: 2100 .! MOVS r1,#0
|
|
0x10000ebe: 7181 .q STRB r1,[r0,#6]
|
|
0x10000ec0: 2114 .! MOVS r1,#0x14
|
|
0x10000ec2: 8001 .. STRH r1,[r0,#0]
|
|
0x10000ec4: f000f980 .... BL xc_gpio_init ; 0x100011c8
|
|
0x10000ec8: 2115 .! MOVS r1,#0x15
|
|
0x10000eca: 4668 hF MOV r0,sp
|
|
0x10000ecc: 8001 .. STRH r1,[r0,#0]
|
|
0x10000ece: f000f97b ..{. BL xc_gpio_init ; 0x100011c8
|
|
0x10000ed2: 2001 . MOVS r0,#1
|
|
0x10000ed4: 4910 .I LDR r1,[pc,#64] ; [0x10000f18] = 0x40002400
|
|
0x10000ed6: 6ac9 .j LDR r1,[r1,#0x2c]
|
|
0x10000ed8: 0909 .. LSRS r1,r1,#4
|
|
0x10000eda: 0109 .. LSLS r1,r1,#4
|
|
0x10000edc: 4301 .C ORRS r1,r1,r0
|
|
0x10000ede: 4a0e .J LDR r2,[pc,#56] ; [0x10000f18] = 0x40002400
|
|
0x10000ee0: 62d1 .b STR r1,[r2,#0x2c]
|
|
0x10000ee2: bf00 .. NOP
|
|
0x10000ee4: bf00 .. NOP
|
|
0x10000ee6: 4611 .F MOV r1,r2
|
|
0x10000ee8: 6ac9 .j LDR r1,[r1,#0x2c]
|
|
0x10000eea: 2210 ." MOVS r2,#0x10
|
|
0x10000eec: 4391 .C BICS r1,r1,r2
|
|
0x10000eee: 0102 .. LSLS r2,r0,#4
|
|
0x10000ef0: 4311 .C ORRS r1,r1,r2
|
|
0x10000ef2: 4a09 .J LDR r2,[pc,#36] ; [0x10000f18] = 0x40002400
|
|
0x10000ef4: 62d1 .b STR r1,[r2,#0x2c]
|
|
0x10000ef6: bf00 .. NOP
|
|
0x10000ef8: 2002 . MOVS r0,#2
|
|
0x10000efa: 4908 .I LDR r1,[pc,#32] ; [0x10000f1c] = 0x40002540
|
|
0x10000efc: 68c9 .h LDR r1,[r1,#0xc]
|
|
0x10000efe: 2203 ." MOVS r2,#3
|
|
0x10000f00: 0212 .. LSLS r2,r2,#8
|
|
0x10000f02: 4391 .C BICS r1,r1,r2
|
|
0x10000f04: 0202 .. LSLS r2,r0,#8
|
|
0x10000f06: 4311 .C ORRS r1,r1,r2
|
|
0x10000f08: 4a04 .J LDR r2,[pc,#16] ; [0x10000f1c] = 0x40002540
|
|
0x10000f0a: 60d1 .` STR r1,[r2,#0xc]
|
|
0x10000f0c: bf00 .. NOP
|
|
0x10000f0e: e000 .. B 0x10000f12 ; xc_clock_lfclk_set + 122
|
|
0x10000f10: bf00 .. NOP
|
|
0x10000f12: bd7c |. POP {r2-r6,pc}
|
|
$d
|
|
0x10000f14: 10001b8c .... DCD 268442508
|
|
0x10000f18: 40002400 .$.@ DCD 1073751040
|
|
0x10000f1c: 40002540 @%.@ DCD 1073751360
|
|
$t
|
|
i.xc_clock_set_osc32m
|
|
xc_clock_set_osc32m
|
|
0x10000f20: 2100 .! MOVS r1,#0
|
|
0x10000f22: 4a06 .J LDR r2,[pc,#24] ; [0x10000f3c] = 0x40000100
|
|
0x10000f24: 6b12 .k LDR r2,[r2,#0x30]
|
|
0x10000f26: 2306 .# MOVS r3,#6
|
|
0x10000f28: 439a .C BICS r2,r2,r3
|
|
0x10000f2a: 004b K. LSLS r3,r1,#1
|
|
0x10000f2c: 431a .C ORRS r2,r2,r3
|
|
0x10000f2e: 4b03 .K LDR r3,[pc,#12] ; [0x10000f3c] = 0x40000100
|
|
0x10000f30: 631a .c STR r2,[r3,#0x30]
|
|
0x10000f32: bf00 .. NOP
|
|
0x10000f34: 4902 .I LDR r1,[pc,#8] ; [0x10000f40] = 0x1e84800
|
|
0x10000f36: 6041 A` STR r1,[r0,#4]
|
|
0x10000f38: 4770 pG BX lr
|
|
$d
|
|
0x10000f3a: 0000 .. DCW 0
|
|
0x10000f3c: 40000100 ...@ DCD 1073742080
|
|
0x10000f40: 01e84800 .H.. DCD 32000000
|
|
$t
|
|
i.xc_clock_set_osc32m_bbpll_48m
|
|
xc_clock_set_osc32m_bbpll_48m
|
|
0x10000f44: b510 .. PUSH {r4,lr}
|
|
0x10000f46: 4604 .F MOV r4,r0
|
|
0x10000f48: f7fffe7a ..z. BL xc_clock_bbpll_common_cfg ; 0x10000c40
|
|
0x10000f4c: 7820 x LDRB r0,[r4,#0]
|
|
0x10000f4e: 2201 ." MOVS r2,#1
|
|
0x10000f50: 2106 .! MOVS r1,#6
|
|
0x10000f52: f7fffea3 .... BL xc_clock_bbpll_freq_cfg ; 0x10000c9c
|
|
0x10000f56: 2002 . MOVS r0,#2
|
|
0x10000f58: 4905 .I LDR r1,[pc,#20] ; [0x10000f70] = 0x40000100
|
|
0x10000f5a: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x10000f5c: 2206 ." MOVS r2,#6
|
|
0x10000f5e: 4391 .C BICS r1,r1,r2
|
|
0x10000f60: 0042 B. LSLS r2,r0,#1
|
|
0x10000f62: 4311 .C ORRS r1,r1,r2
|
|
0x10000f64: 4a02 .J LDR r2,[pc,#8] ; [0x10000f70] = 0x40000100
|
|
0x10000f66: 6311 .c STR r1,[r2,#0x30]
|
|
0x10000f68: bf00 .. NOP
|
|
0x10000f6a: 4802 .H LDR r0,[pc,#8] ; [0x10000f74] = 0x2dc6c00
|
|
0x10000f6c: 6060 `` STR r0,[r4,#4]
|
|
0x10000f6e: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x10000f70: 40000100 ...@ DCD 1073742080
|
|
0x10000f74: 02dc6c00 .l.. DCD 48000000
|
|
$t
|
|
i.xc_clock_set_osc32m_bbpll_64m
|
|
xc_clock_set_osc32m_bbpll_64m
|
|
0x10000f78: b510 .. PUSH {r4,lr}
|
|
0x10000f7a: 4604 .F MOV r4,r0
|
|
0x10000f7c: f7fffe60 ..`. BL xc_clock_bbpll_common_cfg ; 0x10000c40
|
|
0x10000f80: 7820 x LDRB r0,[r4,#0]
|
|
0x10000f82: 2201 ." MOVS r2,#1
|
|
0x10000f84: 2104 .! MOVS r1,#4
|
|
0x10000f86: f7fffe89 .... BL xc_clock_bbpll_freq_cfg ; 0x10000c9c
|
|
0x10000f8a: 2001 . MOVS r0,#1
|
|
0x10000f8c: 4905 .I LDR r1,[pc,#20] ; [0x10000fa4] = 0x40000100
|
|
0x10000f8e: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x10000f90: 2206 ." MOVS r2,#6
|
|
0x10000f92: 4391 .C BICS r1,r1,r2
|
|
0x10000f94: 0042 B. LSLS r2,r0,#1
|
|
0x10000f96: 4311 .C ORRS r1,r1,r2
|
|
0x10000f98: 4a02 .J LDR r2,[pc,#8] ; [0x10000fa4] = 0x40000100
|
|
0x10000f9a: 6311 .c STR r1,[r2,#0x30]
|
|
0x10000f9c: bf00 .. NOP
|
|
0x10000f9e: 4802 .H LDR r0,[pc,#8] ; [0x10000fa8] = 0x3d09000
|
|
0x10000fa0: 6060 `` STR r0,[r4,#4]
|
|
0x10000fa2: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x10000fa4: 40000100 ...@ DCD 1073742080
|
|
0x10000fa8: 03d09000 .... DCD 64000000
|
|
$t
|
|
i.xc_clock_set_osc32m_bbpll_96m
|
|
xc_clock_set_osc32m_bbpll_96m
|
|
0x10000fac: b510 .. PUSH {r4,lr}
|
|
0x10000fae: 4604 .F MOV r4,r0
|
|
0x10000fb0: f7fffe46 ..F. BL xc_clock_bbpll_common_cfg ; 0x10000c40
|
|
0x10000fb4: 7820 x LDRB r0,[r4,#0]
|
|
0x10000fb6: 2201 ." MOVS r2,#1
|
|
0x10000fb8: 2106 .! MOVS r1,#6
|
|
0x10000fba: f7fffe6f ..o. BL xc_clock_bbpll_freq_cfg ; 0x10000c9c
|
|
0x10000fbe: 2001 . MOVS r0,#1
|
|
0x10000fc0: 4905 .I LDR r1,[pc,#20] ; [0x10000fd8] = 0x40000100
|
|
0x10000fc2: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x10000fc4: 2206 ." MOVS r2,#6
|
|
0x10000fc6: 4391 .C BICS r1,r1,r2
|
|
0x10000fc8: 0042 B. LSLS r2,r0,#1
|
|
0x10000fca: 4311 .C ORRS r1,r1,r2
|
|
0x10000fcc: 4a02 .J LDR r2,[pc,#8] ; [0x10000fd8] = 0x40000100
|
|
0x10000fce: 6311 .c STR r1,[r2,#0x30]
|
|
0x10000fd0: bf00 .. NOP
|
|
0x10000fd2: 4802 .H LDR r0,[pc,#8] ; [0x10000fdc] = 0x5b8d800
|
|
0x10000fd4: 6060 `` STR r0,[r4,#4]
|
|
0x10000fd6: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x10000fd8: 40000100 ...@ DCD 1073742080
|
|
0x10000fdc: 05b8d800 .... DCD 96000000
|
|
$t
|
|
i.xc_clock_set_osc32m_div_16m
|
|
xc_clock_set_osc32m_div_16m
|
|
0x10000fe0: b510 .. PUSH {r4,lr}
|
|
0x10000fe2: 2101 .! MOVS r1,#1
|
|
0x10000fe4: 078a .. LSLS r2,r1,#30
|
|
0x10000fe6: 6a12 .j LDR r2,[r2,#0x20]
|
|
0x10000fe8: 0912 .. LSRS r2,r2,#4
|
|
0x10000fea: 0112 .. LSLS r2,r2,#4
|
|
0x10000fec: 230f .# MOVS r3,#0xf
|
|
0x10000fee: 041b .. LSLS r3,r3,#16
|
|
0x10000ff0: 18cb .. ADDS r3,r1,r3
|
|
0x10000ff2: 431a .C ORRS r2,r2,r3
|
|
0x10000ff4: 078b .. LSLS r3,r1,#30
|
|
0x10000ff6: 621a .b STR r2,[r3,#0x20]
|
|
0x10000ff8: bf00 .. NOP
|
|
0x10000ffa: bf00 .. NOP
|
|
0x10000ffc: 078a .. LSLS r2,r1,#30
|
|
0x10000ffe: 6a12 .j LDR r2,[r2,#0x20]
|
|
0x10001000: 2310 .# MOVS r3,#0x10
|
|
0x10001002: 439a .C BICS r2,r2,r3
|
|
0x10001004: 010b .. LSLS r3,r1,#4
|
|
0x10001006: 050c .. LSLS r4,r1,#20
|
|
0x10001008: 191b .. ADDS r3,r3,r4
|
|
0x1000100a: 431a .C ORRS r2,r2,r3
|
|
0x1000100c: 078b .. LSLS r3,r1,#30
|
|
0x1000100e: 621a .b STR r2,[r3,#0x20]
|
|
0x10001010: bf00 .. NOP
|
|
0x10001012: 2108 .! MOVS r1,#8
|
|
0x10001014: 06ca .. LSLS r2,r1,#27
|
|
0x10001016: 6a52 Rj LDR r2,[r2,#0x24]
|
|
0x10001018: 0912 .. LSRS r2,r2,#4
|
|
0x1000101a: 0112 .. LSLS r2,r2,#4
|
|
0x1000101c: 230f .# MOVS r3,#0xf
|
|
0x1000101e: 041b .. LSLS r3,r3,#16
|
|
0x10001020: 18cb .. ADDS r3,r1,r3
|
|
0x10001022: 431a .C ORRS r2,r2,r3
|
|
0x10001024: 06cb .. LSLS r3,r1,#27
|
|
0x10001026: 625a Zb STR r2,[r3,#0x24]
|
|
0x10001028: bf00 .. NOP
|
|
0x1000102a: 2101 .! MOVS r1,#1
|
|
0x1000102c: 078a .. LSLS r2,r1,#30
|
|
0x1000102e: 6a52 Rj LDR r2,[r2,#0x24]
|
|
0x10001030: 2310 .# MOVS r3,#0x10
|
|
0x10001032: 439a .C BICS r2,r2,r3
|
|
0x10001034: 010b .. LSLS r3,r1,#4
|
|
0x10001036: 191b .. ADDS r3,r3,r4
|
|
0x10001038: 431a .C ORRS r2,r2,r3
|
|
0x1000103a: 078b .. LSLS r3,r1,#30
|
|
0x1000103c: 625a Zb STR r2,[r3,#0x24]
|
|
0x1000103e: bf00 .. NOP
|
|
0x10001040: 213c <! MOVS r1,#0x3c
|
|
0x10001042: 4a05 .J LDR r2,[pc,#20] ; [0x10001058] = 0x40002400
|
|
0x10001044: 6211 .b STR r1,[r2,#0x20]
|
|
0x10001046: bf00 .. NOP
|
|
0x10001048: 2107 .! MOVS r1,#7
|
|
0x1000104a: 4a03 .J LDR r2,[pc,#12] ; [0x10001058] = 0x40002400
|
|
0x1000104c: 3240 @2 ADDS r2,r2,#0x40
|
|
0x1000104e: 6091 .` STR r1,[r2,#8]
|
|
0x10001050: bf00 .. NOP
|
|
0x10001052: 4902 .I LDR r1,[pc,#8] ; [0x1000105c] = 0xf42400
|
|
0x10001054: 6041 A` STR r1,[r0,#4]
|
|
0x10001056: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x10001058: 40002400 .$.@ DCD 1073751040
|
|
0x1000105c: 00f42400 .$.. DCD 16000000
|
|
$t
|
|
i.xc_clock_set_rc16m
|
|
xc_clock_set_rc16m
|
|
0x10001060: 2103 .! MOVS r1,#3
|
|
0x10001062: 4a06 .J LDR r2,[pc,#24] ; [0x1000107c] = 0x40000100
|
|
0x10001064: 6b12 .k LDR r2,[r2,#0x30]
|
|
0x10001066: 2306 .# MOVS r3,#6
|
|
0x10001068: 439a .C BICS r2,r2,r3
|
|
0x1000106a: 004b K. LSLS r3,r1,#1
|
|
0x1000106c: 431a .C ORRS r2,r2,r3
|
|
0x1000106e: 4b03 .K LDR r3,[pc,#12] ; [0x1000107c] = 0x40000100
|
|
0x10001070: 631a .c STR r2,[r3,#0x30]
|
|
0x10001072: bf00 .. NOP
|
|
0x10001074: 4902 .I LDR r1,[pc,#8] ; [0x10001080] = 0xf42400
|
|
0x10001076: 6041 A` STR r1,[r0,#4]
|
|
0x10001078: 4770 pG BX lr
|
|
$d
|
|
0x1000107a: 0000 .. DCW 0
|
|
0x1000107c: 40000100 ...@ DCD 1073742080
|
|
0x10001080: 00f42400 .$.. DCD 16000000
|
|
$t
|
|
i.xc_clock_set_rc16m_bbpll_32m
|
|
xc_clock_set_rc16m_bbpll_32m
|
|
0x10001084: b510 .. PUSH {r4,lr}
|
|
0x10001086: 4604 .F MOV r4,r0
|
|
0x10001088: f7fffdda .... BL xc_clock_bbpll_common_cfg ; 0x10000c40
|
|
0x1000108c: 7820 x LDRB r0,[r4,#0]
|
|
0x1000108e: 2201 ." MOVS r2,#1
|
|
0x10001090: 2108 .! MOVS r1,#8
|
|
0x10001092: f7fffe03 .... BL xc_clock_bbpll_freq_cfg ; 0x10000c9c
|
|
0x10001096: 2002 . MOVS r0,#2
|
|
0x10001098: 4905 .I LDR r1,[pc,#20] ; [0x100010b0] = 0x40000100
|
|
0x1000109a: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x1000109c: 2206 ." MOVS r2,#6
|
|
0x1000109e: 4391 .C BICS r1,r1,r2
|
|
0x100010a0: 0042 B. LSLS r2,r0,#1
|
|
0x100010a2: 4311 .C ORRS r1,r1,r2
|
|
0x100010a4: 4a02 .J LDR r2,[pc,#8] ; [0x100010b0] = 0x40000100
|
|
0x100010a6: 6311 .c STR r1,[r2,#0x30]
|
|
0x100010a8: bf00 .. NOP
|
|
0x100010aa: 4802 .H LDR r0,[pc,#8] ; [0x100010b4] = 0x1e84800
|
|
0x100010ac: 6060 `` STR r0,[r4,#4]
|
|
0x100010ae: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x100010b0: 40000100 ...@ DCD 1073742080
|
|
0x100010b4: 01e84800 .H.. DCD 32000000
|
|
$t
|
|
i.xc_clock_set_rc16m_bbpll_48m
|
|
xc_clock_set_rc16m_bbpll_48m
|
|
0x100010b8: b510 .. PUSH {r4,lr}
|
|
0x100010ba: 4604 .F MOV r4,r0
|
|
0x100010bc: f7fffdc0 .... BL xc_clock_bbpll_common_cfg ; 0x10000c40
|
|
0x100010c0: 7820 x LDRB r0,[r4,#0]
|
|
0x100010c2: 2201 ." MOVS r2,#1
|
|
0x100010c4: 210c .! MOVS r1,#0xc
|
|
0x100010c6: f7fffde9 .... BL xc_clock_bbpll_freq_cfg ; 0x10000c9c
|
|
0x100010ca: 2002 . MOVS r0,#2
|
|
0x100010cc: 4905 .I LDR r1,[pc,#20] ; [0x100010e4] = 0x40000100
|
|
0x100010ce: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x100010d0: 2206 ." MOVS r2,#6
|
|
0x100010d2: 4391 .C BICS r1,r1,r2
|
|
0x100010d4: 0042 B. LSLS r2,r0,#1
|
|
0x100010d6: 4311 .C ORRS r1,r1,r2
|
|
0x100010d8: 4a02 .J LDR r2,[pc,#8] ; [0x100010e4] = 0x40000100
|
|
0x100010da: 6311 .c STR r1,[r2,#0x30]
|
|
0x100010dc: bf00 .. NOP
|
|
0x100010de: 4802 .H LDR r0,[pc,#8] ; [0x100010e8] = 0x2dc6c00
|
|
0x100010e0: 6060 `` STR r0,[r4,#4]
|
|
0x100010e2: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x100010e4: 40000100 ...@ DCD 1073742080
|
|
0x100010e8: 02dc6c00 .l.. DCD 48000000
|
|
$t
|
|
i.xc_clock_set_rc16m_bbpll_64m
|
|
xc_clock_set_rc16m_bbpll_64m
|
|
0x100010ec: b510 .. PUSH {r4,lr}
|
|
0x100010ee: 4604 .F MOV r4,r0
|
|
0x100010f0: f7fffda6 .... BL xc_clock_bbpll_common_cfg ; 0x10000c40
|
|
0x100010f4: 7820 x LDRB r0,[r4,#0]
|
|
0x100010f6: 2201 ." MOVS r2,#1
|
|
0x100010f8: 2108 .! MOVS r1,#8
|
|
0x100010fa: f7fffdcf .... BL xc_clock_bbpll_freq_cfg ; 0x10000c9c
|
|
0x100010fe: 2001 . MOVS r0,#1
|
|
0x10001100: 4905 .I LDR r1,[pc,#20] ; [0x10001118] = 0x40000100
|
|
0x10001102: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x10001104: 2206 ." MOVS r2,#6
|
|
0x10001106: 4391 .C BICS r1,r1,r2
|
|
0x10001108: 0042 B. LSLS r2,r0,#1
|
|
0x1000110a: 4311 .C ORRS r1,r1,r2
|
|
0x1000110c: 4a02 .J LDR r2,[pc,#8] ; [0x10001118] = 0x40000100
|
|
0x1000110e: 6311 .c STR r1,[r2,#0x30]
|
|
0x10001110: bf00 .. NOP
|
|
0x10001112: 4802 .H LDR r0,[pc,#8] ; [0x1000111c] = 0x3d09000
|
|
0x10001114: 6060 `` STR r0,[r4,#4]
|
|
0x10001116: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x10001118: 40000100 ...@ DCD 1073742080
|
|
0x1000111c: 03d09000 .... DCD 64000000
|
|
$t
|
|
i.xc_clock_set_rc16m_bbpll_96m
|
|
xc_clock_set_rc16m_bbpll_96m
|
|
0x10001120: b510 .. PUSH {r4,lr}
|
|
0x10001122: 4604 .F MOV r4,r0
|
|
0x10001124: f7fffd8c .... BL xc_clock_bbpll_common_cfg ; 0x10000c40
|
|
0x10001128: 7820 x LDRB r0,[r4,#0]
|
|
0x1000112a: 2201 ." MOVS r2,#1
|
|
0x1000112c: 210c .! MOVS r1,#0xc
|
|
0x1000112e: f7fffdb5 .... BL xc_clock_bbpll_freq_cfg ; 0x10000c9c
|
|
0x10001132: 2001 . MOVS r0,#1
|
|
0x10001134: 4905 .I LDR r1,[pc,#20] ; [0x1000114c] = 0x40000100
|
|
0x10001136: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x10001138: 2206 ." MOVS r2,#6
|
|
0x1000113a: 4391 .C BICS r1,r1,r2
|
|
0x1000113c: 0042 B. LSLS r2,r0,#1
|
|
0x1000113e: 4311 .C ORRS r1,r1,r2
|
|
0x10001140: 4a02 .J LDR r2,[pc,#8] ; [0x1000114c] = 0x40000100
|
|
0x10001142: 6311 .c STR r1,[r2,#0x30]
|
|
0x10001144: bf00 .. NOP
|
|
0x10001146: 4802 .H LDR r0,[pc,#8] ; [0x10001150] = 0x5b8d800
|
|
0x10001148: 6060 `` STR r0,[r4,#4]
|
|
0x1000114a: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x1000114c: 40000100 ...@ DCD 1073742080
|
|
0x10001150: 05b8d800 .... DCD 96000000
|
|
$t
|
|
i.xc_gpio_direction_config
|
|
xc_gpio_direction_config
|
|
0x10001154: b5f3 .. PUSH {r0,r1,r4-r7,lr}
|
|
0x10001156: 1101 .. ASRS r1,r0,#4
|
|
0x10001158: 0702 .. LSLS r2,r0,#28
|
|
0x1000115a: 0f12 .. LSRS r2,r2,#28
|
|
0x1000115c: 9c01 .. LDR r4,[sp,#4]
|
|
0x1000115e: 4094 .@ LSLS r4,r4,r2
|
|
0x10001160: 2501 .% MOVS r5,#1
|
|
0x10001162: 042d -. LSLS r5,r5,#16
|
|
0x10001164: 4095 .@ LSLS r5,r5,r2
|
|
0x10001166: 432c ,C ORRS r4,r4,r5
|
|
0x10001168: 4623 #F MOV r3,r4
|
|
0x1000116a: 460c .F MOV r4,r1
|
|
0x1000116c: 461d .F MOV r5,r3
|
|
0x1000116e: 00a6 .. LSLS r6,r4,#2
|
|
0x10001170: 4f02 .O LDR r7,[pc,#8] ; [0x1000117c] = 0x40001000
|
|
0x10001172: 19f6 .. ADDS r6,r6,r7
|
|
0x10001174: 6235 5b STR r5,[r6,#0x20]
|
|
0x10001176: bf00 .. NOP
|
|
0x10001178: bdfc .. POP {r2-r7,pc}
|
|
$d
|
|
0x1000117a: 0000 .. DCW 0
|
|
0x1000117c: 40001000 ...@ DCD 1073745920
|
|
$t
|
|
i.xc_gpio_fun_sel
|
|
xc_gpio_fun_sel
|
|
0x10001180: b5f0 .. PUSH {r4-r7,lr}
|
|
0x10001182: 4602 .F MOV r2,r0
|
|
0x10001184: 460f .F MOV r7,r1
|
|
0x10001186: 1090 .. ASRS r0,r2,#2
|
|
0x10001188: 0793 .. LSLS r3,r2,#30
|
|
0x1000118a: 0f9b .. LSRS r3,r3,#30
|
|
0x1000118c: 2a1c .* CMP r2,#0x1c
|
|
0x1000118e: dd00 .. BLE 0x10001192 ; xc_gpio_fun_sel + 18
|
|
0x10001190: bdf0 .. POP {r4-r7,pc}
|
|
0x10001192: bf00 .. NOP
|
|
0x10001194: 0084 .. LSLS r4,r0,#2
|
|
0x10001196: 4d0b .M LDR r5,[pc,#44] ; [0x100011c4] = 0x40000080
|
|
0x10001198: 1964 d. ADDS r4,r4,r5
|
|
0x1000119a: 6c24 $l LDR r4,[r4,#0x40]
|
|
0x1000119c: 4621 !F MOV r1,r4
|
|
0x1000119e: 00dc .. LSLS r4,r3,#3
|
|
0x100011a0: 251f .% MOVS r5,#0x1f
|
|
0x100011a2: 40a5 .@ LSLS r5,r5,r4
|
|
0x100011a4: 460c .F MOV r4,r1
|
|
0x100011a6: 43ac .C BICS r4,r4,r5
|
|
0x100011a8: 00dd .. LSLS r5,r3,#3
|
|
0x100011aa: 463e >F MOV r6,r7
|
|
0x100011ac: 40ae .@ LSLS r6,r6,r5
|
|
0x100011ae: 4334 4C ORRS r4,r4,r6
|
|
0x100011b0: 4621 !F MOV r1,r4
|
|
0x100011b2: 460c .F MOV r4,r1
|
|
0x100011b4: 0085 .. LSLS r5,r0,#2
|
|
0x100011b6: 4e03 .N LDR r6,[pc,#12] ; [0x100011c4] = 0x40000080
|
|
0x100011b8: 19ad .. ADDS r5,r5,r6
|
|
0x100011ba: 642c ,d STR r4,[r5,#0x40]
|
|
0x100011bc: bf00 .. NOP
|
|
0x100011be: bf00 .. NOP
|
|
0x100011c0: e7e6 .. B 0x10001190 ; xc_gpio_fun_sel + 16
|
|
$d
|
|
0x100011c2: 0000 .. DCW 0
|
|
0x100011c4: 40000080 ...@ DCD 1073741952
|
|
$t
|
|
i.xc_gpio_init
|
|
xc_gpio_init
|
|
0x100011c8: b510 .. PUSH {r4,lr}
|
|
0x100011ca: 4604 .F MOV r4,r0
|
|
0x100011cc: 78a1 .x LDRB r1,[r4,#2]
|
|
0x100011ce: 7820 x LDRB r0,[r4,#0]
|
|
0x100011d0: f000f838 ..8. BL xc_gpio_mux_ctl ; 0x10001244
|
|
0x100011d4: 78e1 .x LDRB r1,[r4,#3]
|
|
0x100011d6: 7820 x LDRB r0,[r4,#0]
|
|
0x100011d8: f7ffffd2 .... BL xc_gpio_fun_sel ; 0x10001180
|
|
0x100011dc: 7921 !y LDRB r1,[r4,#4]
|
|
0x100011de: 7820 x LDRB r0,[r4,#0]
|
|
0x100011e0: f7ffffb8 .... BL xc_gpio_direction_config ; 0x10001154
|
|
0x100011e4: 79a1 .y LDRB r1,[r4,#6]
|
|
0x100011e6: 7820 x LDRB r0,[r4,#0]
|
|
0x100011e8: f000f806 .... BL xc_gpio_it_config ; 0x100011f8
|
|
0x100011ec: 7961 ay LDRB r1,[r4,#5]
|
|
0x100011ee: 7820 x LDRB r0,[r4,#0]
|
|
0x100011f0: f000f87a ..z. BL xc_gpio_pull_config ; 0x100012e8
|
|
0x100011f4: bd10 .. POP {r4,pc}
|
|
0x100011f6: 0000 .. MOVS r0,r0
|
|
i.xc_gpio_it_config
|
|
xc_gpio_it_config
|
|
0x100011f8: b5f3 .. PUSH {r0,r1,r4-r7,lr}
|
|
0x100011fa: 4602 .F MOV r2,r0
|
|
0x100011fc: 1090 .. ASRS r0,r2,#2
|
|
0x100011fe: 0793 .. LSLS r3,r2,#30
|
|
0x10001200: 0f9b .. LSRS r3,r3,#30
|
|
0x10001202: 4604 .F MOV r4,r0
|
|
0x10001204: 00a5 .. LSLS r5,r4,#2
|
|
0x10001206: 4e0e .N LDR r6,[pc,#56] ; [0x10001240] = 0x40001100
|
|
0x10001208: 19ad .. ADDS r5,r5,r6
|
|
0x1000120a: 682d -h LDR r5,[r5,#0]
|
|
0x1000120c: 4629 )F MOV r1,r5
|
|
0x1000120e: 250f .% MOVS r5,#0xf
|
|
0x10001210: 042d -. LSLS r5,r5,#16
|
|
0x10001212: 460c .F MOV r4,r1
|
|
0x10001214: 43ac .C BICS r4,r4,r5
|
|
0x10001216: 009e .. LSLS r6,r3,#2
|
|
0x10001218: 250f .% MOVS r5,#0xf
|
|
0x1000121a: 40b5 .@ LSLS r5,r5,r6
|
|
0x1000121c: 43ac .C BICS r4,r4,r5
|
|
0x1000121e: 009e .. LSLS r6,r3,#2
|
|
0x10001220: 9d01 .. LDR r5,[sp,#4]
|
|
0x10001222: 40b5 .@ LSLS r5,r5,r6
|
|
0x10001224: 432c ,C ORRS r4,r4,r5
|
|
0x10001226: 2501 .% MOVS r5,#1
|
|
0x10001228: 409d .@ LSLS r5,r5,r3
|
|
0x1000122a: 042d -. LSLS r5,r5,#16
|
|
0x1000122c: 432c ,C ORRS r4,r4,r5
|
|
0x1000122e: 4621 !F MOV r1,r4
|
|
0x10001230: 4604 .F MOV r4,r0
|
|
0x10001232: 460d .F MOV r5,r1
|
|
0x10001234: 00a6 .. LSLS r6,r4,#2
|
|
0x10001236: 4f02 .O LDR r7,[pc,#8] ; [0x10001240] = 0x40001100
|
|
0x10001238: 19f6 .. ADDS r6,r6,r7
|
|
0x1000123a: 6035 5` STR r5,[r6,#0]
|
|
0x1000123c: bf00 .. NOP
|
|
0x1000123e: bdfc .. POP {r2-r7,pc}
|
|
$d
|
|
0x10001240: 40001100 ...@ DCD 1073746176
|
|
$t
|
|
i.xc_gpio_mux_ctl
|
|
xc_gpio_mux_ctl
|
|
0x10001244: b5f0 .. PUSH {r4-r7,lr}
|
|
0x10001246: 4603 .F MOV r3,r0
|
|
0x10001248: 460a .F MOV r2,r1
|
|
0x1000124a: 111c .. ASRS r4,r3,#4
|
|
0x1000124c: 0719 .. LSLS r1,r3,#28
|
|
0x1000124e: 0f09 .. LSRS r1,r1,#28
|
|
0x10001250: 2a03 .* CMP r2,#3
|
|
0x10001252: dd00 .. BLE 0x10001256 ; xc_gpio_mux_ctl + 18
|
|
0x10001254: bdf0 .. POP {r4-r7,pc}
|
|
0x10001256: 2b23 #+ CMP r3,#0x23
|
|
0x10001258: d100 .. BNE 0x1000125c ; xc_gpio_mux_ctl + 24
|
|
0x1000125a: e7fb .. B 0x10001254 ; xc_gpio_mux_ctl + 16
|
|
0x1000125c: 2c00 ., CMP r4,#0
|
|
0x1000125e: d112 .. BNE 0x10001286 ; xc_gpio_mux_ctl + 66
|
|
0x10001260: bf00 .. NOP
|
|
0x10001262: 4d20 M LDR r5,[pc,#128] ; [0x100012e4] = 0x40000100
|
|
0x10001264: 6aad .j LDR r5,[r5,#0x28]
|
|
0x10001266: 4628 (F MOV r0,r5
|
|
0x10001268: 004d M. LSLS r5,r1,#1
|
|
0x1000126a: 2603 .& MOVS r6,#3
|
|
0x1000126c: 40ae .@ LSLS r6,r6,r5
|
|
0x1000126e: 4605 .F MOV r5,r0
|
|
0x10001270: 43b5 .C BICS r5,r5,r6
|
|
0x10001272: 004e N. LSLS r6,r1,#1
|
|
0x10001274: 4617 .F MOV r7,r2
|
|
0x10001276: 40b7 .@ LSLS r7,r7,r6
|
|
0x10001278: 433d =C ORRS r5,r5,r7
|
|
0x1000127a: 4628 (F MOV r0,r5
|
|
0x1000127c: 4605 .F MOV r5,r0
|
|
0x1000127e: 4e19 .N LDR r6,[pc,#100] ; [0x100012e4] = 0x40000100
|
|
0x10001280: 62b5 .b STR r5,[r6,#0x28]
|
|
0x10001282: bf00 .. NOP
|
|
0x10001284: e02b +. B 0x100012de ; xc_gpio_mux_ctl + 154
|
|
0x10001286: 2c01 ., CMP r4,#1
|
|
0x10001288: d112 .. BNE 0x100012b0 ; xc_gpio_mux_ctl + 108
|
|
0x1000128a: bf00 .. NOP
|
|
0x1000128c: 4d15 .M LDR r5,[pc,#84] ; [0x100012e4] = 0x40000100
|
|
0x1000128e: 6aed .j LDR r5,[r5,#0x2c]
|
|
0x10001290: 4628 (F MOV r0,r5
|
|
0x10001292: 004d M. LSLS r5,r1,#1
|
|
0x10001294: 2603 .& MOVS r6,#3
|
|
0x10001296: 40ae .@ LSLS r6,r6,r5
|
|
0x10001298: 4605 .F MOV r5,r0
|
|
0x1000129a: 43b5 .C BICS r5,r5,r6
|
|
0x1000129c: 004e N. LSLS r6,r1,#1
|
|
0x1000129e: 4617 .F MOV r7,r2
|
|
0x100012a0: 40b7 .@ LSLS r7,r7,r6
|
|
0x100012a2: 433d =C ORRS r5,r5,r7
|
|
0x100012a4: 4628 (F MOV r0,r5
|
|
0x100012a6: 4605 .F MOV r5,r0
|
|
0x100012a8: 4e0e .N LDR r6,[pc,#56] ; [0x100012e4] = 0x40000100
|
|
0x100012aa: 62f5 .b STR r5,[r6,#0x2c]
|
|
0x100012ac: bf00 .. NOP
|
|
0x100012ae: e016 .. B 0x100012de ; xc_gpio_mux_ctl + 154
|
|
0x100012b0: 2c02 ., CMP r4,#2
|
|
0x100012b2: d114 .. BNE 0x100012de ; xc_gpio_mux_ctl + 154
|
|
0x100012b4: bf00 .. NOP
|
|
0x100012b6: 4d0b .M LDR r5,[pc,#44] ; [0x100012e4] = 0x40000100
|
|
0x100012b8: 3580 .5 ADDS r5,r5,#0x80
|
|
0x100012ba: 69ed .i LDR r5,[r5,#0x1c]
|
|
0x100012bc: 4628 (F MOV r0,r5
|
|
0x100012be: 004d M. LSLS r5,r1,#1
|
|
0x100012c0: 2603 .& MOVS r6,#3
|
|
0x100012c2: 40ae .@ LSLS r6,r6,r5
|
|
0x100012c4: 4605 .F MOV r5,r0
|
|
0x100012c6: 43b5 .C BICS r5,r5,r6
|
|
0x100012c8: 004e N. LSLS r6,r1,#1
|
|
0x100012ca: 4617 .F MOV r7,r2
|
|
0x100012cc: 40b7 .@ LSLS r7,r7,r6
|
|
0x100012ce: 433d =C ORRS r5,r5,r7
|
|
0x100012d0: 4628 (F MOV r0,r5
|
|
0x100012d2: 4605 .F MOV r5,r0
|
|
0x100012d4: 4e03 .N LDR r6,[pc,#12] ; [0x100012e4] = 0x40000100
|
|
0x100012d6: 3680 .6 ADDS r6,r6,#0x80
|
|
0x100012d8: 61f5 .a STR r5,[r6,#0x1c]
|
|
0x100012da: bf00 .. NOP
|
|
0x100012dc: bf00 .. NOP
|
|
0x100012de: bf00 .. NOP
|
|
0x100012e0: e7b8 .. B 0x10001254 ; xc_gpio_mux_ctl + 16
|
|
$d
|
|
0x100012e2: 0000 .. DCW 0
|
|
0x100012e4: 40000100 ...@ DCD 1073742080
|
|
$t
|
|
i.xc_gpio_pull_config
|
|
xc_gpio_pull_config
|
|
0x100012e8: b570 p. PUSH {r4-r6,lr}
|
|
0x100012ea: 4603 .F MOV r3,r0
|
|
0x100012ec: 460c .F MOV r4,r1
|
|
0x100012ee: 111a .. ASRS r2,r3,#4
|
|
0x100012f0: 0719 .. LSLS r1,r3,#28
|
|
0x100012f2: 0f09 .. LSRS r1,r1,#28
|
|
0x100012f4: 2b20 + CMP r3,#0x20
|
|
0x100012f6: db01 .. BLT 0x100012fc ; xc_gpio_pull_config + 20
|
|
0x100012f8: 1c8d .. ADDS r5,r1,#2
|
|
0x100012fa: b2e9 .. UXTB r1,r5
|
|
0x100012fc: 2c00 ., CMP r4,#0
|
|
0x100012fe: d141 A. BNE 0x10001384 ; xc_gpio_pull_config + 156
|
|
0x10001300: 2a00 .* CMP r2,#0
|
|
0x10001302: d113 .. BNE 0x1000132c ; xc_gpio_pull_config + 68
|
|
0x10001304: bf00 .. NOP
|
|
0x10001306: 4d67 gM LDR r5,[pc,#412] ; [0x100014a4] = 0x40002400
|
|
0x10001308: 6b6d mk LDR r5,[r5,#0x34]
|
|
0x1000130a: 4628 (F MOV r0,r5
|
|
0x1000130c: 004e N. LSLS r6,r1,#1
|
|
0x1000130e: 1c76 v. ADDS r6,r6,#1
|
|
0x10001310: 2501 .% MOVS r5,#1
|
|
0x10001312: 40b5 .@ LSLS r5,r5,r6
|
|
0x10001314: 4328 (C ORRS r0,r0,r5
|
|
0x10001316: 004e N. LSLS r6,r1,#1
|
|
0x10001318: 2501 .% MOVS r5,#1
|
|
0x1000131a: 40b5 .@ LSLS r5,r5,r6
|
|
0x1000131c: 4606 .F MOV r6,r0
|
|
0x1000131e: 43ae .C BICS r6,r6,r5
|
|
0x10001320: 4630 0F MOV r0,r6
|
|
0x10001322: 4605 .F MOV r5,r0
|
|
0x10001324: 4e5f _N LDR r6,[pc,#380] ; [0x100014a4] = 0x40002400
|
|
0x10001326: 6375 uc STR r5,[r6,#0x34]
|
|
0x10001328: bf00 .. NOP
|
|
0x1000132a: e0b9 .. B 0x100014a0 ; xc_gpio_pull_config + 440
|
|
0x1000132c: 2a01 .* CMP r2,#1
|
|
0x1000132e: d113 .. BNE 0x10001358 ; xc_gpio_pull_config + 112
|
|
0x10001330: bf00 .. NOP
|
|
0x10001332: 4d5c \M LDR r5,[pc,#368] ; [0x100014a4] = 0x40002400
|
|
0x10001334: 6bad .k LDR r5,[r5,#0x38]
|
|
0x10001336: 4628 (F MOV r0,r5
|
|
0x10001338: 004e N. LSLS r6,r1,#1
|
|
0x1000133a: 1c76 v. ADDS r6,r6,#1
|
|
0x1000133c: 2501 .% MOVS r5,#1
|
|
0x1000133e: 40b5 .@ LSLS r5,r5,r6
|
|
0x10001340: 4328 (C ORRS r0,r0,r5
|
|
0x10001342: 004e N. LSLS r6,r1,#1
|
|
0x10001344: 2501 .% MOVS r5,#1
|
|
0x10001346: 40b5 .@ LSLS r5,r5,r6
|
|
0x10001348: 4606 .F MOV r6,r0
|
|
0x1000134a: 43ae .C BICS r6,r6,r5
|
|
0x1000134c: 4630 0F MOV r0,r6
|
|
0x1000134e: 4605 .F MOV r5,r0
|
|
0x10001350: 4e54 TN LDR r6,[pc,#336] ; [0x100014a4] = 0x40002400
|
|
0x10001352: 63b5 .c STR r5,[r6,#0x38]
|
|
0x10001354: bf00 .. NOP
|
|
0x10001356: e0a3 .. B 0x100014a0 ; xc_gpio_pull_config + 440
|
|
0x10001358: 2a02 .* CMP r2,#2
|
|
0x1000135a: d1e6 .. BNE 0x1000132a ; xc_gpio_pull_config + 66
|
|
0x1000135c: bf00 .. NOP
|
|
0x1000135e: 4d51 QM LDR r5,[pc,#324] ; [0x100014a4] = 0x40002400
|
|
0x10001360: 6bed .k LDR r5,[r5,#0x3c]
|
|
0x10001362: 4628 (F MOV r0,r5
|
|
0x10001364: 004e N. LSLS r6,r1,#1
|
|
0x10001366: 1c76 v. ADDS r6,r6,#1
|
|
0x10001368: 2501 .% MOVS r5,#1
|
|
0x1000136a: 40b5 .@ LSLS r5,r5,r6
|
|
0x1000136c: 4328 (C ORRS r0,r0,r5
|
|
0x1000136e: 004e N. LSLS r6,r1,#1
|
|
0x10001370: 2501 .% MOVS r5,#1
|
|
0x10001372: 40b5 .@ LSLS r5,r5,r6
|
|
0x10001374: 4606 .F MOV r6,r0
|
|
0x10001376: 43ae .C BICS r6,r6,r5
|
|
0x10001378: 4630 0F MOV r0,r6
|
|
0x1000137a: 4605 .F MOV r5,r0
|
|
0x1000137c: 4e49 IN LDR r6,[pc,#292] ; [0x100014a4] = 0x40002400
|
|
0x1000137e: 63f5 .c STR r5,[r6,#0x3c]
|
|
0x10001380: bf00 .. NOP
|
|
0x10001382: e08d .. B 0x100014a0 ; xc_gpio_pull_config + 440
|
|
0x10001384: 2c01 ., CMP r4,#1
|
|
0x10001386: d141 A. BNE 0x1000140c ; xc_gpio_pull_config + 292
|
|
0x10001388: 2a00 .* CMP r2,#0
|
|
0x1000138a: d113 .. BNE 0x100013b4 ; xc_gpio_pull_config + 204
|
|
0x1000138c: bf00 .. NOP
|
|
0x1000138e: 4d45 EM LDR r5,[pc,#276] ; [0x100014a4] = 0x40002400
|
|
0x10001390: 6b6d mk LDR r5,[r5,#0x34]
|
|
0x10001392: 4628 (F MOV r0,r5
|
|
0x10001394: 004e N. LSLS r6,r1,#1
|
|
0x10001396: 1c76 v. ADDS r6,r6,#1
|
|
0x10001398: 2501 .% MOVS r5,#1
|
|
0x1000139a: 40b5 .@ LSLS r5,r5,r6
|
|
0x1000139c: 4606 .F MOV r6,r0
|
|
0x1000139e: 43ae .C BICS r6,r6,r5
|
|
0x100013a0: 4630 0F MOV r0,r6
|
|
0x100013a2: 004e N. LSLS r6,r1,#1
|
|
0x100013a4: 2501 .% MOVS r5,#1
|
|
0x100013a6: 40b5 .@ LSLS r5,r5,r6
|
|
0x100013a8: 4328 (C ORRS r0,r0,r5
|
|
0x100013aa: 4605 .F MOV r5,r0
|
|
0x100013ac: 4e3d =N LDR r6,[pc,#244] ; [0x100014a4] = 0x40002400
|
|
0x100013ae: 6375 uc STR r5,[r6,#0x34]
|
|
0x100013b0: bf00 .. NOP
|
|
0x100013b2: e075 u. B 0x100014a0 ; xc_gpio_pull_config + 440
|
|
0x100013b4: 2a01 .* CMP r2,#1
|
|
0x100013b6: d113 .. BNE 0x100013e0 ; xc_gpio_pull_config + 248
|
|
0x100013b8: bf00 .. NOP
|
|
0x100013ba: 4d3a :M LDR r5,[pc,#232] ; [0x100014a4] = 0x40002400
|
|
0x100013bc: 6bad .k LDR r5,[r5,#0x38]
|
|
0x100013be: 4628 (F MOV r0,r5
|
|
0x100013c0: 004e N. LSLS r6,r1,#1
|
|
0x100013c2: 1c76 v. ADDS r6,r6,#1
|
|
0x100013c4: 2501 .% MOVS r5,#1
|
|
0x100013c6: 40b5 .@ LSLS r5,r5,r6
|
|
0x100013c8: 4606 .F MOV r6,r0
|
|
0x100013ca: 43ae .C BICS r6,r6,r5
|
|
0x100013cc: 4630 0F MOV r0,r6
|
|
0x100013ce: 004e N. LSLS r6,r1,#1
|
|
0x100013d0: 2501 .% MOVS r5,#1
|
|
0x100013d2: 40b5 .@ LSLS r5,r5,r6
|
|
0x100013d4: 4328 (C ORRS r0,r0,r5
|
|
0x100013d6: 4605 .F MOV r5,r0
|
|
0x100013d8: 4e32 2N LDR r6,[pc,#200] ; [0x100014a4] = 0x40002400
|
|
0x100013da: 63b5 .c STR r5,[r6,#0x38]
|
|
0x100013dc: bf00 .. NOP
|
|
0x100013de: e05f _. B 0x100014a0 ; xc_gpio_pull_config + 440
|
|
0x100013e0: 2a02 .* CMP r2,#2
|
|
0x100013e2: d15d ]. BNE 0x100014a0 ; xc_gpio_pull_config + 440
|
|
0x100013e4: bf00 .. NOP
|
|
0x100013e6: 4d2f /M LDR r5,[pc,#188] ; [0x100014a4] = 0x40002400
|
|
0x100013e8: 6bed .k LDR r5,[r5,#0x3c]
|
|
0x100013ea: 4628 (F MOV r0,r5
|
|
0x100013ec: 004e N. LSLS r6,r1,#1
|
|
0x100013ee: 1c76 v. ADDS r6,r6,#1
|
|
0x100013f0: 2501 .% MOVS r5,#1
|
|
0x100013f2: 40b5 .@ LSLS r5,r5,r6
|
|
0x100013f4: 4606 .F MOV r6,r0
|
|
0x100013f6: 43ae .C BICS r6,r6,r5
|
|
0x100013f8: 4630 0F MOV r0,r6
|
|
0x100013fa: 004e N. LSLS r6,r1,#1
|
|
0x100013fc: 2501 .% MOVS r5,#1
|
|
0x100013fe: 40b5 .@ LSLS r5,r5,r6
|
|
0x10001400: 4328 (C ORRS r0,r0,r5
|
|
0x10001402: 4605 .F MOV r5,r0
|
|
0x10001404: 4e27 'N LDR r6,[pc,#156] ; [0x100014a4] = 0x40002400
|
|
0x10001406: 63f5 .c STR r5,[r6,#0x3c]
|
|
0x10001408: bf00 .. NOP
|
|
0x1000140a: e049 I. B 0x100014a0 ; xc_gpio_pull_config + 440
|
|
0x1000140c: 2c02 ., CMP r4,#2
|
|
0x1000140e: d147 G. BNE 0x100014a0 ; xc_gpio_pull_config + 440
|
|
0x10001410: 2a00 .* CMP r2,#0
|
|
0x10001412: d115 .. BNE 0x10001440 ; xc_gpio_pull_config + 344
|
|
0x10001414: bf00 .. NOP
|
|
0x10001416: 4d23 #M LDR r5,[pc,#140] ; [0x100014a4] = 0x40002400
|
|
0x10001418: 6b6d mk LDR r5,[r5,#0x34]
|
|
0x1000141a: 4628 (F MOV r0,r5
|
|
0x1000141c: 004e N. LSLS r6,r1,#1
|
|
0x1000141e: 1c76 v. ADDS r6,r6,#1
|
|
0x10001420: 2501 .% MOVS r5,#1
|
|
0x10001422: 40b5 .@ LSLS r5,r5,r6
|
|
0x10001424: 4606 .F MOV r6,r0
|
|
0x10001426: 43ae .C BICS r6,r6,r5
|
|
0x10001428: 4630 0F MOV r0,r6
|
|
0x1000142a: 004e N. LSLS r6,r1,#1
|
|
0x1000142c: 2501 .% MOVS r5,#1
|
|
0x1000142e: 40b5 .@ LSLS r5,r5,r6
|
|
0x10001430: 4606 .F MOV r6,r0
|
|
0x10001432: 43ae .C BICS r6,r6,r5
|
|
0x10001434: 4630 0F MOV r0,r6
|
|
0x10001436: 4605 .F MOV r5,r0
|
|
0x10001438: 4e1a .N LDR r6,[pc,#104] ; [0x100014a4] = 0x40002400
|
|
0x1000143a: 6375 uc STR r5,[r6,#0x34]
|
|
0x1000143c: bf00 .. NOP
|
|
0x1000143e: e02f /. B 0x100014a0 ; xc_gpio_pull_config + 440
|
|
0x10001440: 2a01 .* CMP r2,#1
|
|
0x10001442: d115 .. BNE 0x10001470 ; xc_gpio_pull_config + 392
|
|
0x10001444: bf00 .. NOP
|
|
0x10001446: 4d17 .M LDR r5,[pc,#92] ; [0x100014a4] = 0x40002400
|
|
0x10001448: 6bad .k LDR r5,[r5,#0x38]
|
|
0x1000144a: 4628 (F MOV r0,r5
|
|
0x1000144c: 004e N. LSLS r6,r1,#1
|
|
0x1000144e: 1c76 v. ADDS r6,r6,#1
|
|
0x10001450: 2501 .% MOVS r5,#1
|
|
0x10001452: 40b5 .@ LSLS r5,r5,r6
|
|
0x10001454: 4606 .F MOV r6,r0
|
|
0x10001456: 43ae .C BICS r6,r6,r5
|
|
0x10001458: 4630 0F MOV r0,r6
|
|
0x1000145a: 004e N. LSLS r6,r1,#1
|
|
0x1000145c: 2501 .% MOVS r5,#1
|
|
0x1000145e: 40b5 .@ LSLS r5,r5,r6
|
|
0x10001460: 4606 .F MOV r6,r0
|
|
0x10001462: 43ae .C BICS r6,r6,r5
|
|
0x10001464: 4630 0F MOV r0,r6
|
|
0x10001466: 4605 .F MOV r5,r0
|
|
0x10001468: 4e0e .N LDR r6,[pc,#56] ; [0x100014a4] = 0x40002400
|
|
0x1000146a: 63b5 .c STR r5,[r6,#0x38]
|
|
0x1000146c: bf00 .. NOP
|
|
0x1000146e: e017 .. B 0x100014a0 ; xc_gpio_pull_config + 440
|
|
0x10001470: 2a02 .* CMP r2,#2
|
|
0x10001472: d115 .. BNE 0x100014a0 ; xc_gpio_pull_config + 440
|
|
0x10001474: bf00 .. NOP
|
|
0x10001476: 4d0b .M LDR r5,[pc,#44] ; [0x100014a4] = 0x40002400
|
|
0x10001478: 6bed .k LDR r5,[r5,#0x3c]
|
|
0x1000147a: 4628 (F MOV r0,r5
|
|
0x1000147c: 004e N. LSLS r6,r1,#1
|
|
0x1000147e: 1c76 v. ADDS r6,r6,#1
|
|
0x10001480: 2501 .% MOVS r5,#1
|
|
0x10001482: 40b5 .@ LSLS r5,r5,r6
|
|
0x10001484: 4606 .F MOV r6,r0
|
|
0x10001486: 43ae .C BICS r6,r6,r5
|
|
0x10001488: 4630 0F MOV r0,r6
|
|
0x1000148a: 004e N. LSLS r6,r1,#1
|
|
0x1000148c: 2501 .% MOVS r5,#1
|
|
0x1000148e: 40b5 .@ LSLS r5,r5,r6
|
|
0x10001490: 4606 .F MOV r6,r0
|
|
0x10001492: 43ae .C BICS r6,r6,r5
|
|
0x10001494: 4630 0F MOV r0,r6
|
|
0x10001496: 4605 .F MOV r5,r0
|
|
0x10001498: 4e02 .N LDR r6,[pc,#8] ; [0x100014a4] = 0x40002400
|
|
0x1000149a: 63f5 .c STR r5,[r6,#0x3c]
|
|
0x1000149c: bf00 .. NOP
|
|
0x1000149e: bf00 .. NOP
|
|
0x100014a0: bd70 p. POP {r4-r6,pc}
|
|
$d
|
|
0x100014a2: 0000 .. DCW 0
|
|
0x100014a4: 40002400 .$.@ DCD 1073751040
|
|
$t
|
|
i.xc_pwr_vol_set
|
|
xc_pwr_vol_set
|
|
0x100014a8: b510 .. PUSH {r4,lr}
|
|
0x100014aa: f7fffc61 ..a. BL xc_clock_hfclk_in_get ; 0x10000d70
|
|
0x100014ae: 4604 .F MOV r4,r0
|
|
0x100014b0: 492a *I LDR r1,[pc,#168] ; [0x1000155c] = 0x2dc6c00
|
|
0x100014b2: 1a60 `. SUBS r0,r4,r1
|
|
0x100014b4: 428c .B CMP r4,r1
|
|
0x100014b6: d026 &. BEQ 0x10001506 ; xc_pwr_vol_set + 94
|
|
0x100014b8: dc08 .. BGT 0x100014cc ; xc_pwr_vol_set + 36
|
|
0x100014ba: 4829 )H LDR r0,[pc,#164] ; [0x10001560] = 0xff0bdc00
|
|
0x100014bc: 1820 . ADDS r0,r4,r0
|
|
0x100014be: 2800 .( CMP r0,#0
|
|
0x100014c0: d00d .. BEQ 0x100014de ; xc_pwr_vol_set + 54
|
|
0x100014c2: 4927 'I LDR r1,[pc,#156] ; [0x10001560] = 0xff0bdc00
|
|
0x100014c4: 1840 @. ADDS r0,r0,r1
|
|
0x100014c6: 2800 .( CMP r0,#0
|
|
0x100014c8: d13b ;. BNE 0x10001542 ; xc_pwr_vol_set + 154
|
|
0x100014ca: e012 .. B 0x100014f2 ; xc_pwr_vol_set + 74
|
|
0x100014cc: 4924 $I LDR r1,[pc,#144] ; [0x10001560] = 0xff0bdc00
|
|
0x100014ce: 1840 @. ADDS r0,r0,r1
|
|
0x100014d0: 2800 .( CMP r0,#0
|
|
0x100014d2: d022 ". BEQ 0x1000151a ; xc_pwr_vol_set + 114
|
|
0x100014d4: 0049 I. LSLS r1,r1,#1
|
|
0x100014d6: 1840 @. ADDS r0,r0,r1
|
|
0x100014d8: 2800 .( CMP r0,#0
|
|
0x100014da: d132 2. BNE 0x10001542 ; xc_pwr_vol_set + 154
|
|
0x100014dc: e027 '. B 0x1000152e ; xc_pwr_vol_set + 134
|
|
0x100014de: 203c < MOVS r0,#0x3c
|
|
0x100014e0: 4920 I LDR r1,[pc,#128] ; [0x10001564] = 0x40002400
|
|
0x100014e2: 6208 .b STR r0,[r1,#0x20]
|
|
0x100014e4: bf00 .. NOP
|
|
0x100014e6: 2004 . MOVS r0,#4
|
|
0x100014e8: 491e .I LDR r1,[pc,#120] ; [0x10001564] = 0x40002400
|
|
0x100014ea: 3140 @1 ADDS r1,r1,#0x40
|
|
0x100014ec: 6088 .` STR r0,[r1,#8]
|
|
0x100014ee: bf00 .. NOP
|
|
0x100014f0: e031 1. B 0x10001556 ; xc_pwr_vol_set + 174
|
|
0x100014f2: 202c , MOVS r0,#0x2c
|
|
0x100014f4: 491b .I LDR r1,[pc,#108] ; [0x10001564] = 0x40002400
|
|
0x100014f6: 6208 .b STR r0,[r1,#0x20]
|
|
0x100014f8: bf00 .. NOP
|
|
0x100014fa: 2004 . MOVS r0,#4
|
|
0x100014fc: 4919 .I LDR r1,[pc,#100] ; [0x10001564] = 0x40002400
|
|
0x100014fe: 3140 @1 ADDS r1,r1,#0x40
|
|
0x10001500: 6088 .` STR r0,[r1,#8]
|
|
0x10001502: bf00 .. NOP
|
|
0x10001504: e027 '. B 0x10001556 ; xc_pwr_vol_set + 174
|
|
0x10001506: 203c < MOVS r0,#0x3c
|
|
0x10001508: 4916 .I LDR r1,[pc,#88] ; [0x10001564] = 0x40002400
|
|
0x1000150a: 6208 .b STR r0,[r1,#0x20]
|
|
0x1000150c: bf00 .. NOP
|
|
0x1000150e: 2004 . MOVS r0,#4
|
|
0x10001510: 4914 .I LDR r1,[pc,#80] ; [0x10001564] = 0x40002400
|
|
0x10001512: 3140 @1 ADDS r1,r1,#0x40
|
|
0x10001514: 6088 .` STR r0,[r1,#8]
|
|
0x10001516: bf00 .. NOP
|
|
0x10001518: e01d .. B 0x10001556 ; xc_pwr_vol_set + 174
|
|
0x1000151a: 209c . MOVS r0,#0x9c
|
|
0x1000151c: 4911 .I LDR r1,[pc,#68] ; [0x10001564] = 0x40002400
|
|
0x1000151e: 6208 .b STR r0,[r1,#0x20]
|
|
0x10001520: bf00 .. NOP
|
|
0x10001522: 2004 . MOVS r0,#4
|
|
0x10001524: 490f .I LDR r1,[pc,#60] ; [0x10001564] = 0x40002400
|
|
0x10001526: 3140 @1 ADDS r1,r1,#0x40
|
|
0x10001528: 6088 .` STR r0,[r1,#8]
|
|
0x1000152a: bf00 .. NOP
|
|
0x1000152c: e013 .. B 0x10001556 ; xc_pwr_vol_set + 174
|
|
0x1000152e: 209c . MOVS r0,#0x9c
|
|
0x10001530: 490c .I LDR r1,[pc,#48] ; [0x10001564] = 0x40002400
|
|
0x10001532: 6208 .b STR r0,[r1,#0x20]
|
|
0x10001534: bf00 .. NOP
|
|
0x10001536: 2007 . MOVS r0,#7
|
|
0x10001538: 490a .I LDR r1,[pc,#40] ; [0x10001564] = 0x40002400
|
|
0x1000153a: 3140 @1 ADDS r1,r1,#0x40
|
|
0x1000153c: 6088 .` STR r0,[r1,#8]
|
|
0x1000153e: bf00 .. NOP
|
|
0x10001540: e009 .. B 0x10001556 ; xc_pwr_vol_set + 174
|
|
0x10001542: 209c . MOVS r0,#0x9c
|
|
0x10001544: 4907 .I LDR r1,[pc,#28] ; [0x10001564] = 0x40002400
|
|
0x10001546: 6208 .b STR r0,[r1,#0x20]
|
|
0x10001548: bf00 .. NOP
|
|
0x1000154a: 2004 . MOVS r0,#4
|
|
0x1000154c: 4905 .I LDR r1,[pc,#20] ; [0x10001564] = 0x40002400
|
|
0x1000154e: 3140 @1 ADDS r1,r1,#0x40
|
|
0x10001550: 6088 .` STR r0,[r1,#8]
|
|
0x10001552: bf00 .. NOP
|
|
0x10001554: bf00 .. NOP
|
|
0x10001556: bf00 .. NOP
|
|
0x10001558: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x1000155a: 0000 .. DCW 0
|
|
0x1000155c: 02dc6c00 .l.. DCD 48000000
|
|
0x10001560: ff0bdc00 .... DCD 4278967296
|
|
0x10001564: 40002400 .$.@ DCD 1073751040
|
|
$t
|
|
i.xc_uart_init
|
|
xc_uart_init
|
|
0x10001568: b5f0 .. PUSH {r4-r7,lr}
|
|
0x1000156a: b085 .. SUB sp,sp,#0x14
|
|
0x1000156c: 4604 .F MOV r4,r0
|
|
0x1000156e: 460e .F MOV r6,r1
|
|
0x10001570: 2000 . MOVS r0,#0
|
|
0x10001572: 9004 .. STR r0,[sp,#0x10]
|
|
0x10001574: bf00 .. NOP
|
|
0x10001576: 2101 .! MOVS r1,#1
|
|
0x10001578: 0789 .. LSLS r1,r1,#30
|
|
0x1000157a: 6a08 .j LDR r0,[r1,#0x20]
|
|
0x1000157c: 210f .! MOVS r1,#0xf
|
|
0x1000157e: 0209 .. LSLS r1,r1,#8
|
|
0x10001580: 4001 .@ ANDS r1,r1,r0
|
|
0x10001582: 0a09 .. LSRS r1,r1,#8
|
|
0x10001584: 9100 .. STR r1,[sp,#0]
|
|
0x10001586: f7fffbf3 .... BL xc_clock_hfclk_in_get ; 0x10000d70
|
|
0x1000158a: 9900 .. LDR r1,[sp,#0]
|
|
0x1000158c: 1c49 I. ADDS r1,r1,#1
|
|
0x1000158e: 4348 HC MULS r0,r1,r0
|
|
0x10001590: 9004 .. STR r0,[sp,#0x10]
|
|
0x10001592: 6830 0h LDR r0,[r6,#0]
|
|
0x10001594: 0d00 .. LSRS r0,r0,#20
|
|
0x10001596: 9002 .. STR r0,[sp,#8]
|
|
0x10001598: 6830 0h LDR r0,[r6,#0]
|
|
0x1000159a: 0300 .. LSLS r0,r0,#12
|
|
0x1000159c: 0c00 .. LSRS r0,r0,#16
|
|
0x1000159e: 9003 .. STR r0,[sp,#0xc]
|
|
0x100015a0: 49c4 .I LDR r1,[pc,#784] ; [0x100018b4] = 0xf4240
|
|
0x100015a2: 9804 .. LDR r0,[sp,#0x10]
|
|
0x100015a4: f7fefe76 ..v. BL __aeabi_uidiv ; 0x10000294
|
|
0x100015a8: 9001 .. STR r0,[sp,#4]
|
|
0x100015aa: 9802 .. LDR r0,[sp,#8]
|
|
0x100015ac: 0401 .. LSLS r1,r0,#16
|
|
0x100015ae: 9a01 .. LDR r2,[sp,#4]
|
|
0x100015b0: 9803 .. LDR r0,[sp,#0xc]
|
|
0x100015b2: 4350 PC MULS r0,r2,r0
|
|
0x100015b4: 0940 @. LSRS r0,r0,#5
|
|
0x100015b6: 4301 .C ORRS r1,r1,r0
|
|
0x100015b8: 460d .F MOV r5,r1
|
|
0x100015ba: 2c00 ., CMP r4,#0
|
|
0x100015bc: d14f O. BNE 0x1000165e ; xc_uart_init + 246
|
|
0x100015be: 2000 . MOVS r0,#0
|
|
0x100015c0: 49bd .I LDR r1,[pc,#756] ; [0x100018b8] = 0x40000100
|
|
0x100015c2: 6849 Ih LDR r1,[r1,#4]
|
|
0x100015c4: 0849 I. LSRS r1,r1,#1
|
|
0x100015c6: 0049 I. LSLS r1,r1,#1
|
|
0x100015c8: 2201 ." MOVS r2,#1
|
|
0x100015ca: 0412 .. LSLS r2,r2,#16
|
|
0x100015cc: 1882 .. ADDS r2,r0,r2
|
|
0x100015ce: 4311 .C ORRS r1,r1,r2
|
|
0x100015d0: 4ab9 .J LDR r2,[pc,#740] ; [0x100018b8] = 0x40000100
|
|
0x100015d2: 6051 Q` STR r1,[r2,#4]
|
|
0x100015d4: bf00 .. NOP
|
|
0x100015d6: 2001 . MOVS r0,#1
|
|
0x100015d8: 4611 .F MOV r1,r2
|
|
0x100015da: 6849 Ih LDR r1,[r1,#4]
|
|
0x100015dc: 4381 .C BICS r1,r1,r0
|
|
0x100015de: 0402 .. LSLS r2,r0,#16
|
|
0x100015e0: 1882 .. ADDS r2,r0,r2
|
|
0x100015e2: 4311 .C ORRS r1,r1,r2
|
|
0x100015e4: 4ab4 .J LDR r2,[pc,#720] ; [0x100018b8] = 0x40000100
|
|
0x100015e6: 6051 Q` STR r1,[r2,#4]
|
|
0x100015e8: bf00 .. NOP
|
|
0x100015ea: bf00 .. NOP
|
|
0x100015ec: 4610 .F MOV r0,r2
|
|
0x100015ee: 6980 .i LDR r0,[r0,#0x18]
|
|
0x100015f0: 4607 .F MOV r7,r0
|
|
0x100015f2: 2102 .! MOVS r1,#2
|
|
0x100015f4: 4638 8F MOV r0,r7
|
|
0x100015f6: 4388 .C BICS r0,r0,r1
|
|
0x100015f8: 4607 .F MOV r7,r0
|
|
0x100015fa: 4638 8F MOV r0,r7
|
|
0x100015fc: 4611 .F MOV r1,r2
|
|
0x100015fe: 6188 .a STR r0,[r1,#0x18]
|
|
0x10001600: bf00 .. NOP
|
|
0x10001602: 2001 . MOVS r0,#1
|
|
0x10001604: 49ac .I LDR r1,[pc,#688] ; [0x100018b8] = 0x40000100
|
|
0x10001606: 39c0 .9 SUBS r1,r1,#0xc0
|
|
0x10001608: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x1000160a: 2210 ." MOVS r2,#0x10
|
|
0x1000160c: 4391 .C BICS r1,r1,r2
|
|
0x1000160e: 0102 .. LSLS r2,r0,#4
|
|
0x10001610: 0503 .. LSLS r3,r0,#20
|
|
0x10001612: 18d2 .. ADDS r2,r2,r3
|
|
0x10001614: 4311 .C ORRS r1,r1,r2
|
|
0x10001616: 4aa8 .J LDR r2,[pc,#672] ; [0x100018b8] = 0x40000100
|
|
0x10001618: 3ac0 .: SUBS r2,r2,#0xc0
|
|
0x1000161a: 6311 .c STR r1,[r2,#0x30]
|
|
0x1000161c: bf00 .. NOP
|
|
0x1000161e: 2008 . MOVS r0,#8
|
|
0x10001620: 06c1 .. LSLS r1,r0,#27
|
|
0x10001622: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x10001624: 0909 .. LSRS r1,r1,#4
|
|
0x10001626: 0109 .. LSLS r1,r1,#4
|
|
0x10001628: 220f ." MOVS r2,#0xf
|
|
0x1000162a: 0412 .. LSLS r2,r2,#16
|
|
0x1000162c: 1882 .. ADDS r2,r0,r2
|
|
0x1000162e: 4311 .C ORRS r1,r1,r2
|
|
0x10001630: 06c2 .. LSLS r2,r0,#27
|
|
0x10001632: 6311 .c STR r1,[r2,#0x30]
|
|
0x10001634: bf00 .. NOP
|
|
0x10001636: 2001 . MOVS r0,#1
|
|
0x10001638: 0781 .. LSLS r1,r0,#30
|
|
0x1000163a: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x1000163c: 2210 ." MOVS r2,#0x10
|
|
0x1000163e: 4391 .C BICS r1,r1,r2
|
|
0x10001640: 0102 .. LSLS r2,r0,#4
|
|
0x10001642: 18d2 .. ADDS r2,r2,r3
|
|
0x10001644: 4311 .C ORRS r1,r1,r2
|
|
0x10001646: 0782 .. LSLS r2,r0,#30
|
|
0x10001648: 6311 .c STR r1,[r2,#0x30]
|
|
0x1000164a: bf00 .. NOP
|
|
0x1000164c: bf00 .. NOP
|
|
0x1000164e: 0780 .. LSLS r0,r0,#30
|
|
0x10001650: 6345 Ec STR r5,[r0,#0x34]
|
|
0x10001652: bf00 .. NOP
|
|
0x10001654: 1582 .. ASRS r2,r0,#22
|
|
0x10001656: 4999 .I LDR r1,[pc,#612] ; [0x100018bc] = 0x10001f90
|
|
0x10001658: 4899 .H LDR r0,[pc,#612] ; [0x100018c0] = 0x10001c54
|
|
0x1000165a: f7fff9e9 .... BL ring_buffer_create ; 0x10000a30
|
|
0x1000165e: 2c01 ., CMP r4,#1
|
|
0x10001660: d14f O. BNE 0x10001702 ; xc_uart_init + 410
|
|
0x10001662: 2000 . MOVS r0,#0
|
|
0x10001664: 4994 .I LDR r1,[pc,#592] ; [0x100018b8] = 0x40000100
|
|
0x10001666: 6849 Ih LDR r1,[r1,#4]
|
|
0x10001668: 2202 ." MOVS r2,#2
|
|
0x1000166a: 4391 .C BICS r1,r1,r2
|
|
0x1000166c: 0042 B. LSLS r2,r0,#1
|
|
0x1000166e: 0463 c. LSLS r3,r4,#17
|
|
0x10001670: 18d2 .. ADDS r2,r2,r3
|
|
0x10001672: 4311 .C ORRS r1,r1,r2
|
|
0x10001674: 4a90 .J LDR r2,[pc,#576] ; [0x100018b8] = 0x40000100
|
|
0x10001676: 6051 Q` STR r1,[r2,#4]
|
|
0x10001678: bf00 .. NOP
|
|
0x1000167a: 2001 . MOVS r0,#1
|
|
0x1000167c: 4611 .F MOV r1,r2
|
|
0x1000167e: 6849 Ih LDR r1,[r1,#4]
|
|
0x10001680: 2202 ." MOVS r2,#2
|
|
0x10001682: 4391 .C BICS r1,r1,r2
|
|
0x10001684: 0042 B. LSLS r2,r0,#1
|
|
0x10001686: 18d2 .. ADDS r2,r2,r3
|
|
0x10001688: 4311 .C ORRS r1,r1,r2
|
|
0x1000168a: 4a8b .J LDR r2,[pc,#556] ; [0x100018b8] = 0x40000100
|
|
0x1000168c: 6051 Q` STR r1,[r2,#4]
|
|
0x1000168e: bf00 .. NOP
|
|
0x10001690: bf00 .. NOP
|
|
0x10001692: 4610 .F MOV r0,r2
|
|
0x10001694: 6980 .i LDR r0,[r0,#0x18]
|
|
0x10001696: 4607 .F MOV r7,r0
|
|
0x10001698: 43a7 .C BICS r7,r7,r4
|
|
0x1000169a: 4638 8F MOV r0,r7
|
|
0x1000169c: 4611 .F MOV r1,r2
|
|
0x1000169e: 6188 .a STR r0,[r1,#0x18]
|
|
0x100016a0: bf00 .. NOP
|
|
0x100016a2: 2001 . MOVS r0,#1
|
|
0x100016a4: 4984 .I LDR r1,[pc,#528] ; [0x100018b8] = 0x40000100
|
|
0x100016a6: 39c0 .9 SUBS r1,r1,#0xc0
|
|
0x100016a8: 6b09 .k LDR r1,[r1,#0x30]
|
|
0x100016aa: 2220 " MOVS r2,#0x20
|
|
0x100016ac: 4391 .C BICS r1,r1,r2
|
|
0x100016ae: 0142 B. LSLS r2,r0,#5
|
|
0x100016b0: 0543 C. LSLS r3,r0,#21
|
|
0x100016b2: 18d2 .. ADDS r2,r2,r3
|
|
0x100016b4: 4311 .C ORRS r1,r1,r2
|
|
0x100016b6: 4a80 .J LDR r2,[pc,#512] ; [0x100018b8] = 0x40000100
|
|
0x100016b8: 3ac0 .: SUBS r2,r2,#0xc0
|
|
0x100016ba: 6311 .c STR r1,[r2,#0x30]
|
|
0x100016bc: bf00 .. NOP
|
|
0x100016be: 2008 . MOVS r0,#8
|
|
0x100016c0: 06c1 .. LSLS r1,r0,#27
|
|
0x100016c2: 6b89 .k LDR r1,[r1,#0x38]
|
|
0x100016c4: 0909 .. LSRS r1,r1,#4
|
|
0x100016c6: 0109 .. LSLS r1,r1,#4
|
|
0x100016c8: 220f ." MOVS r2,#0xf
|
|
0x100016ca: 0412 .. LSLS r2,r2,#16
|
|
0x100016cc: 1882 .. ADDS r2,r0,r2
|
|
0x100016ce: 4311 .C ORRS r1,r1,r2
|
|
0x100016d0: 06c2 .. LSLS r2,r0,#27
|
|
0x100016d2: 6391 .c STR r1,[r2,#0x38]
|
|
0x100016d4: bf00 .. NOP
|
|
0x100016d6: 2001 . MOVS r0,#1
|
|
0x100016d8: 0781 .. LSLS r1,r0,#30
|
|
0x100016da: 6b89 .k LDR r1,[r1,#0x38]
|
|
0x100016dc: 2210 ." MOVS r2,#0x10
|
|
0x100016de: 4391 .C BICS r1,r1,r2
|
|
0x100016e0: 0102 .. LSLS r2,r0,#4
|
|
0x100016e2: 0503 .. LSLS r3,r0,#20
|
|
0x100016e4: 18d2 .. ADDS r2,r2,r3
|
|
0x100016e6: 4311 .C ORRS r1,r1,r2
|
|
0x100016e8: 0782 .. LSLS r2,r0,#30
|
|
0x100016ea: 6391 .c STR r1,[r2,#0x38]
|
|
0x100016ec: bf00 .. NOP
|
|
0x100016ee: bf00 .. NOP
|
|
0x100016f0: 0780 .. LSLS r0,r0,#30
|
|
0x100016f2: 63c5 .c STR r5,[r0,#0x3c]
|
|
0x100016f4: bf00 .. NOP
|
|
0x100016f6: 1582 .. ASRS r2,r0,#22
|
|
0x100016f8: 4972 rI LDR r1,[pc,#456] ; [0x100018c4] = 0x10002090
|
|
0x100016fa: 4871 qH LDR r0,[pc,#452] ; [0x100018c0] = 0x10001c54
|
|
0x100016fc: 3014 .0 ADDS r0,r0,#0x14
|
|
0x100016fe: f7fff997 .... BL ring_buffer_create ; 0x10000a30
|
|
0x10001702: 2c02 ., CMP r4,#2
|
|
0x10001704: d144 D. BNE 0x10001790 ; xc_uart_init + 552
|
|
0x10001706: 2000 . MOVS r0,#0
|
|
0x10001708: 496b kI LDR r1,[pc,#428] ; [0x100018b8] = 0x40000100
|
|
0x1000170a: 6849 Ih LDR r1,[r1,#4]
|
|
0x1000170c: 02a2 .. LSLS r2,r4,#10
|
|
0x1000170e: 4391 .C BICS r1,r1,r2
|
|
0x10001710: 02c2 .. LSLS r2,r0,#11
|
|
0x10001712: 06a3 .. LSLS r3,r4,#26
|
|
0x10001714: 18d2 .. ADDS r2,r2,r3
|
|
0x10001716: 4311 .C ORRS r1,r1,r2
|
|
0x10001718: 4a67 gJ LDR r2,[pc,#412] ; [0x100018b8] = 0x40000100
|
|
0x1000171a: 6051 Q` STR r1,[r2,#4]
|
|
0x1000171c: bf00 .. NOP
|
|
0x1000171e: 2001 . MOVS r0,#1
|
|
0x10001720: 4611 .F MOV r1,r2
|
|
0x10001722: 6849 Ih LDR r1,[r1,#4]
|
|
0x10001724: 02c2 .. LSLS r2,r0,#11
|
|
0x10001726: 4391 .C BICS r1,r1,r2
|
|
0x10001728: 02c2 .. LSLS r2,r0,#11
|
|
0x1000172a: 18d2 .. ADDS r2,r2,r3
|
|
0x1000172c: 4311 .C ORRS r1,r1,r2
|
|
0x1000172e: 4a62 bJ LDR r2,[pc,#392] ; [0x100018b8] = 0x40000100
|
|
0x10001730: 6051 Q` STR r1,[r2,#4]
|
|
0x10001732: bf00 .. NOP
|
|
0x10001734: bf00 .. NOP
|
|
0x10001736: 4964 dI LDR r1,[pc,#400] ; [0x100018c8] = 0x40000240
|
|
0x10001738: 6909 .i LDR r1,[r1,#0x10]
|
|
0x1000173a: 2220 " MOVS r2,#0x20
|
|
0x1000173c: 4391 .C BICS r1,r1,r2
|
|
0x1000173e: 0142 B. LSLS r2,r0,#5
|
|
0x10001740: 0543 C. LSLS r3,r0,#21
|
|
0x10001742: 18d2 .. ADDS r2,r2,r3
|
|
0x10001744: 4311 .C ORRS r1,r1,r2
|
|
0x10001746: 4a60 `J LDR r2,[pc,#384] ; [0x100018c8] = 0x40000240
|
|
0x10001748: 6111 .a STR r1,[r2,#0x10]
|
|
0x1000174a: bf00 .. NOP
|
|
0x1000174c: 2008 . MOVS r0,#8
|
|
0x1000174e: 4611 .F MOV r1,r2
|
|
0x10001750: 6909 .i LDR r1,[r1,#0x10]
|
|
0x10001752: 0909 .. LSRS r1,r1,#4
|
|
0x10001754: 0109 .. LSLS r1,r1,#4
|
|
0x10001756: 220f ." MOVS r2,#0xf
|
|
0x10001758: 0412 .. LSLS r2,r2,#16
|
|
0x1000175a: 1882 .. ADDS r2,r0,r2
|
|
0x1000175c: 4311 .C ORRS r1,r1,r2
|
|
0x1000175e: 4a5a ZJ LDR r2,[pc,#360] ; [0x100018c8] = 0x40000240
|
|
0x10001760: 6111 .a STR r1,[r2,#0x10]
|
|
0x10001762: bf00 .. NOP
|
|
0x10001764: 2001 . MOVS r0,#1
|
|
0x10001766: 4611 .F MOV r1,r2
|
|
0x10001768: 6909 .i LDR r1,[r1,#0x10]
|
|
0x1000176a: 2210 ." MOVS r2,#0x10
|
|
0x1000176c: 4391 .C BICS r1,r1,r2
|
|
0x1000176e: 0102 .. LSLS r2,r0,#4
|
|
0x10001770: 0503 .. LSLS r3,r0,#20
|
|
0x10001772: 18d2 .. ADDS r2,r2,r3
|
|
0x10001774: 4311 .C ORRS r1,r1,r2
|
|
0x10001776: 4a54 TJ LDR r2,[pc,#336] ; [0x100018c8] = 0x40000240
|
|
0x10001778: 6111 .a STR r1,[r2,#0x10]
|
|
0x1000177a: bf00 .. NOP
|
|
0x1000177c: bf00 .. NOP
|
|
0x1000177e: 4610 .F MOV r0,r2
|
|
0x10001780: 6145 Ea STR r5,[r0,#0x14]
|
|
0x10001782: bf00 .. NOP
|
|
0x10001784: 1582 .. ASRS r2,r0,#22
|
|
0x10001786: 4951 QI LDR r1,[pc,#324] ; [0x100018cc] = 0x10002190
|
|
0x10001788: 484d MH LDR r0,[pc,#308] ; [0x100018c0] = 0x10001c54
|
|
0x1000178a: 3028 (0 ADDS r0,r0,#0x28
|
|
0x1000178c: f7fff950 ..P. BL ring_buffer_create ; 0x10000a30
|
|
0x10001790: 2301 .# MOVS r3,#1
|
|
0x10001792: 0060 `. LSLS r0,r4,#1
|
|
0x10001794: 494e NI LDR r1,[pc,#312] ; [0x100018d0] = 0x10001b5e
|
|
0x10001796: 5a08 .Z LDRH r0,[r1,r0]
|
|
0x10001798: 494e NI LDR r1,[pc,#312] ; [0x100018d4] = 0x40010000
|
|
0x1000179a: 1840 @. ADDS r0,r0,r1
|
|
0x1000179c: 68c0 .h LDR r0,[r0,#0xc]
|
|
0x1000179e: 2180 .! MOVS r1,#0x80
|
|
0x100017a0: 4388 .C BICS r0,r0,r1
|
|
0x100017a2: 01d9 .. LSLS r1,r3,#7
|
|
0x100017a4: 4308 .C ORRS r0,r0,r1
|
|
0x100017a6: 0061 a. LSLS r1,r4,#1
|
|
0x100017a8: 4a49 IJ LDR r2,[pc,#292] ; [0x100018d0] = 0x10001b5e
|
|
0x100017aa: 5a51 QZ LDRH r1,[r2,r1]
|
|
0x100017ac: 4a49 IJ LDR r2,[pc,#292] ; [0x100018d4] = 0x40010000
|
|
0x100017ae: 1889 .. ADDS r1,r1,r2
|
|
0x100017b0: 60c8 .` STR r0,[r1,#0xc]
|
|
0x100017b2: bf00 .. NOP
|
|
0x100017b4: 7831 1x LDRB r1,[r6,#0]
|
|
0x100017b6: 0708 .. LSLS r0,r1,#28
|
|
0x100017b8: 0f00 .. LSRS r0,r0,#28
|
|
0x100017ba: 0061 a. LSLS r1,r4,#1
|
|
0x100017bc: 4a44 DJ LDR r2,[pc,#272] ; [0x100018d0] = 0x10001b5e
|
|
0x100017be: 5a51 QZ LDRH r1,[r2,r1]
|
|
0x100017c0: 4a44 DJ LDR r2,[pc,#272] ; [0x100018d4] = 0x40010000
|
|
0x100017c2: 1889 .. ADDS r1,r1,r2
|
|
0x100017c4: 6008 .` STR r0,[r1,#0]
|
|
0x100017c6: bf00 .. NOP
|
|
0x100017c8: 2000 . MOVS r0,#0
|
|
0x100017ca: 0061 a. LSLS r1,r4,#1
|
|
0x100017cc: 4a40 @J LDR r2,[pc,#256] ; [0x100018d0] = 0x10001b5e
|
|
0x100017ce: 5a51 QZ LDRH r1,[r2,r1]
|
|
0x100017d0: 4a40 @J LDR r2,[pc,#256] ; [0x100018d4] = 0x40010000
|
|
0x100017d2: 1889 .. ADDS r1,r1,r2
|
|
0x100017d4: 6048 H` STR r0,[r1,#4]
|
|
0x100017d6: bf00 .. NOP
|
|
0x100017d8: 2300 .# MOVS r3,#0
|
|
0x100017da: 0060 `. LSLS r0,r4,#1
|
|
0x100017dc: 493c <I LDR r1,[pc,#240] ; [0x100018d0] = 0x10001b5e
|
|
0x100017de: 5a08 .Z LDRH r0,[r1,r0]
|
|
0x100017e0: 4611 .F MOV r1,r2
|
|
0x100017e2: 1840 @. ADDS r0,r0,r1
|
|
0x100017e4: 68c0 .h LDR r0,[r0,#0xc]
|
|
0x100017e6: 2180 .! MOVS r1,#0x80
|
|
0x100017e8: 4388 .C BICS r0,r0,r1
|
|
0x100017ea: 01d9 .. LSLS r1,r3,#7
|
|
0x100017ec: 4308 .C ORRS r0,r0,r1
|
|
0x100017ee: 0061 a. LSLS r1,r4,#1
|
|
0x100017f0: 4a37 7J LDR r2,[pc,#220] ; [0x100018d0] = 0x10001b5e
|
|
0x100017f2: 5a51 QZ LDRH r1,[r2,r1]
|
|
0x100017f4: 4a37 7J LDR r2,[pc,#220] ; [0x100018d4] = 0x40010000
|
|
0x100017f6: 1889 .. ADDS r1,r1,r2
|
|
0x100017f8: 60c8 .` STR r0,[r1,#0xc]
|
|
0x100017fa: bf00 .. NOP
|
|
0x100017fc: bf00 .. NOP
|
|
0x100017fe: bf00 .. NOP
|
|
0x10001800: 0060 `. LSLS r0,r4,#1
|
|
0x10001802: 4933 3I LDR r1,[pc,#204] ; [0x100018d0] = 0x10001b5e
|
|
0x10001804: 5a08 .Z LDRH r0,[r1,r0]
|
|
0x10001806: 4933 3I LDR r1,[pc,#204] ; [0x100018d4] = 0x40010000
|
|
0x10001808: 1840 @. ADDS r0,r0,r1
|
|
0x1000180a: 6fc0 .o LDR r0,[r0,#0x7c]
|
|
0x1000180c: 2801 .( CMP r0,#1
|
|
0x1000180e: d0f6 .. BEQ 0x100017fe ; xc_uart_init + 662
|
|
0x10001810: 7a33 3z LDRB r3,[r6,#8]
|
|
0x10001812: 0060 `. LSLS r0,r4,#1
|
|
0x10001814: 492e .I LDR r1,[pc,#184] ; [0x100018d0] = 0x10001b5e
|
|
0x10001816: 5a08 .Z LDRH r0,[r1,r0]
|
|
0x10001818: 492e .I LDR r1,[pc,#184] ; [0x100018d4] = 0x40010000
|
|
0x1000181a: 1840 @. ADDS r0,r0,r1
|
|
0x1000181c: 68c0 .h LDR r0,[r0,#0xc]
|
|
0x1000181e: 2110 .! MOVS r1,#0x10
|
|
0x10001820: 4388 .C BICS r0,r0,r1
|
|
0x10001822: 0119 .. LSLS r1,r3,#4
|
|
0x10001824: 4308 .C ORRS r0,r0,r1
|
|
0x10001826: 0061 a. LSLS r1,r4,#1
|
|
0x10001828: 4a29 )J LDR r2,[pc,#164] ; [0x100018d0] = 0x10001b5e
|
|
0x1000182a: 5a51 QZ LDRH r1,[r2,r1]
|
|
0x1000182c: 4a29 )J LDR r2,[pc,#164] ; [0x100018d4] = 0x40010000
|
|
0x1000182e: 1889 .. ADDS r1,r1,r2
|
|
0x10001830: 60c8 .` STR r0,[r1,#0xc]
|
|
0x10001832: bf00 .. NOP
|
|
0x10001834: 79b3 .y LDRB r3,[r6,#6]
|
|
0x10001836: 0060 `. LSLS r0,r4,#1
|
|
0x10001838: 4925 %I LDR r1,[pc,#148] ; [0x100018d0] = 0x10001b5e
|
|
0x1000183a: 5a08 .Z LDRH r0,[r1,r0]
|
|
0x1000183c: 4611 .F MOV r1,r2
|
|
0x1000183e: 1840 @. ADDS r0,r0,r1
|
|
0x10001840: 68c0 .h LDR r0,[r0,#0xc]
|
|
0x10001842: 2104 .! MOVS r1,#4
|
|
0x10001844: 4388 .C BICS r0,r0,r1
|
|
0x10001846: 0099 .. LSLS r1,r3,#2
|
|
0x10001848: 4308 .C ORRS r0,r0,r1
|
|
0x1000184a: 0061 a. LSLS r1,r4,#1
|
|
0x1000184c: 4a20 J LDR r2,[pc,#128] ; [0x100018d0] = 0x10001b5e
|
|
0x1000184e: 5a51 QZ LDRH r1,[r2,r1]
|
|
0x10001850: 4a20 J LDR r2,[pc,#128] ; [0x100018d4] = 0x40010000
|
|
0x10001852: 1889 .. ADDS r1,r1,r2
|
|
0x10001854: 60c8 .` STR r0,[r1,#0xc]
|
|
0x10001856: bf00 .. NOP
|
|
0x10001858: 7933 3y LDRB r3,[r6,#4]
|
|
0x1000185a: 0060 `. LSLS r0,r4,#1
|
|
0x1000185c: 491c .I LDR r1,[pc,#112] ; [0x100018d0] = 0x10001b5e
|
|
0x1000185e: 5a08 .Z LDRH r0,[r1,r0]
|
|
0x10001860: 4611 .F MOV r1,r2
|
|
0x10001862: 1840 @. ADDS r0,r0,r1
|
|
0x10001864: 68c0 .h LDR r0,[r0,#0xc]
|
|
0x10001866: 0880 .. LSRS r0,r0,#2
|
|
0x10001868: 0080 .. LSLS r0,r0,#2
|
|
0x1000186a: 4318 .C ORRS r0,r0,r3
|
|
0x1000186c: 0061 a. LSLS r1,r4,#1
|
|
0x1000186e: 4a18 .J LDR r2,[pc,#96] ; [0x100018d0] = 0x10001b5e
|
|
0x10001870: 5a51 QZ LDRH r1,[r2,r1]
|
|
0x10001872: 4a18 .J LDR r2,[pc,#96] ; [0x100018d4] = 0x40010000
|
|
0x10001874: 1889 .. ADDS r1,r1,r2
|
|
0x10001876: 60c8 .` STR r0,[r1,#0xc]
|
|
0x10001878: bf00 .. NOP
|
|
0x1000187a: 7ab3 .z LDRB r3,[r6,#0xa]
|
|
0x1000187c: 0060 `. LSLS r0,r4,#1
|
|
0x1000187e: 4914 .I LDR r1,[pc,#80] ; [0x100018d0] = 0x10001b5e
|
|
0x10001880: 5a08 .Z LDRH r0,[r1,r0]
|
|
0x10001882: 4611 .F MOV r1,r2
|
|
0x10001884: 1840 @. ADDS r0,r0,r1
|
|
0x10001886: 6900 .i LDR r0,[r0,#0x10]
|
|
0x10001888: 2120 ! MOVS r1,#0x20
|
|
0x1000188a: 4388 .C BICS r0,r0,r1
|
|
0x1000188c: 0159 Y. LSLS r1,r3,#5
|
|
0x1000188e: 4308 .C ORRS r0,r0,r1
|
|
0x10001890: 0061 a. LSLS r1,r4,#1
|
|
0x10001892: 4a0f .J LDR r2,[pc,#60] ; [0x100018d0] = 0x10001b5e
|
|
0x10001894: 5a51 QZ LDRH r1,[r2,r1]
|
|
0x10001896: 4a0f .J LDR r2,[pc,#60] ; [0x100018d4] = 0x40010000
|
|
0x10001898: 1889 .. ADDS r1,r1,r2
|
|
0x1000189a: 6108 .a STR r0,[r1,#0x10]
|
|
0x1000189c: bf00 .. NOP
|
|
0x1000189e: 2003 . MOVS r0,#3
|
|
0x100018a0: 0061 a. LSLS r1,r4,#1
|
|
0x100018a2: 4a0b .J LDR r2,[pc,#44] ; [0x100018d0] = 0x10001b5e
|
|
0x100018a4: 5a51 QZ LDRH r1,[r2,r1]
|
|
0x100018a6: 4a0b .J LDR r2,[pc,#44] ; [0x100018d4] = 0x40010000
|
|
0x100018a8: 1889 .. ADDS r1,r1,r2
|
|
0x100018aa: 6088 .` STR r0,[r1,#8]
|
|
0x100018ac: bf00 .. NOP
|
|
0x100018ae: b005 .. ADD sp,sp,#0x14
|
|
0x100018b0: bdf0 .. POP {r4-r7,pc}
|
|
$d
|
|
0x100018b2: 0000 .. DCW 0
|
|
0x100018b4: 000f4240 @B.. DCD 1000000
|
|
0x100018b8: 40000100 ...@ DCD 1073742080
|
|
0x100018bc: 10001f90 .... DCD 268443536
|
|
0x100018c0: 10001c54 T... DCD 268442708
|
|
0x100018c4: 10002090 . .. DCD 268443792
|
|
0x100018c8: 40000240 @..@ DCD 1073742400
|
|
0x100018cc: 10002190 .!.. DCD 268444048
|
|
0x100018d0: 10001b5e ^... DCD 268442462
|
|
0x100018d4: 40010000 ...@ DCD 1073807360
|
|
$t
|
|
ram_code
|
|
sendchar
|
|
0x100018d8: 4601 .F MOV r1,r0
|
|
0x100018da: bf00 .. NOP
|
|
0x100018dc: 4809 .H LDR r0,[pc,#36] ; [0x10001904] = 0x40010000
|
|
0x100018de: 6942 Bi LDR r2,[r0,#0x14]
|
|
0x100018e0: 2020 MOVS r0,#0x20
|
|
0x100018e2: 4002 .@ ANDS r2,r2,r0
|
|
0x100018e4: 2a20 * CMP r2,#0x20
|
|
0x100018e6: d1f9 .. BNE 0x100018dc ; sendchar + 4
|
|
0x100018e8: bf00 .. NOP
|
|
0x100018ea: bf00 .. NOP
|
|
0x100018ec: 4805 .H LDR r0,[pc,#20] ; [0x10001904] = 0x40010000
|
|
0x100018ee: 6001 .` STR r1,[r0,#0]
|
|
0x100018f0: 2001 . MOVS r0,#1
|
|
0x100018f2: 4770 pG BX lr
|
|
fputc
|
|
0x100018f4: b510 .. PUSH {r4,lr}
|
|
0x100018f6: 4603 .F MOV r3,r0
|
|
0x100018f8: 460c .F MOV r4,r1
|
|
0x100018fa: 4618 .F MOV r0,r3
|
|
0x100018fc: f7ffffec .... BL sendchar ; 0x100018d8
|
|
0x10001900: bd10 .. POP {r4,pc}
|
|
$d
|
|
0x10001902: 0000 .. DCW 0
|
|
0x10001904: 40010000 ...@ DCD 1073807360
|
|
$t
|
|
ram_code
|
|
xc_clock_init_cfg
|
|
0x10001908: b510 .. PUSH {r4,lr}
|
|
0x1000190a: 4604 .F MOV r4,r0
|
|
0x1000190c: 7820 x LDRB r0,[r4,#0]
|
|
0x1000190e: 6861 ah LDR r1,[r4,#4]
|
|
0x10001910: f7fffa34 ..4. BL xc_clock_hfclk_set ; 0x10000d7c
|
|
0x10001914: 8961 a. LDRH r1,[r4,#0xa]
|
|
0x10001916: 7a20 z LDRB r0,[r4,#8]
|
|
0x10001918: f7fffabe .... BL xc_clock_lfclk_set ; 0x10000e98
|
|
0x1000191c: f7fffdc4 .... BL xc_pwr_vol_set ; 0x100014a8
|
|
0x10001920: bd10 .. POP {r4,pc}
|
|
ram_code
|
|
SysTick_Handler
|
|
0x10001922: b510 .. PUSH {r4,lr}
|
|
0x10001924: f7fff900 .... BL systick_callback ; 0x10000b28
|
|
0x10001928: bd10 .. POP {r4,pc}
|
|
0x1000192a: 0000 .. MOVS r0,r0
|
|
ram_code
|
|
GPIO_Handler
|
|
0x1000192c: b5f8 .. PUSH {r3-r7,lr}
|
|
0x1000192e: 2000 . MOVS r0,#0
|
|
0x10001930: 0081 .. LSLS r1,r0,#2
|
|
0x10001932: 4a10 .J LDR r2,[pc,#64] ; [0x10001974] = 0x40001200
|
|
0x10001934: 1889 .. ADDS r1,r1,r2
|
|
0x10001936: 6a09 .j LDR r1,[r1,#0x20]
|
|
0x10001938: 2500 .% MOVS r5,#0
|
|
0x1000193a: 460c .F MOV r4,r1
|
|
0x1000193c: 4626 &F MOV r6,r4
|
|
0x1000193e: 462f /F MOV r7,r5
|
|
0x10001940: 2100 .! MOVS r1,#0
|
|
0x10001942: 4620 F MOV r0,r4
|
|
0x10001944: 008a .. LSLS r2,r1,#2
|
|
0x10001946: 4b0b .K LDR r3,[pc,#44] ; [0x10001974] = 0x40001200
|
|
0x10001948: 3b80 .; SUBS r3,r3,#0x80
|
|
0x1000194a: 18d2 .. ADDS r2,r2,r3
|
|
0x1000194c: 6310 .c STR r0,[r2,#0x30]
|
|
0x1000194e: bf00 .. NOP
|
|
0x10001950: 2001 . MOVS r0,#1
|
|
0x10001952: 0081 .. LSLS r1,r0,#2
|
|
0x10001954: 4a07 .J LDR r2,[pc,#28] ; [0x10001974] = 0x40001200
|
|
0x10001956: 1889 .. ADDS r1,r1,r2
|
|
0x10001958: 6a09 .j LDR r1,[r1,#0x20]
|
|
0x1000195a: 460c .F MOV r4,r1
|
|
0x1000195c: 4327 'C ORRS r7,r7,r4
|
|
0x1000195e: 2101 .! MOVS r1,#1
|
|
0x10001960: 4620 F MOV r0,r4
|
|
0x10001962: 008a .. LSLS r2,r1,#2
|
|
0x10001964: 18d2 .. ADDS r2,r2,r3
|
|
0x10001966: 6310 .c STR r0,[r2,#0x30]
|
|
0x10001968: bf00 .. NOP
|
|
0x1000196a: 4630 0F MOV r0,r6
|
|
0x1000196c: 4639 9F MOV r1,r7
|
|
0x1000196e: f7feff41 ..A. BL gpio_intr_callback ; 0x100007f4
|
|
0x10001972: bdf8 .. POP {r3-r7,pc}
|
|
$d
|
|
0x10001974: 40001200 ...@ DCD 1073746432
|
|
$t
|
|
ram_code
|
|
rf_tx_packet
|
|
0x10001978: b570 p. PUSH {r4-r6,lr}
|
|
0x1000197a: 4605 .F MOV r5,r0
|
|
0x1000197c: 460e .F MOV r6,r1
|
|
0x1000197e: 20ff . MOVS r0,#0xff
|
|
0x10001980: 30e2 .0 ADDS r0,r0,#0xe2
|
|
0x10001982: 496f oI LDR r1,[pc,#444] ; [0x10001b40] = 0x530230c0
|
|
0x10001984: 6008 .` STR r0,[r1,#0]
|
|
0x10001986: 2030 0 MOVS r0,#0x30
|
|
0x10001988: 496d mI LDR r1,[pc,#436] ; [0x10001b40] = 0x530230c0
|
|
0x1000198a: 39c0 .9 SUBS r1,r1,#0xc0
|
|
0x1000198c: 61c8 .a STR r0,[r1,#0x1c]
|
|
0x1000198e: 486c lH LDR r0,[pc,#432] ; [0x10001b40] = 0x530230c0
|
|
0x10001990: 3840 @8 SUBS r0,r0,#0x40
|
|
0x10001992: 6800 .h LDR r0,[r0,#0]
|
|
0x10001994: 2120 ! MOVS r1,#0x20
|
|
0x10001996: 4008 .@ ANDS r0,r0,r1
|
|
0x10001998: 2820 ( CMP r0,#0x20
|
|
0x1000199a: d029 ). BEQ 0x100019f0 ; rf_tx_packet + 120
|
|
0x1000199c: 2000 . MOVS r0,#0
|
|
0x1000199e: e005 .. B 0x100019ac ; rf_tx_packet + 52
|
|
0x100019a0: 21ff .! MOVS r1,#0xff
|
|
0x100019a2: 31a1 .1 ADDS r1,r1,#0xa1
|
|
0x100019a4: 4a66 fJ LDR r2,[pc,#408] ; [0x10001b40] = 0x530230c0
|
|
0x100019a6: 6011 .` STR r1,[r2,#0]
|
|
0x100019a8: 1c41 A. ADDS r1,r0,#1
|
|
0x100019aa: b2c8 .. UXTB r0,r1
|
|
0x100019ac: 2806 .( CMP r0,#6
|
|
0x100019ae: d3f7 .. BCC 0x100019a0 ; rf_tx_packet + 40
|
|
0x100019b0: 2000 . MOVS r0,#0
|
|
0x100019b2: e004 .. B 0x100019be ; rf_tx_packet + 70
|
|
0x100019b4: 5c29 )\ LDRB r1,[r5,r0]
|
|
0x100019b6: 4a62 bJ LDR r2,[pc,#392] ; [0x10001b40] = 0x530230c0
|
|
0x100019b8: 6051 Q` STR r1,[r2,#4]
|
|
0x100019ba: 1c41 A. ADDS r1,r0,#1
|
|
0x100019bc: b2c8 .. UXTB r0,r1
|
|
0x100019be: 42b0 .B CMP r0,r6
|
|
0x100019c0: dbf8 .. BLT 0x100019b4 ; rf_tx_packet + 60
|
|
0x100019c2: 485f _H LDR r0,[pc,#380] ; [0x10001b40] = 0x530230c0
|
|
0x100019c4: 38c0 .8 SUBS r0,r0,#0xc0
|
|
0x100019c6: 6800 .h LDR r0,[r0,#0]
|
|
0x100019c8: 2101 .! MOVS r1,#1
|
|
0x100019ca: 0389 .. LSLS r1,r1,#14
|
|
0x100019cc: 4308 .C ORRS r0,r0,r1
|
|
0x100019ce: 495c \I LDR r1,[pc,#368] ; [0x10001b40] = 0x530230c0
|
|
0x100019d0: 39c0 .9 SUBS r1,r1,#0xc0
|
|
0x100019d2: 6008 .` STR r0,[r1,#0]
|
|
0x100019d4: 2064 d MOVS r0,#0x64
|
|
0x100019d6: f7fefedf .... BL delay_us ; 0x10000798
|
|
0x100019da: 4859 YH LDR r0,[pc,#356] ; [0x10001b40] = 0x530230c0
|
|
0x100019dc: 38c0 .8 SUBS r0,r0,#0xc0
|
|
0x100019de: 6800 .h LDR r0,[r0,#0]
|
|
0x100019e0: 2101 .! MOVS r1,#1
|
|
0x100019e2: 0389 .. LSLS r1,r1,#14
|
|
0x100019e4: 4388 .C BICS r0,r0,r1
|
|
0x100019e6: 4956 VI LDR r1,[pc,#344] ; [0x10001b40] = 0x530230c0
|
|
0x100019e8: 39c0 .9 SUBS r1,r1,#0xc0
|
|
0x100019ea: 6008 .` STR r0,[r1,#0]
|
|
0x100019ec: 2400 .$ MOVS r4,#0
|
|
0x100019ee: e004 .. B 0x100019fa ; rf_tx_packet + 130
|
|
0x100019f0: 20ff . MOVS r0,#0xff
|
|
0x100019f2: 30e2 .0 ADDS r0,r0,#0xe2
|
|
0x100019f4: 4952 RI LDR r1,[pc,#328] ; [0x10001b40] = 0x530230c0
|
|
0x100019f6: 6008 .` STR r0,[r1,#0]
|
|
0x100019f8: 2401 .$ MOVS r4,#1
|
|
0x100019fa: 4620 F MOV r0,r4
|
|
0x100019fc: bd70 p. POP {r4-r6,pc}
|
|
rf_rx_packet
|
|
0x100019fe: b530 0. PUSH {r4,r5,lr}
|
|
0x10001a00: 4604 .F MOV r4,r0
|
|
0x10001a02: 2300 .# MOVS r3,#0
|
|
0x10001a04: 484e NH LDR r0,[pc,#312] ; [0x10001b40] = 0x530230c0
|
|
0x10001a06: 38c0 .8 SUBS r0,r0,#0xc0
|
|
0x10001a08: 69c0 .i LDR r0,[r0,#0x1c]
|
|
0x10001a0a: 2140 @! MOVS r1,#0x40
|
|
0x10001a0c: 4008 .@ ANDS r0,r0,r1
|
|
0x10001a0e: 2840 @( CMP r0,#0x40
|
|
0x10001a10: d131 1. BNE 0x10001a76 ; rf_rx_packet + 120
|
|
0x10001a12: 484b KH LDR r0,[pc,#300] ; [0x10001b40] = 0x530230c0
|
|
0x10001a14: 38c0 .8 SUBS r0,r0,#0xc0
|
|
0x10001a16: 6800 .h LDR r0,[r0,#0]
|
|
0x10001a18: 0209 .. LSLS r1,r1,#8
|
|
0x10001a1a: 4388 .C BICS r0,r0,r1
|
|
0x10001a1c: 4948 HI LDR r1,[pc,#288] ; [0x10001b40] = 0x530230c0
|
|
0x10001a1e: 39c0 .9 SUBS r1,r1,#0xc0
|
|
0x10001a20: 6008 .` STR r0,[r1,#0]
|
|
0x10001a22: 20ff . MOVS r0,#0xff
|
|
0x10001a24: 3061 a0 ADDS r0,r0,#0x61
|
|
0x10001a26: 4946 FI LDR r1,[pc,#280] ; [0x10001b40] = 0x530230c0
|
|
0x10001a28: 6008 .` STR r0,[r1,#0]
|
|
0x10001a2a: 4608 .F MOV r0,r1
|
|
0x10001a2c: 68c0 .h LDR r0,[r0,#0xc]
|
|
0x10001a2e: b2c3 .. UXTB r3,r0
|
|
0x10001a30: 2b00 .+ CMP r3,#0
|
|
0x10001a32: d018 .. BEQ 0x10001a66 ; rf_rx_packet + 104
|
|
0x10001a34: 2500 .% MOVS r5,#0
|
|
0x10001a36: e00b .. B 0x10001a50 ; rf_rx_packet + 82
|
|
0x10001a38: 2010 . MOVS r0,#0x10
|
|
0x10001a3a: f7feff03 .... BL nop_cnt ; 0x10000844
|
|
0x10001a3e: 20ff . MOVS r0,#0xff
|
|
0x10001a40: 3062 b0 ADDS r0,r0,#0x62
|
|
0x10001a42: 493f ?I LDR r1,[pc,#252] ; [0x10001b40] = 0x530230c0
|
|
0x10001a44: 6008 .` STR r0,[r1,#0]
|
|
0x10001a46: 2010 . MOVS r0,#0x10
|
|
0x10001a48: f7fefefc .... BL nop_cnt ; 0x10000844
|
|
0x10001a4c: 1c68 h. ADDS r0,r5,#1
|
|
0x10001a4e: b2c5 .. UXTB r5,r0
|
|
0x10001a50: 2d04 .- CMP r5,#4
|
|
0x10001a52: d3f1 .. BCC 0x10001a38 ; rf_rx_packet + 58
|
|
0x10001a54: 2000 . MOVS r0,#0
|
|
0x10001a56: e004 .. B 0x10001a62 ; rf_rx_packet + 100
|
|
0x10001a58: 4939 9I LDR r1,[pc,#228] ; [0x10001b40] = 0x530230c0
|
|
0x10001a5a: 6889 .h LDR r1,[r1,#8]
|
|
0x10001a5c: 5421 !T STRB r1,[r4,r0]
|
|
0x10001a5e: 1c41 A. ADDS r1,r0,#1
|
|
0x10001a60: b2c8 .. UXTB r0,r1
|
|
0x10001a62: 4298 .B CMP r0,r3
|
|
0x10001a64: dbf8 .. BLT 0x10001a58 ; rf_rx_packet + 90
|
|
0x10001a66: 20ff . MOVS r0,#0xff
|
|
0x10001a68: 30e3 .0 ADDS r0,r0,#0xe3
|
|
0x10001a6a: 4935 5I LDR r1,[pc,#212] ; [0x10001b40] = 0x530230c0
|
|
0x10001a6c: 6008 .` STR r0,[r1,#0]
|
|
0x10001a6e: 2040 @ MOVS r0,#0x40
|
|
0x10001a70: 4933 3I LDR r1,[pc,#204] ; [0x10001b40] = 0x530230c0
|
|
0x10001a72: 39c0 .9 SUBS r1,r1,#0xc0
|
|
0x10001a74: 61c8 .a STR r0,[r1,#0x1c]
|
|
0x10001a76: 4618 .F MOV r0,r3
|
|
0x10001a78: bd30 0. POP {r4,r5,pc}
|
|
rf_tx_event
|
|
0x10001a7a: b570 p. PUSH {r4-r6,lr}
|
|
0x10001a7c: 4606 .F MOV r6,r0
|
|
0x10001a7e: 460d .F MOV r5,r1
|
|
0x10001a80: 2d00 .- CMP r5,#0
|
|
0x10001a82: d102 .. BNE 0x10001a8a ; rf_tx_event + 16
|
|
0x10001a84: 2401 .$ MOVS r4,#1
|
|
0x10001a86: 4620 F MOV r0,r4
|
|
0x10001a88: bd70 p. POP {r4-r6,pc}
|
|
0x10001a8a: bf00 .. NOP
|
|
0x10001a8c: 4629 )F MOV r1,r5
|
|
0x10001a8e: 4630 0F MOV r0,r6
|
|
0x10001a90: f7ffff72 ..r. BL rf_tx_packet ; 0x10001978
|
|
0x10001a94: 2800 .( CMP r0,#0
|
|
0x10001a96: d1f9 .. BNE 0x10001a8c ; rf_tx_event + 18
|
|
0x10001a98: bf00 .. NOP
|
|
0x10001a9a: 4829 )H LDR r0,[pc,#164] ; [0x10001b40] = 0x530230c0
|
|
0x10001a9c: 38c0 .8 SUBS r0,r0,#0xc0
|
|
0x10001a9e: 69c0 .i LDR r0,[r0,#0x1c]
|
|
0x10001aa0: 2120 ! MOVS r1,#0x20
|
|
0x10001aa2: 4008 .@ ANDS r0,r0,r1
|
|
0x10001aa4: 2820 ( CMP r0,#0x20
|
|
0x10001aa6: d10d .. BNE 0x10001ac4 ; rf_tx_event + 74
|
|
0x10001aa8: 4825 %H LDR r0,[pc,#148] ; [0x10001b40] = 0x530230c0
|
|
0x10001aaa: 38c0 .8 SUBS r0,r0,#0xc0
|
|
0x10001aac: 69c0 .i LDR r0,[r0,#0x1c]
|
|
0x10001aae: 2170 p! MOVS r1,#0x70
|
|
0x10001ab0: 4308 .C ORRS r0,r0,r1
|
|
0x10001ab2: 4923 #I LDR r1,[pc,#140] ; [0x10001b40] = 0x530230c0
|
|
0x10001ab4: 39c0 .9 SUBS r1,r1,#0xc0
|
|
0x10001ab6: 61c8 .a STR r0,[r1,#0x1c]
|
|
0x10001ab8: 20ff . MOVS r0,#0xff
|
|
0x10001aba: 30e2 .0 ADDS r0,r0,#0xe2
|
|
0x10001abc: 4920 I LDR r1,[pc,#128] ; [0x10001b40] = 0x530230c0
|
|
0x10001abe: 6008 .` STR r0,[r1,#0]
|
|
0x10001ac0: 2400 .$ MOVS r4,#0
|
|
0x10001ac2: e015 .. B 0x10001af0 ; rf_tx_event + 118
|
|
0x10001ac4: 481e .H LDR r0,[pc,#120] ; [0x10001b40] = 0x530230c0
|
|
0x10001ac6: 38c0 .8 SUBS r0,r0,#0xc0
|
|
0x10001ac8: 69c0 .i LDR r0,[r0,#0x1c]
|
|
0x10001aca: 2110 .! MOVS r1,#0x10
|
|
0x10001acc: 4008 .@ ANDS r0,r0,r1
|
|
0x10001ace: 2810 .( CMP r0,#0x10
|
|
0x10001ad0: d10d .. BNE 0x10001aee ; rf_tx_event + 116
|
|
0x10001ad2: 481b .H LDR r0,[pc,#108] ; [0x10001b40] = 0x530230c0
|
|
0x10001ad4: 38c0 .8 SUBS r0,r0,#0xc0
|
|
0x10001ad6: 69c0 .i LDR r0,[r0,#0x1c]
|
|
0x10001ad8: 2170 p! MOVS r1,#0x70
|
|
0x10001ada: 4308 .C ORRS r0,r0,r1
|
|
0x10001adc: 4918 .I LDR r1,[pc,#96] ; [0x10001b40] = 0x530230c0
|
|
0x10001ade: 39c0 .9 SUBS r1,r1,#0xc0
|
|
0x10001ae0: 61c8 .a STR r0,[r1,#0x1c]
|
|
0x10001ae2: 20ff . MOVS r0,#0xff
|
|
0x10001ae4: 30e2 .0 ADDS r0,r0,#0xe2
|
|
0x10001ae6: 4916 .I LDR r1,[pc,#88] ; [0x10001b40] = 0x530230c0
|
|
0x10001ae8: 6008 .` STR r0,[r1,#0]
|
|
0x10001aea: 2402 .$ MOVS r4,#2
|
|
0x10001aec: e000 .. B 0x10001af0 ; rf_tx_event + 118
|
|
0x10001aee: e7d4 .. B 0x10001a9a ; rf_tx_event + 32
|
|
0x10001af0: bf00 .. NOP
|
|
0x10001af2: 4814 .H LDR r0,[pc,#80] ; [0x10001b44] = 0x10001b88
|
|
0x10001af4: 6800 .h LDR r0,[r0,#0]
|
|
0x10001af6: 1c40 @. ADDS r0,r0,#1
|
|
0x10001af8: 4912 .I LDR r1,[pc,#72] ; [0x10001b44] = 0x10001b88
|
|
0x10001afa: 6008 .` STR r0,[r1,#0]
|
|
0x10001afc: 4620 F MOV r0,r4
|
|
0x10001afe: e7c3 .. B 0x10001a88 ; rf_tx_event + 14
|
|
rf_rx_event
|
|
0x10001b00: b510 .. PUSH {r4,lr}
|
|
0x10001b02: 4604 .F MOV r4,r0
|
|
0x10001b04: 4620 F MOV r0,r4
|
|
0x10001b06: f7ffff7a ..z. BL rf_rx_packet ; 0x100019fe
|
|
0x10001b0a: bd10 .. POP {r4,pc}
|
|
RF24G_Handler
|
|
0x10001b0c: b500 .. PUSH {lr}
|
|
0x10001b0e: 480c .H LDR r0,[pc,#48] ; [0x10001b40] = 0x530230c0
|
|
0x10001b10: 38c0 .8 SUBS r0,r0,#0xc0
|
|
0x10001b12: 6800 .h LDR r0,[r0,#0]
|
|
0x10001b14: 2101 .! MOVS r1,#1
|
|
0x10001b16: 0389 .. LSLS r1,r1,#14
|
|
0x10001b18: 4388 .C BICS r0,r0,r1
|
|
0x10001b1a: 4909 .I LDR r1,[pc,#36] ; [0x10001b40] = 0x530230c0
|
|
0x10001b1c: 39c0 .9 SUBS r1,r1,#0xc0
|
|
0x10001b1e: 6008 .` STR r0,[r1,#0]
|
|
0x10001b20: 2001 . MOVS r0,#1
|
|
0x10001b22: 4909 .I LDR r1,[pc,#36] ; [0x10001b48] = 0x10001b81
|
|
0x10001b24: 7008 .p STRB r0,[r1,#0]
|
|
0x10001b26: 20ff . MOVS r0,#0xff
|
|
0x10001b28: 30e2 .0 ADDS r0,r0,#0xe2
|
|
0x10001b2a: 4905 .I LDR r1,[pc,#20] ; [0x10001b40] = 0x530230c0
|
|
0x10001b2c: 6008 .` STR r0,[r1,#0]
|
|
0x10001b2e: 2070 p MOVS r0,#0x70
|
|
0x10001b30: 4903 .I LDR r1,[pc,#12] ; [0x10001b40] = 0x530230c0
|
|
0x10001b32: 39c0 .9 SUBS r1,r1,#0xc0
|
|
0x10001b34: 61c8 .a STR r0,[r1,#0x1c]
|
|
0x10001b36: 2004 . MOVS r0,#4
|
|
0x10001b38: f7fefe84 .... BL nop_cnt ; 0x10000844
|
|
0x10001b3c: bd00 .. POP {pc}
|
|
$d
|
|
0x10001b3e: 0000 .. DCW 0
|
|
0x10001b40: 530230c0 .0.S DCD 1392652480
|
|
0x10001b44: 10001b88 .... DCD 268442504
|
|
0x10001b48: 10001b81 .... DCD 268442497
|
|
$d.realdata
|
|
.constdata
|
|
aotimer_offset
|
|
0x10001b4c: 1400 .. DCW 5120
|
|
timer_offset
|
|
0x10001b4e: 1400 .. DCW 5120
|
|
0x10001b50: 3c28 (< DCW 15400
|
|
pwm_offset
|
|
0x10001b52: 0000 .. DCW 0
|
|
0x10001b54: 04000040 @... DCD 67108928
|
|
0x10001b58: 08000440 @... DCD 134218816
|
|
0x10001b5c: 0840 @. DCW 2112
|
|
uart_offset
|
|
0x10001b5e: 0000 .. DCW 0
|
|
0x10001b60: 14001000 .... DCD 335548416
|
|
spi_offset
|
|
0x10001b64: 10000000 .... DCD 268435456
|
|
0x10001b68: 00001800 .... DCD 6144
|
|
Region$$Table$$Base
|
|
0x10001b6c: 10001b8c .... DCD 268442508
|
|
0x10001b70: 10001b8c .... DCD 268442508
|
|
0x10001b74: 00000d64 d... DCD 3428
|
|
0x10001b78: 10000104 .... DCD 268435716
|
|
Region$$Table$$Limit
|
|
|
|
** Section #2 'RW' (SHT_PROGBITS) [SHF_ALLOC + SHF_WRITE]
|
|
Size : 16 bytes (alignment 4)
|
|
Address: 0x10001b7c
|
|
|
|
|
|
** Section #3 'RW' (SHT_NOBITS) [SHF_ALLOC + SHF_WRITE]
|
|
Size : 3428 bytes (alignment 8)
|
|
Address: 0x10001b8c
|
|
|
|
|
|
** Section #4 '.debug_abbrev' (SHT_PROGBITS)
|
|
Size : 1476 bytes
|
|
|
|
|
|
** Section #5 '.debug_frame' (SHT_PROGBITS)
|
|
Size : 2360 bytes
|
|
|
|
|
|
** Section #6 '.debug_info' (SHT_PROGBITS)
|
|
Size : 62764 bytes
|
|
|
|
|
|
** Section #7 '.debug_line' (SHT_PROGBITS)
|
|
Size : 28920 bytes
|
|
|
|
|
|
** Section #8 '.debug_loc' (SHT_PROGBITS)
|
|
Size : 6500 bytes
|
|
|
|
|
|
** Section #9 '.debug_macinfo' (SHT_PROGBITS)
|
|
Size : 19720 bytes
|
|
|
|
|
|
** Section #10 '.debug_pubnames' (SHT_PROGBITS)
|
|
Size : 7183 bytes
|
|
|
|
|
|
** Section #11 '.symtab' (SHT_SYMTAB)
|
|
Size : 8000 bytes (alignment 4)
|
|
String table #12 '.strtab'
|
|
Last local symbol no. 324
|
|
|
|
|
|
** Section #12 '.strtab' (SHT_STRTAB)
|
|
Size : 7624 bytes
|
|
|
|
|
|
** Section #13 '.note' (SHT_NOTE)
|
|
Size : 28 bytes (alignment 4)
|
|
|
|
|
|
** Section #14 '.comment' (SHT_PROGBITS)
|
|
Size : 23072 bytes
|
|
|
|
|
|
** Section #15 '.shstrtab' (SHT_STRTAB)
|
|
Size : 144 bytes
|
|
|
|
|
|
address size variable name type
|
|
0x10001b4c 0x2 aotimer_offset array[2] of const unsigned char
|
|
|
|
address size variable name type
|
|
0x10001b52 0xc pwm_offset array[6] of const unsigned short
|
|
|
|
address size variable name type
|
|
0x10001f90 0x300 rx_data_buffer array[3] of array[256] of uint8_t
|
|
|
|
address size variable name type
|
|
0x10001b64 0x6 spi_offset array[3] of const unsigned short
|
|
|
|
address size variable name type
|
|
0x10001b4e 0x4 timer_offset array[4] of const unsigned char
|
|
|
|
address size variable name type
|
|
0x10001c90 0x300 tx_data_buffer array[3] of array[256] of uint8_t
|
|
|
|
address size variable name type
|
|
0x10001b5e 0x6 uart_offset array[3] of const unsigned short
|
|
|
|
address size variable name type
|
|
0x00000000 0x3 uart_rx_done array[3] of volatile _Bool
|
|
|
|
address size variable name type
|
|
0x10001c54 0x3c uart_rxbuffer array[3] of ring_buffer_t
|
|
|
|
address size variable name type
|
|
0x10001bd8 0x40 uart_rxdmabuff array[64] of uint8_t
|
|
|
|
address size variable name type
|
|
0x00000000 0x2 uart_tx_cnt uint16_t
|
|
|
|
address size variable name type
|
|
0x00000000 0x3 uart_tx_done array[3] of volatile _Bool
|
|
|
|
address size variable name type
|
|
0x00000000 0x1 uart_tx_done_flag uint8_t
|
|
|
|
address size variable name type
|
|
0x00000000 0x2 uart_tx_len uint16_t
|
|
|
|
address size variable name type
|
|
0x10001c18 0x3c uart_txbuffer array[3] of ring_buffer_t
|
|
|
|
address size variable name type
|
|
0x10001b98 0x40 uart_txdmabuff array[64] of uint8_t
|
|
|
|
address size variable name type
|
|
0x00000000 0x2 aotimer_offset array[2] of const unsigned char
|
|
|
|
address size variable name type
|
|
0x10001b8c 0xc clock_cb CLOCK_InitCfg_t
|
|
0x10001b8c 0x1 * clock_cb.hfclk_src CLOCK_HFCLK_Src_Typedef
|
|
0x10001b90 0x4 clock_cb.hfclk_in CLOCK_HFCLK_In_Typedef
|
|
0x10001b94 0x1 * clock_cb.lfclk_src CLOCK_LFCLK_Src_Typedef
|
|
0x10001b96 0x2 clock_cb.lfclk_in CLOCK_LFCLK_In_Typedef
|
|
|
|
address size variable name type
|
|
0x00000000 0xc pwm_offset array[6] of const unsigned short
|
|
|
|
address size variable name type
|
|
0x00000000 0x6 spi_offset array[3] of const unsigned short
|
|
|
|
address size variable name type
|
|
0x00000000 0x4 timer_offset array[4] of const unsigned char
|
|
|
|
address size variable name type
|
|
0x00000000 0x6 uart_offset array[3] of const unsigned short
|
|
|
|
address size variable name type
|
|
0x00000000 0x2 aotimer_offset array[2] of const unsigned char
|
|
|
|
address size variable name type
|
|
0x00000000 0xc pwm_offset array[6] of const unsigned short
|
|
|
|
address size variable name type
|
|
0x00000000 0x20 recv_buf array[32] of uint8_t
|
|
|
|
address size variable name type
|
|
0x10001b80 0x1 recv_len uint8_t
|
|
|
|
address size variable name type
|
|
0x10001b81 0x1 rf24g_handler_flag _Bool
|
|
|
|
address size variable name type
|
|
0x00000000 0x6 spi_offset array[3] of const unsigned short
|
|
|
|
address size variable name type
|
|
0x00000000 0x4 timer_offset array[4] of const unsigned char
|
|
|
|
address size variable name type
|
|
0x00000000 0x6 uart_offset array[3] of const unsigned short
|
|
|
|
address size variable name type
|
|
0x10001b7c 0x4 __stdout FILE
|
|
0x10001b7c 0x4 __stdout.handle int
|
|
|
|
address size variable name type
|
|
0x00000000 0x2 aotimer_offset array[2] of const unsigned char
|
|
|
|
address size variable name type
|
|
0x00000000 0xc pwm_offset array[6] of const unsigned short
|
|
|
|
address size variable name type
|
|
0x00000000 0x6 spi_offset array[3] of const unsigned short
|
|
|
|
address size variable name type
|
|
0x00000000 0x4 timer_offset array[4] of const unsigned char
|
|
|
|
address size variable name type
|
|
0x00000000 0x6 uart_offset array[3] of const unsigned short
|
|
|