xushaoxiang
70 lines
4.3 KiB
C
70 lines
4.3 KiB
C
#ifndef __BSP_XIP_H__
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#define __BSP_XIP_H__
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#include "xc6xxx.h"
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#define QUAD_MODE 1
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#define DUAL_MODE 0
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#define FMC_XIP_BASE 0x11000000
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#define FMC_REG_BASE 0x51000000
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#define FMC_CACHE_BASE 0x52000000
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#define FMC_CTL ((volatile unsigned *)(CPR_BASE + 0x270))
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#define FMC_CTRL0 ((volatile unsigned *)(FMC_REG_BASE + 0x00))
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#define FMC_CTRL1 ((volatile unsigned *)(FMC_REG_BASE + 0x04))
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#define FMC_EN ((volatile unsigned *)(FMC_REG_BASE + 0x08))
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#define FMC_SE ((volatile unsigned *)(FMC_REG_BASE + 0x10))
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#define FMC_BAUD ((volatile unsigned *)(FMC_REG_BASE + 0x14))
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#define FMC_TXFTL ((volatile unsigned *)(FMC_REG_BASE + 0x18))
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#define FMC_RXFTL ((volatile unsigned *)(FMC_REG_BASE + 0x1c))
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#define FMC_TXFL ((volatile unsigned *)(FMC_REG_BASE + 0x20))
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#define FMC_RXFL ((volatile unsigned *)(FMC_REG_BASE + 0x24))
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#define FMC_STS ((volatile unsigned *)(FMC_REG_BASE + 0x28))
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#define FMC_IE ((volatile unsigned *)(FMC_REG_BASE + 0x2c))
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#define FMC_IS ((volatile unsigned *)(FMC_REG_BASE + 0x30))
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#define FMC_RIS ((volatile unsigned *)(FMC_REG_BASE + 0x34))
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#define FMC_TXOIC ((volatile unsigned *)(FMC_REG_BASE + 0x38))
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#define FMC_RXOIC ((volatile unsigned *)(FMC_REG_BASE + 0x3c))
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#define FMC_RXUIC ((volatile unsigned *)(FMC_REG_BASE + 0x40))
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#define FMC_IC ((volatile unsigned *)(FMC_REG_BASE + 0x48))
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#define FMC_DMAS ((volatile unsigned *)(FMC_REG_BASE + 0x4c))
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#define FMC_DMATDL ((volatile unsigned *)(FMC_REG_BASE + 0x50))
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#define FMC_DMARDL ((volatile unsigned *)(FMC_REG_BASE + 0x54))
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#define FMC_DATA ((volatile unsigned *)(FMC_REG_BASE + 0x60))
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#define FMC_SPI_CTRLR0 ((volatile unsigned *)(FMC_REG_BASE + 0xf4))
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#define FMC_XIP_INCR_INST ((volatile unsigned *)(FMC_REG_BASE + 0x100))
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#define FMC_XIP_WRAP_INST ((volatile unsigned *)(FMC_REG_BASE + 0x104))
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#define FMC_XIP_CTRL ((volatile unsigned *)(FMC_REG_BASE + 0x108))
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#define FMC_XIP_SER ((volatile unsigned *)(FMC_REG_BASE + 0x10c))
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#define FMC_XRXOICR ((volatile unsigned *)(FMC_REG_BASE + 0x110))
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#define FMC_XIP_CNT_TIME_OUT ((volatile unsigned *)(FMC_REG_BASE + 0x114))
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#define CACHE_CCR ((volatile unsigned *)(FMC_CACHE_BASE + 0x00))
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#define CACHE_SR ((volatile unsigned *)(FMC_CACHE_BASE + 0x04))
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#define CACHE_IRQMASK ((volatile unsigned *)(FMC_CACHE_BASE + 0x08))
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#define CACHE_IRQSTAT ((volatile unsigned *)(FMC_CACHE_BASE + 0x0c))
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#define CACHE_HWPARAMS ((volatile unsigned *)(FMC_CACHE_BASE + 0x10))
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#define CACHE_CSHR ((volatile unsigned *)(FMC_CACHE_BASE + 0x14))
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#define CACHE_CSMR ((volatile unsigned *)(FMC_CACHE_BASE + 0x18))
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#define CACHE_PIDR4 ((volatile unsigned *)(FMC_CACHE_BASE + 0xFD0))
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#define CACHE_PIDR5 ((volatile unsigned *)(FMC_CACHE_BASE + 0xFD4))
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#define CACHE_PIDR6 ((volatile unsigned *)(FMC_CACHE_BASE + 0xFD8))
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#define CACHE_PIDR7 ((volatile unsigned *)(FMC_CACHE_BASE + 0xFDC))
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#define CACHE_PIDR0 ((volatile unsigned *)(FMC_CACHE_BASE + 0xFE0))
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#define CACHE_PIDR1 ((volatile unsigned *)(FMC_CACHE_BASE + 0xFE4))
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#define CACHE_PIDR2 ((volatile unsigned *)(FMC_CACHE_BASE + 0xFE8))
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#define CACHE_PIDR3 ((volatile unsigned *)(FMC_CACHE_BASE + 0xFEC))
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#define CACHE_CIDR0 ((volatile unsigned *)(FMC_CACHE_BASE + 0xFF0))
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#define CACHE_CIDR1 ((volatile unsigned *)(FMC_CACHE_BASE + 0xFF4))
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#define CACHE_CIDR2 ((volatile unsigned *)(FMC_CACHE_BASE + 0xFF8))
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#define CACHE_CIDR3 ((volatile unsigned *)(FMC_CACHE_BASE + 0xFFC))
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extern void init_xip(uint8_t mode);
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#endif
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