xushaoxiang
128 lines
4.5 KiB
C
128 lines
4.5 KiB
C
#ifndef _BOOTSECOND_H_
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#define _BOOTSECOND_H_
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#define __RAM_DMA __attribute__((section("ram_code")))
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typedef enum
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{
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INVALIDSTAT = 0,
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ACTIVEASTAT = 1,
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ERASEASTAT = 2,
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OVERWRITEASTAT = 3,
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ACTIVEBSTAT = 4,
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ERASEBSTAT = 5,
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OVERWRITEBSTAT = 6,
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} STATUS_T;
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typedef enum
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{
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ERRNONE = 0,
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ERRPARAMDAMAGE = 1,
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ERROVERWRITE = 2,
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ERRCHECK = 3,
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} ERROR_T;
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typedef enum
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{
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STATUS_APPBOOT,
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STATUS_APPUPDATA,
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STATUS_APPERROR,
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} PARMSTATUS;
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typedef enum
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{
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APPBOOTA = 0,
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APPUPDATA = 2,
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APPBOOTB = 3,
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APPBOOTERR = 4,
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} APPSTATUS;
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typedef enum
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{
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FLASH_SIZE_1M = 0x11,
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FLASH_SIZE_2M = 0x12,
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FLASH_SIZE_4M = 0x13,
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} FLASH_SIZEID;
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typedef enum
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{
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FLASH_1M_BACKUPADDR = 29 * 4096,
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FLASH_2M_BACKUPADDR = 61 * 4096,
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FLASH_4M_BACKUPADDR = 125 * 4096,
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} FLASH_SIZE;
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#define DEBUG_PRINT
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#define PIN_AB_DAMAGE 18
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// #define PIN_DETECT
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#define PIN_AB_ACTIVE 0
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#define CRC32_INITIAL 0
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#define CODES_OFFSET 0x20
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#define PARAM_CNT 5
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#define PARAM_LENGTH 240
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#define TO_B 0
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#define TO_A 1
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#define CPR_CTLAPBCLKEN_GRCTL_MASK_OFFSET (16UL)
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#define CPR_CTLAPBCLKEN_GRCTL_WDT_PCLK_EN_Pos (0x0UL) // /*!< Position of WDT_PCLK_EN field. */
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#define CPR_CTLAPBCLKEN_GRCTL_WDT_PCLK_EN_Msk (0x1UL << CPR_CTLAPBCLKEN_GRCTL_WDT_PCLK_EN_Pos)
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#define CPR_CTLAPBCLKEN_GRCTL_WDT_PCLK_EN_DISABLE (0x0UL << CPR_CTLAPBCLKEN_GRCTL_WDT_PCLK_EN_Pos) /*!< 0����ʹ��ʱ�� */
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#define CPR_CTLAPBCLKEN_GRCTL_WDT_PCLK_EN_ENABLE (0x1UL << CPR_CTLAPBCLKEN_GRCTL_WDT_PCLK_EN_Pos) /*!< 1��ʹ��ʱ��*/
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#define CPR_RSTCTL_CTLAPB_SW_WDT_RSTN_Pos (0x2UL) // /*!< Position of WDT_RSTN field. */
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#define CPR_RSTCTL_CTLAPB_SW_WDT_RSTN_Msk (0x1UL << CPR_RSTCTL_CTLAPB_SW_WDT_RSTN_Pos)
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#define CPR_RSTCTL_CTLAPB_SW_WDT_RSTN_DISABLE (RSTN_INVALID << CPR_RSTCTL_CTLAPB_SW_WDT_RSTN_Pos) /*!< 1������λ */
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#define CPR_RSTCTL_CTLAPB_SW_WDT_RSTN_ENABLE (RSTN_VALID << CPR_RSTCTL_CTLAPB_SW_WDT_RSTN_Pos) /*!< 0����λ*/
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#define CPR_RSTCTL_WDTRST_MASK_WDT_SYS_RSTN_MASK_Pos (0x0UL) // /*!< Position of WDT_SYS_RSTN_MASK field. */
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#define CPR_RSTCTL_WDTRST_MASK_WDT_SYS_RSTN_MASK_Msk (0x1UL << CPR_RSTCTL_WDTRST_MASK_WDT_SYS_RSTN_MASK_Pos)
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#define CPR_RSTCTL_WDTRST_MASK_WDT_SYS_RSTN_MASK_DISABLE (0x0UL << CPR_RSTCTL_WDTRST_MASK_WDT_SYS_RSTN_MASK_Pos) /*!< 0�������� */
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#define CPR_RSTCTL_WDTRST_MASK_WDT_SYS_RSTN_MASK_ENABLE (0x1UL << CPR_RSTCTL_WDTRST_MASK_WDT_SYS_RSTN_MASK_Pos) /*!< 1������*/
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#define CPR_RSTCTL_WDTRST_MASK_WDT_M4_RSTN_MASK_Pos (0x1UL) // /*!< Position of WDT_M0_RSTN_MASK field. */
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#define CPR_RSTCTL_WDTRST_MASK_WDT_M4_RSTN_MASK_Msk (0x1UL << CPR_RSTCTL_WDTRST_MASK_WDT_M4_RSTN_MASK_Pos)
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#define CPR_RSTCTL_WDTRST_MASK_WDT_M4_RSTN_MASK_DISABLE (0x0UL << CPR_RSTCTL_WDTRST_MASK_WDT_M4_RSTN_MASK_Pos) /*!< 0�������� */
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#define CPR_RSTCTL_WDTRST_MASK_WDT_M4_RSTN_MASK_ENABLE (0x1UL << CPR_RSTCTL_WDTRST_MASK_WDT_M4_RSTN_MASK_Pos) /*!< 1������*/
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#define RSTN_VALID (0UL)
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#define RSTN_INVALID (1UL)
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#define PARAM_ADDR ((8*1024)-512)
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#define FLASH_VIR_AADDR 0x11000000
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#define ALIGN(num) __attribute__((aligned(num)))
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//#define FLASH_READ_PAGE spi_flash_Read_Page
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//#define FLASH_SECTOR_ERASE spi_flash_sector_erase
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//#define SPI_WRITE_ENABLE spi_flash_write_enable
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//#define FLASH_WRITE_PAGE xc_spi_flash_write_page
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//#define FLASH_WAIT_READY while (spi_flash_wait_till_ready())
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#define FLASH_READ_PAGE xc_spi_flash_read_page
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#define FLASH_SECTOR_ERASE xc_spi_flash_erase_sector
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#define FLASH_PAGE_ERASE xc_spi_flash_erase_page
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#define SPI_WRITE_ENABLE
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#define FLASH_WRITE_PAGE xc_spi_flash_write_page
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#define FLASH_WAIT_READY
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typedef struct
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{
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uint32_t status; /**/
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uint32_t softver; /**/
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uint32_t acheck; /*crc32*/
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uint32_t aaddr; /*sector align*/
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uint32_t alen; /*page align*/
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uint32_t bcheck; /**/
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uint32_t baddr; /**/
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uint32_t blen; /**/
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uint32_t aloadaddr;
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uint32_t bloadaddr;
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uint32_t RESERVED0[2];
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} param_unit;
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typedef struct
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{
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param_unit paramunit[PARAM_CNT];
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uint32_t paramcrc32;
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uint32_t RESERVED1[3];
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} sboot_message;
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void boot_run_sec(void);
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extern volatile uint32_t param_backup_addr;
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void boot_run(void);
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void param_analy(param_unit *sParam);
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__RAM_CODE __asm void MSR_MSP(uint32_t addr);
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void flash_init(void);
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void overwrite_backup(param_unit *oparam);
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int uart_printf(const char *fmt,...);
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#endif
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