xushaoxiang
82 lines
2.2 KiB
C
82 lines
2.2 KiB
C
/*!
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* \file hal_sleep.c
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*
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* \brief Target xc6xxx hal spi implementation
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*
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* \copyright Revised BSD License, see section \ref LICENSE.
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*
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* \code
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*
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* _ __ _ ________ _
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* | |/ /(_)___ / ____/ /_ (_)___
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* | // / __ \/ / / __ \/ / __ \
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* / |/ / / / / /___/ / / / / /_/ /
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* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
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* /_/
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* (C) 2022-2025 XinChip
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*
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* \endcode
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*
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* \author ( XinChip ) Alex-J
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*
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* \author ( XinChip )
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*/
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/* ------------------------------------------------------------------------------------------------
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* Includes
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* ------------------------------------------------------------------------------------------------
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*/
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#include "hal_timer.h"
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#include "OSAL_Clock.h"
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#include "xc_drv_timer.h"
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uint32 sys_tick_cnt;
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__RAM_CODE void timer1_callback(void *context)
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{
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sys_tick_cnt++;
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}
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__RAM_CODE void osal_timer_init(void)
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{
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/* timer1 init */
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if (cpr_ctlapbclken_grctl__timer_pclk_en__getf() != ENABLE)
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cpr_ctlapbclken_grctl__timer_pclk_en__setf(ENABLE);
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cpr_timer1_clk_ctl__timer_clksel__setf(TIMER_CLK_SRC_32M_DIV);
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cpr_timer1_clk_ctl__timer_clk0_div__setf(TIMER_DIV_CLK_16MHzOr16K);
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cpr_timer1_clk_ctl__timer_clk1_div__setf(TIMER_DIV_CLK_16MHzOr16K);
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cpr_lp_ctl__timer_sysclk_sel__setf(ENABLE);
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timer_tcr__tes__setf(OSAL_TIMER, TIMER_TCR_TES_DISABLE);
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timer_tcr__tms__setf(OSAL_TIMER, TIMER_MODE_CYCLE);
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/* value set */
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timer_tlc_set(OSAL_TIMER, 10000); //625us = 10000tick
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/* timer1 start */
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NVIC_EnableIRQ(TIMER1_IRQn);
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NVIC_SetPriority(TIMER1_IRQn,1);
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timer_tcr__tim__setf(OSAL_TIMER, TIMER_TCR_TIM_DISABLE);
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timer_tcr__tes__setf(OSAL_TIMER, TIMER_TCR_TES_ENABLE);
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return;
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}
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__RAM_CODE void osal_timer_start(void)
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{
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NVIC_EnableIRQ(TIMER1_IRQn);
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timer_tcr__tim__setf(OSAL_TIMER, TIMER_TCR_TIM_DISABLE);
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timer_tcr__tes__setf(OSAL_TIMER, TIMER_TCR_TES_ENABLE);
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}
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__RAM_CODE void osal_timer_tick_set(uint32 tick)
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{
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sys_tick_cnt = tick;
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}
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__RAM_CODE uint32 getMcuPrecisionCount(void)
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{
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return sys_tick_cnt;
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}
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