xushaoxiang
220 lines
8.1 KiB
C
220 lines
8.1 KiB
C
/**
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****************************************************************************************
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*
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* @file ld_util.h
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*
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* @brief LD Util API
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*
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* Copyright (C) RivieraWaves 2009-2015
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*
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*
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****************************************************************************************
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*/
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#ifndef LD_UTIL_H_
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#define LD_UTIL_H_
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/**
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****************************************************************************************
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* @addtogroup LD
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* @{
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****************************************************************************************
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*/
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/*
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* INCLUDE FILES
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****************************************************************************************
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*/
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#include "rwip_config.h" // stack configuration
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#include <stdint.h> // integer
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#include "co_bt.h" // BT standard definitions
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/*
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* CONSTANT DEFINITIONS
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****************************************************************************************
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*/
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/// Undefined BT clock value
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#define LD_CLOCK_UNDEF 0xFFFFFFFF
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/**
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* Margin between 2 ACL frames (in us)
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*
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* The chosen value is based on the packets duration and the time needed by the system to close and start a frame.
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*
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* Remaining guard band after Poll/Null : 499us
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* Remaining guard band after max DM1 packet : 199us
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*
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* Time used by system after frame (Power Down / CS+Desc update) : 50
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* Time used by system after frame (Power Up / CS+Desc fetch) : 50
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*/
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#define LD_ACL_INTERFRAME_MARGIN (120)
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/**
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* Margin after eSCO frame (in us)
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*/
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#define LD_SCO_INTERFRAME_MARGIN (80)
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/**
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* Margin after inquiry frames (in us)
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*
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* The chosen value is based on last frame duration and the time needed by the system to close and start a frame.
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*
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* Remaining guard band after last ID packet missed reception : 250us
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*
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* Time used by system after frame (Power Down / CS+Desc update) : 50
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* Time used by system after frame (Power Up / CS+Desc fetch) : 50
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*/
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#define LD_INQ_INTERFRAME_MARGIN (200)
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#define LD_PAGE_INTERFRAME_MARGIN (200)
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/**
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* Margin after scan frames (in us)
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*
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* The chosen value is based on last frame duration and the time needed by the anticipated prefetch abort mechanism
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* to abort the scan. The prefetch abort delay is configured to the register.
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*
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* Just consider half-slot for enabling interlacing acitivites with high bit offset
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*/
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#define LD_SCAN_INTERFRAME_MARGIN (SLOT_SIZE - LD_ACL_INTERFRAME_MARGIN + 1)
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/*
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* MACRO DEFINITIONS
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****************************************************************************************
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*/
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/*
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* STRUCTURE DEFINITIONS
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****************************************************************************************
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*/
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/*
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* VARIABLE DEFINITIONS
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****************************************************************************************
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*/
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/// Table for synchronization train channels
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extern const uint8_t ld_sync_train_channels[SYNC_TRAIN_CHANNEL_NB];
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/*
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* FUNCTIONS DECLARATION
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****************************************************************************************
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*/
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/**
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****************************************************************************************
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* @brief Unpack FHS packet
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*
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* @param[in] fhs_buf_ptr Pointer to the FHS payload buffer (in EM)
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* @param[out] bch_ptr Pointer to BCH
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* @param[out] bd_addr BD Address
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* @param[out] class_dev Class Of Device
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* @param[out] lt_addr LT Address
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* @param[out] clk_frm Clock (in 1.25ms BT frame)
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* @param[out] page_scan_rep_mode Page Scan Repetition Mode (R0, R1, R2)
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****************************************************************************************
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*/
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void ld_util_fhs_unpk(uint16_t fhs_buf_ptr, uint8_t* bch_ptr, struct bd_addr* bd_addr, struct devclass* class_of_dev, uint8_t* lt_addr, uint32_t* clk_frm, uint8_t* page_scan_rep_mode);
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/**
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****************************************************************************************
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* @brief Generate a BCH code from LAP.
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*
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* The lap pointer must point on a table :
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* Msb Lsb
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* lap[0] = a7..a0
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* lap[1] = a15..a7
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* lap[2] = a23..a16
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* The bch result is stored in :
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* Msb Lsb
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* bch[0] = a7..a0
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* bch[1] = a15..a8
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* bch[2] = a23..a16
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* bch[3] = a31..a24
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* bch[4] = a39..a32
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* bch[5] = a47..a40
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* bch[6] = a55..a48
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* bch[7] = a63..a56
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*
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* @param[in] lap Input LAP Vector[3]
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* @param[out] bch Output BCH [8]
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*
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****************************************************************************************
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*/
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void ld_util_bch_create(uint8_t *lap, uint8_t *bch);
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/**
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****************************************************************************************
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* @brief Pack FHS packet
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*
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* @param[in] fhs_buf_ptr Pointer to the FHS payload buffer (in EM)
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* @param[in] bch_ptr Pointer to BCH
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* @param[in] eir Value indicating whether EIR is available or not
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* @param[in] sr Scan repetition
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* @param[in] bd_addr BD Address
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* @param[in] class_of_dev Class Of Device
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* @param[in] lt_addr LT Address
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* @param[in] page_scan_mode Page scan mode
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****************************************************************************************
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*/
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void ld_util_fhs_pk(uint16_t fhs_buf_ptr, uint8_t* bch_ptr, uint8_t eir, uint8_t sr, struct bd_addr* bd_addr, struct devclass* class_of_dev, uint8_t lt_addr, uint8_t page_scan_mode);
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/**
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****************************************************************************************
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* @brief Set the active AFH Map
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*
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* @param[in] chnl_map AFH map
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****************************************************************************************
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*/
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void ld_util_active_master_afh_map_set(struct chnl_map* ch_map);
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/**
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****************************************************************************************
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* @brief Get the active AFH Map
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*
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* @param[out] chnl_map AFH map
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****************************************************************************************
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*/
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struct chnl_map* ld_util_active_master_afh_map_get(void);
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/**
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****************************************************************************************
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* @brief Unpack sync train packet
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*
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* @param[in] buf_ptr Pointer to the STP payload buffer (in EM)
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* @param[out] clk_hs Current piconet clock (CLK) (in half slots)
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* @param[out] future_csb_inst Future Connectionless Slave Broadcast Instant
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* @param[out] afh_ch_map The current AFH_Channel_Map used for the PBD logical link
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* @param[out] mst_bd_addr Master BD Address
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* @param[out] csb_intv CSB interval (in slots)
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* @param[out] csb_lt_addr The LT_ADDR reserved for the CSB logical transport
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* @param[out] svc_data Defined by the service using the Connectionless Slave Broadcast feature
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****************************************************************************************
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*/
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void ld_util_stp_unpk(uint16_t buf_ptr, uint32_t* clk_hs, uint32_t* future_csb_inst, struct chnl_map* afh_ch_map, struct bd_addr* mst_bd_addr, uint16_t* csb_intv, uint8_t* csb_lt_addr, uint8_t* svc_data);
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/**
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****************************************************************************************
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* @brief Pack sync train packet
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*
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* @param[in] buf_ptr Pointer to the STP payload buffer (in EM)
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* @param[out] clk_hs Current piconet clock (CLK) (in half slots)
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* @param[out] future_csb_inst Future Connectionless Slave Broadcast Instant (in slots)
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* @param[out] afh_ch_map The current AFH_Channel_Map used for the PBD logical link
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* @param[out] mst_bd_addr Master BD Address
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* @param[out] csb_intv CSB interval (in slots)
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* @param[out] csb_lt_addr The LT_ADDR reserved for the CSB logical transport
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* @param[out] svc_data Defined by the service using the Connectionless Slave Broadcast feature
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****************************************************************************************
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*/
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void ld_util_stp_pk(uint16_t buf_ptr, uint32_t clk_hs, uint32_t future_csb_inst, struct chnl_map* afh_ch_map, struct bd_addr* mst_bd_addr, uint16_t csb_intv, uint8_t csb_lt_addr, uint8_t svc_data);
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/// @} LD
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#endif // LD_UTIL_H_
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