xushaoxiang
263 lines
9.9 KiB
C
263 lines
9.9 KiB
C
/*!
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* \file xc_drv_uart.h
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*
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* \brief The header of xc_drv_uart.c
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*
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* \copyright Revised BSD License, see section \ref LICENSE.
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*
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* \code
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*
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* _ __ _ ________ _
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* | |/ /(_)___ / ____/ /_ (_)___
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* | // / __ \/ / / __ \/ / __ \
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* / |/ / / / / /___/ / / / / /_/ /
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* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
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* /_/
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* (C) 2022-2025 XinChip
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*
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* \endcode
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*
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* \author ( XinChip ) Alex-J
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*
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* \author ( XinChip )
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*/
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/** Define to Prevent Recursive Inclusion */
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#ifndef __XC_UART_H__
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#define __XC_UART_H__
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/*-----------------------------------------------------------------------------------
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INCLUDE HEADE FILES
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------------------------------------------------------------------------------------*/
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#include <stdbool.h>
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#include <stdio.h>
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#include "ringbuffer.h"
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#include "xc6xxx.h"
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#if !defined(NO_SUPPORT_UART2)
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#define UART_NUM 3
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#else
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#define UART_NUM 2
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#endif
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/*------------------------------------------------------------------------------------
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TypeDef
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-------------------------------------------------------------------------------------*/
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typedef void (*uart_handler_callback)(uint8_t *buff, uint16_t len);
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/**
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* @brief UART interrupt ID enumeration
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*/
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typedef enum
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{
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UART_IT_Modem_Status = 0x00, /*!< modem status Interrupt */
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UART_NO_Pending_INT = 0x01, /*!< no interrupt pending */
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UART_IT_THR_Empty = 0x02, /*!< THR emptyInterrupt */
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UART_IT_Received_Data_Available = 0x04, /*!< received data available Interrupt */
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UART_IT_Receive_Line_Status = 0x06, /*!< receiver line status Interrupt */
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UART_IT_Character_Timeout = 0x0C, /*!< character timeout Interrupt */
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} UART_IT_TypeDef;
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/**
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* @brief UART Init Structure Definition
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*/
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typedef struct
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{
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uint32_t BaudRate;
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uint16_t WordLength;
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uint16_t StopBits;
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uint16_t Parity;
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uint16_t HardwareFlowControl;
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} UART_InitCfg_t;
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typedef struct
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{
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uart_handler_callback uart_receive_cb[UART_NUM];
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} UART_Block_t;
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/*------------------------------------------------------------------------------------
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Macros
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-------------------------------------------------------------------------------------*/
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#define UART_IER_ERDA_ENABLE (0x1UL)
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#define UART_IER_ERDA_DISABLE (0x0UL)
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#define UART_IER_ETHEI_ENABLE (0x1UL)
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#define UART_IER_ETHEI_DISABLE (0x0UL)
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#define UART_IER_ETSI_ENABLE (0x1UL)
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#define UART_IER_ETSI_DISABLE (0x0UL)
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#define UART_IER_EMSI_ENABLE (0x1UL)
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#define UART_IER_EMSI_DISABLE (0x0UL)
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#define UART_IER_ETSI_ENABLE (0x1UL)
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#define UART_IER_ETSI_DISABLE (0x0UL)
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#define UART_IER_ETHSI_ENABLE (0x1UL)
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#define UART_IER_ETHSI_DISABLE (0x0UL)
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#define UART_IER_ERDAI_ENABLE (0x1UL)
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#define UART_IER_ERDAI_DISABLE (0x0UL)
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#define UART_IER_PTIME_ENABLE (0x1UL)
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#define UART_IER_PTIME_DISABLE (0x0UL)
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#define UART_IIR_IID_EMSI (0x0UL)
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#define UART_IIR_IID_NO_IT (0x1UL)
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#define UART_IIR_IID_ETHEI (0x02UL)
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#define UART_IIR_IID_ERDAI (0x04UL)
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#define UART_IIR_IID_ETSI (0x06UL)
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#define UART_IIR_IID_BUSY (0x07UL)
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#define UART_IIR_IID_TO (0xCUL)
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#define UART_IIR_FS_ENABLE (0x3UL)
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#define UART_IIR_FS_DISABLE (0x0UL)
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#define UART_FCR_FIFO_ENABLE_ENABLE (0x1UL)
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#define UART_FCR_FIFO_ENABLE_DISABLE (0x0UL)
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#define UART_FCR_RCVR_FIFO_RESET_CLEAR (0x1UL)
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#define UART_FCR_RCVR_FIFO_RESET_NOT_CLEAR (0x0UL)
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#define UART_FCR_XMIT_FIFO_RESET_CLEAR (0x1UL)
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#define UART_FCR_XMIT_FIFO_RESET_NOT_CLEAR (0x0UL)
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#define UART_FCR_TX_EMPTY_TRIGGER_FIFO_EMPTY (0x0UL)
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#define UART_FCR_TX_EMPTY_TRIGGER_FIFO_2_BYTE (0x1UL)
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#define UART_FCR_TX_EMPTY_TRIGGER_FIFO_4_3 (0x2UL)
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#define UART_FCR_TX_EMPTY_TRIGGER_FIFO_2_1 (0x3UL)
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#define UART_FCR_RCVR_TRIGGER_FIFO_1_BYTE (0x0UL)
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#define UART_FCR_RCVR_TRIGGER_FIFO_4_1 (0x1UL)
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#define UART_FCR_RCVR_TRIGGER_FIFO_2_1 (0x2UL)
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#define UART_FCR_RCVR_TRIGGER_FIFO_LESS_2_BYTE (0x3UL)
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#define UART_TCR_CLS_Pos (0UL)
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#define UART_TCR_CLS_Msk (0x3UL)
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#define UART_TCR_CLS_5BITS (0x0UL)
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#define UART_TCR_CLS_6BITS (0x1UL)
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#define UART_TCR_CLS_7BITS (0x2UL)
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#define UART_TCR_CLS_8BITS (0x3UL)
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#define UART_TCR_STOP_Pos (2UL)
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#define UART_TCR_STOP_Msk (0x1UL)
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#define UART_TCR_STOP_1BITS (0x0UL)
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#define UART_TCR_STOP_1_5BITS (0x1UL)
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#define UART_TCR_STOP_2BITS (0x1UL)
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#define UART_TCR_PEN_DISABLE (0x0UL)
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#define UART_TCR_PENS_ENABLE (0x1UL)
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#define UART_TCR_EPS_ODD (0x0UL)
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#define UART_TCR_EPS_EVEN (0x1UL)
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#define UART_TCR_BREAK_STOP (0x1UL)
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#define UART_TCR_BREAK_RECOVER (0x0UL)
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#define UART_TCR_DLAB_DLLH_ENABLE (0x1UL)
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#define UART_TCR_DLAB_DLLH_DISABLE (0x0UL)
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#define UART_MCR_RTS_Msk (0x1UL)
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#define UART_MCR_RTS_OUT_HIGH (0x1UL)
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#define UART_MCR_RTS_OUT_LOW (0x0UL)
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#define UART_MCR_AFCE_ENABLE (0x1UL)
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#define UART_MCR_AFCE_DISABLE (0x0UL)
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#define UART_TSR_DR_VALID (0x1UL)
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#define UART_TSR_DR_INVALID (0x0UL)
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#define UART_TSR_OE_VALID (0x1UL)
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#define UART_TSR_OE_INVALID (0x0UL)
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#define UART_TSR_PE_Pos (2UL)
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#define UART_TSR_PE_Msk (0x1UL)
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#define UART_TSR_PE_VALID (0x1UL)
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#define UART_TSR_PE_INVALID (0x0UL)
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#define UART_TSR_FE_VALID (0x1UL)
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#define UART_TSR_FE_INVALID (0x0UL)
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#define UART_TSR_BI_VALID (0x1UL)
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#define UART_TSR_BI_INVALID (0x0UL)
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#define UART_TSR_THRE_VALID (0x1UL)
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#define UART_TSR_THRE_INVALID (0x0UL)
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#define UART_TSR_RX_FIFO_ERROR_VALID (0x1UL)
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#define UART_TSR_RX_FIFO_ERROR_INVALID (0x0UL)
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#define UART_MSR_DCTS_CHANGE (0x1UL)
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#define UART_MSR_DCTS_NO_CHANGE (0x0UL)
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#define UART_MSR_CTS_OUT_LOW (0x1UL)
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#define UART_MSR_CTS_OUT_HIGH (0x0UL)
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#define UART_USR_BUSY_BUSY (0x1UL)
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#define UART_USR_BUSY_IDLE (0x0UL)
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#define UART_BUFF_LEN 64U
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#define UART_DATA_5_BITS UART_TCR_CLS_5BITS
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#define UART_DATA_6_BITS UART_TCR_CLS_6BITS
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#define UART_DATA_7_BITS UART_TCR_CLS_7BITS
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#define UART_DATA_8_BITS UART_TCR_CLS_8BITS
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#define UART_STOP_1_BITS UART_TCR_STOP_1BITS
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#define UART_STOP_1_5_BITS UART_TCR_STOP_1_5BITS
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#define UART_STOP_2_BITS UART_TCR_STOP_2BITS
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#define UART_HWFC_DISABLE UART_MCR_AFCE_DISABLE
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#define UART_HWFC_ENABLE UART_MCR_AFCE_ENABLE
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#define UART_PARITY_ENABLE UART_TCR_PENS_ENABLE
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#define UART_PARITY_DISABLE UART_TCR_PEN_DISABLE
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#define UART_PARITY_ODD (0x1UL)
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#define UART_PARITY_EVEN (0x2UL)
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#define UART_BAUDRATE_2400 (0x0120271CUL)
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#define UART_BAUDRATE_4800 (0x0240271CUL)
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#define UART_BAUDRATE_9600 (0x0480271CUL)
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#define UART_BAUDRATE_12800 (0x04802719UL)
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#define UART_BAUDRATE_14400 (0x04802718UL)
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#define UART_BAUDRATE_19200 (0x04802716UL)
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#define UART_BAUDRATE_23040 (0x04802715UL)
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#define UART_BAUDRATE_38400 (0x04802713UL)
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#define UART_BAUDRATE_57600 (0x04802712UL)
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#define UART_BAUDRATE_115200 (0x04802711UL)
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#define UART_BAUDRATE_128000 (0x030007D3UL)
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#define UART_BAUDRATE_230400 (0x09002711UL)
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#define UART_BAUDRATE_256000 (0x060007D3UL)
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#define UART_BAUDRATE_460800 (0x12002711UL)
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#define UART_BAUDRATE_921600 (0x24002711UL)
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#define UART_BAUDRATE_1M (0x00100011UL)
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/*------------------------------------------------------------------------------------
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Global Variables
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-------------------------------------------------------------------------------------*/
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extern uint8_t __attribute__((aligned(4))) uart_txdmabuff[UART_BUFF_LEN];
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extern uint8_t __attribute__((aligned(4))) uart_rxdmabuff[UART_BUFF_LEN];
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/*------------------------------------------------------------------------------------
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Exported Functions
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-------------------------------------------------------------------------------------*/
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void xc_uart_init(uint8_t reg_idx, UART_InitCfg_t *uart_cfg);
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void xc_uart_enable_rx_it(uint8_t reg_idx);
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void xc_uart_disable_rx_it(uint8_t reg_idx);
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void xc_uart_send_byte(uint8_t reg_idx, uint8_t byte);
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void xc_uart_send_data(uint8_t reg_idx, uint8_t *data, uint16_t len);
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uint16_t xc_uart_receive_data(uint8_t reg_idx, uint8_t *data);
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void xc_uart_register_receive_cb(uint8_t reg_idx, uart_handler_callback uart_cb);
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#endif /* __XC6xxx_HAL_UART_H__ */
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