xushaoxiang
320 lines
13 KiB
C
320 lines
13 KiB
C
/*!
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* \file xc_drv_pwm.h
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*
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* \brief The header of xc_drv_pwm.c
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*
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* \copyright Revised BSD License, see section \ref LICENSE.
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*
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* \code
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*
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* _ __ _ ________ _
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* | |/ /(_)___ / ____/ /_ (_)___
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* | // / __ \/ / / __ \/ / __ \
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* / |/ / / / / /___/ / / / / /_/ /
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* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
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* /_/
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* (C) 2022-2025 XinChip
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*
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* \endcode
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*
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* \author ( XinChip ) Alex-J
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*
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* \author ( XinChip )
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*/
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#ifndef _XC_DRV_PWM_H_
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#define _XC_DRV_PWM_H_
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/*-----------------------------------------------------------------------------------
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INCLUDE HEADE FILES
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------------------------------------------------------------------------------------*/
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#include <stdbool.h>
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#include <stdio.h>
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#include "xc6xxx.h"
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/*------------------------------------------------------------------------------------
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Macros
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-------------------------------------------------------------------------------------*/
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#define PWM_CLK_DIV_CAL(div) (2 * (div + 1))
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#define PWM_FREQ_MAX_CAL(pwm_clk, dutycycle_acc) \
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(pwm_clk / (dutycycle_acc * (0 + 1)))
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#define PWM_FREQ_CAL(pwm_clk, dutycycle_acc, period) \
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(pwm_clk / (dutycycle_acc * (period + 1)))
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#define PWM_UP_UPDATE_ENABLE (1UL)
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#define PWM_UP_UPDATE_DISABLE (0UL)
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#define PWM_EN_ENABLE (0x01UL)
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#define PWM_EN_DISABLE (0x00UL)
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#define PWM_EN_ALL_ENABLE (0x01UL)
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#define PWM_EN_ALL_DISABLE (0x00UL)
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#define PWM_EN_SLEEP_EN_ENABLE (0x01UL)
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#define PWM_EN_SLEEP_EN_DISABLE (0x00UL)
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#define PWM_EN_MODE_EDGE_ALIGNED (0x03UL)
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#define PWM_EN_MODE_CENTER_ALIGNED (0x02UL)
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#define PWM_COMP_TIME_PWMCOMPTIME_Pos (0x00UL)
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#define PWM_COMP_TIME_PWMCOMPTIME_Msk (0xFFUL)
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#define PWM_COMP_TIME_PWMCOMPTIME_VAL_1CLK (0x00UL)
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#define PWM_COMP_TIME_PWMCOMPTIME_VAL_2CLK (0x01UL)
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#define PWM_COMP_TIME_PWMCOMPTIME_VAL_3CLK (0x02UL)
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#define PWM_COMP_TIME_PWMCOMPTIME_VAL_4CLK (0x03UL)
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#define PWM_COMP_TIME_PWMCOMPTIME_VAL_5CLK (0x04UL)
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#define PWM_COMP_TIME_PWMCOMPTIME_VAL_6CLK (0x05UL)
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#define PWM_COMP_TIME_PWMCOMPTIME_VAL_7CLK (0x06UL)
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#define PWM_COMP_TIME_PWMCOMPTIME_VAL_8CLK (0x07UL)
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#define PWM_BRK_BRK_CLEAR_EXIT (0x01UL)
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#define PWM_BRK_DBC_EN_ENABLE (0x01UL)
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#define PWM_BRK_DBC_EN_DISABLE (0x00UL)
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#define PWM_BRK_DBC_STEP1 (0x01UL)
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#define PWM_BRK_DBC_STEP2 (0x02UL)
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#define PWM_BRK_DBC_STEP3 (0x03UL)
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#define PWM_BRK_DBC_STEP4 (0x04UL)
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#define PWM_BRK_DBC_STEP5 (0x05UL)
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#define PWM_BRK_DBC_STEP6 (0x06UL)
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#define PWM_BRK_DBC_STEP7 (0x07UL)
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#define PWM_BRK_DBC_STEP8 (0x08UL)
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#define PWM_BRK_DBC_STEP9 (0x09UL)
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#define PWM_BRK_DBC_STEP10 (0x0AUL)
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#define PWM_BRK0_INV_ENABLE (0x01UL)
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#define PWM_BRK0_INV_DISABLE (0x00UL)
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#define PWM_BRK1_INV_ENABLE (0x02UL)
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#define PWM_BRK1_INV_DISABLE (0x00UL)
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#define PWM_BRK2_INV_ENABLE (0x04UL)
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#define PWM_BRK2_INV_DISABLE (0x00UL)
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#define PWM_BRK0_MASK_ENABLE (0x01UL)
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#define PWM_BRK0_MASK_DISABLE (0x00UL)
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#define PWM_BRK1_MASK_ENABLE (0x02UL)
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#define PWM_BRK1_MASK_DISABLE (0x00UL)
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#define PWM_BRK2_MASK_ENABLE (0x04UL)
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#define PWM_BRK2_MASK_DISABLE (0x00UL)
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#define PWM_BRK0_ENABLE_ENABLE (0x01UL)
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#define PWM_BRK0_ENABLE_DISABLE (0x00UL)
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#define PWM_BRK1_ENABLE_ENABLE (0x02UL)
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#define PWM_BRK1_ENABLE_DISABLE (0x00UL)
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#define PWM_BRK2_ENABLE_ENABLE (0x04UL)
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#define PWM_BRK2_ENABLE_DISABLE (0x00UL)
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#define PWM_CAPTURE_UPD0_EN_ENABLE (0x01UL)
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#define PWM_CAPTURE_UPD1_EN_ENABLE (0x02UL)
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#define PWM_CAPTURE_UPD2_EN_ENABLE (0x04UL)
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#define PWM_CAPTURE_PSC_1 (0x00UL)
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#define PWM_CAPTURE_PSC_2 (0x01UL)
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#define PWM_CAPTURE_PSC_3 (0x02UL)
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#define PWM_CAPTURE_MODE_RISE (0x00UL)
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#define PWM_CAPTURE_MODE_FALL (0x01UL)
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#define PWM_CAPTURE_MODE_BOTH (0x02UL)
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#define PWM_CAPTURE_DBC_STEP0 (0x00UL)
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#define PWM_CAPTURE_DBC_STEP1 (0x01UL)
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#define PWM_CAPTURE_DBC_STEP2 (0x02UL)
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#define PWM_CAPTURE_DBC_STEP3 (0x03UL)
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#define PWM_CAPTURE_DBC_STEP4 (0x04UL)
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#define PWM_CAPTURE_DBC_STEP5 (0x05UL)
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#define PWM_CAPTURE_DBC_STEP6 (0x06UL)
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#define PWM_CAPTURE_DBC_STEP7 (0x07UL)
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#define PWM_CAPTURE_DBC_STEP8 (0x08UL)
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#define PWM_CAPTURE_DBC_STEP9 (0x09UL)
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#define PWM_CAPTURE_DBC_STEP10 (0x0AUL)
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#define PWM_CAPTURE_DBC_STEP11 (0x0BUL)
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#define PWM_CAPTURE_DBC_STEP12 (0x0CUL)
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#define PWM_CAPTURE_SIG_SEL_PWM_CAPTURE0 (0x00UL)
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#define PWM_CAPTURE_SIG_SEL_PWM_CAPTURE1 (0x01UL)
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#define PWM_CAPTURE_SIG_SEL_PWM_CAPTURE2 (0x02UL)
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#define PWM_CAPTURE_SIG_SEL_PWM_BRK0 (0x03UL)
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#define PWM_CAPTURE_SIG_SEL_PWM_BRK1 (0x04UL)
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#define PWM_CAPTURE_SIG_SEL_PWM_BRK2 (0x05UL)
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#define PWM_CAPTURE_CLK_DIV_VAL_0 (0x00UL)
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#define PWM_CAPTURE_CLK_DIV_VAL_2 (0x01UL)
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#define PWM_CAPTURE_CLK_DIV_VAL_3 (0x02UL)
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#define PWM_CAPTURE_CLK_DIV_VAL_4 (0x03UL)
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#define PWM_CAPTURE_CLK_DIV_VAL_5 (0x04UL)
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#define PWM_CAPTURE_CLK_DIV_VAL_6 (0x05UL)
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#define PWM_CAPTURE_CLK_DIV_VAL_7 (0x06UL)
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#define PWM_CAPTURE_CLK_DIV_VAL_8 (0x07UL)
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#define PWM_CAPTURE_CLK_DIV_VAL_9 (0x08UL)
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#define PWM_CAPTURE_CLK_DIV_VAL_10 (0x09UL)
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#define PWM_CAPTURE_CLK_DIV_VAL_11 (0x0AUL)
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#define PWM_CAPTURE_CLK_DIV_VAL_12 (0x0BUL)
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#define PWM_CAPTURE_CLK_DIV_VAL_13 (0x0CUL)
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#define PWM_CAPTURE_ENABLE (0x01UL)
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#define PWM_CAPTURE_DISABLE (0x00UL)
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#define PWM_CAPTURE_DBC_ENABLE (0x01UL)
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#define PWM_CAPTURE_DBC_DISABLE (0x00UL)
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#define PWM_CAPTURE_COMMON_CNT_ENABLE (0x01UL)
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#define PWM_CAPTURE_COMMON_CNT_DISABLE (0x00UL)
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#define PWM_CAPTURE_UPD_EN_ENABLE (0x01UL)
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#define PWM_CAPTURE_UPD_EN_DISABLE (0x00UL)
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#define PWM_SIGNAL_CAPTURE0_GPIO3 GPIO_3
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#define PWM_SIGNAL_CAPTURE1_GPIO8 GPIO_8
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#define PWM_SIGNAL_CAPTURE2_GPIO9 GPIO_9
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#define PWM_SIGNAL_BRK0_GPIO4 GPIO_4
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#define PWM_SIGNAL_BRK1_GPIO5 GPIO_5
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#define PWM_SIGNAL_BRK2_GPIO6 GPIO_6
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#define PWM_IC_CH0 0
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#define PWM_IC_CH1 1
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#define PWM_IC_CH2 2
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#define PWM_BRK_SYNC_VALID 1
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#define PWM_BRK_SYNC_INVALID 0
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#define PWM_BRK0_HIGH_LEVEL PWM_BRK0_INV_DISABLE
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#define PWM_BRK0_LOW_LEVEL PWM_BRK0_INV_ENABLE
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#define PWM_BRK1_HIGH_LEVEL PWM_BRK1_INV_DISABLE
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#define PWM_BRK1_LOW_LEVEL PWM_BRK1_INV_ENABLE
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#define PWM_BRK2_HIGH_LEVEL PWM_BRK2_INV_DISABLE
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#define PWM_BRK2_LOW_LEVEL PWM_BRK2_INV_ENABLE
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#define PWM_ICSIG_CAPTURE0 PWM_CAPTURE_SIG_SEL_PWM_CAPTURE0
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#define PWM_ICSIG_CAPTURE1 PWM_CAPTURE_SIG_SEL_PWM_CAPTURE1
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#define PWM_ICSIG_CAPTURE2 PWM_CAPTURE_SIG_SEL_PWM_CAPTURE2
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#define PWM_ALL_ENABLE PWM_EN_ALL_ENABLE
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#define PWM_ALL_DISABLE PWM_EN_ALL_DISABLE
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#define PWM_SLEEP_COUNT_DIRECTION_UP (0x01UL)
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#define PWM_SLEEP_COUNT_DIRECTION_DOWN (0x00UL)
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#define PWM_SLEEP_ENABLE PWM_SLEEP_EN_ENABLE
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#define PWM_SLEEP_DISABLE PWM_SLEEP_EN_DISABLE
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#define PWM_EN_SEL_SELF (0x00UL)
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#define PWM_EN_SEL_ALL (0x01UL)
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#define PWM_BRK_MODE_HARDWARE (0x00UL)
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#define PWM_BRK_MODE_SOFTWARE (0x01UL)
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#define PWM_TIMER_MODE_USER_DEFINED (0x01UL)
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#define PWM_TIMER_MODE_FREE_RUNNING (0x00UL)
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/*------------------------------------------------------------------------------------
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TypeDef
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-------------------------------------------------------------------------------------*/
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typedef enum
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{
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PWM_CLK_SRC_32M_DIV = 0, /*PWM CLK SRC 32MHz div.*/
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PWM_CLK_SRC_32K_DIV = 1, /*PWM CLK SRC 32kHz div.*/
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PWM_CLK_SRC_32K = 4, /*PWM CLK SRC 32kHz.*/
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} PWM_ClkSrc_TypeDef;
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typedef enum
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{
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PWM_CLK_DIV0 = 0UL, /*PWM CLK 16 MHz or 16KHz*/
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PWM_CLK_DIV1 = 1UL, /*PWM CLK 8 MHz or 8KHz*/
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PWM_CLK_DIV3 = 3UL, /*PWM CLK 4 MHz or 4KHz.*/
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PWM_CLK_DIV7 = 7UL, /*PWM CLK 2 MHz or 2KHz.*/
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PWM_CLK_DIV15 = 15UL, /*PWM CLK 1 MHz or 1KHz.*/
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PWM_CLK_DIV31 = 31UL, /*PWM CLK 500 kHz or 500Hz.*/
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PWM_CLK_DIV63 = 63UL, /*PWM CLK 250 kHz or 250Hz.*/
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PWM_CLK_DIV127 = 127UL, /*PWM CLK 125 kHz or 125Hz.*/
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PWM_CLK_DIV255 = 255UL, /*PWM CLK 62500 Hz or 62.5Hz.*/
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} PWM_ClkDiv_TypeDef;
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typedef enum pwm_timer_number
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{
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PWM_NO_TIMER = 0x00,
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PWM_TIMER_1 = 0x01,
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PWM_TIMER_2 = 0x02,
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PWM_TIMER_3 = 0x04,
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PWM_TIMER_4 = 0x08,
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PWM_TIMER_5 = 0x10,
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PWM_TIMER_6 = 0x20,
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PWM_ALL_TIMER = 0x3F,
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} ePWM_Timer_Num;
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typedef struct
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{
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PWM_ClkSrc_TypeDef SrcClk;
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uint8_t Mode;
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uint32_t DutyCycleAcc;
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uint32_t DutyCycle;
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uint8_t SrcEnable;
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uint8_t Period;
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uint8_t DivClk;
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uint8_t OutputPin;
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uint8_t OutputInvertPin;
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uint8_t InvertDelay;
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bool InvertEnable;
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} PWM_InitCfg_t;
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typedef struct
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{
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PWM_ClkSrc_TypeDef src_clk;
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PWM_ClkDiv_TypeDef clk_div;
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uint8_t timer_0to100_pwm_en;
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uint8_t timer_pwm_en;
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uint8_t timer_int_mask_en;
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uint8_t timer_mode; /* 0x0 FREE_RUNNING; 0x1 USER_DEFINED */
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} PWM_Timer_InitCfg_t;
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/*------------------------------------------------------------------------------------
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Global Variables
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-------------------------------------------------------------------------------------*/
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typedef uint8_t (*pwm_handler_callback)(void *context);
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/*------------------------------------------------------------------------------------
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Exported Functions
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-------------------------------------------------------------------------------------*/
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void xc_pwm_init(uint8_t reg_idx, PWM_InitCfg_t *pwm_cfg);
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void xc_pwm_start(uint8_t reg_idx);
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void xc_pwm_stop(uint8_t reg_idx);
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void xc_pwm_start_all(void);
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void xc_pwm_stop_all(void);
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void pwm_pin_set(uint8_t reg_idx, PWM_InitCfg_t *pwm_cfg);
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void xc_pwm_dutycycle_set(uint8_t reg_idx, uint8_t mode, uint32_t dutycycle_acc, uint32_t dutycycle);
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void xc_pwm_lowpower_enable(uint8_t reg_idx);
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void xc_pwm_lowpower_disable(uint8_t reg_idx);
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void xc_pwm_lowpower_countdirection_set(uint8_t reg_idx, uint32_t direction);
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void xc_pwm_brake_enable(uint8_t reg_idx);
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void xc_pwm_brake_disable(uint8_t reg_idx);
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uint8_t xc_pwm_brake_signal_valid_get(void);
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void xc_pwm_brake_signal_mask_set(uint32_t mask);
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void xc_pwm_brake_signal_trigger_level_set(uint32_t invert);
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void xc_pwm_brake_recovery_mode_set(uint32_t mode);
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uint8_t xc_pwm_brake_recovery_mode_get(void);
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void xc_pwm_brake_debounce_set(uint32_t debounce, uint32_t step);
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void xc_pwm_brake_clear(void);
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void xc_pwm_capture_enable(uint8_t ch);
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void xc_pwm_capture_disable(uint8_t ch);
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void xc_pwm_capture_enable_it(uint8_t ch);
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void xc_pwm_capture_disable_it(uint8_t ch);
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void xc_pwm_capture_signal_set(uint8_t ch, uint32_t signal);
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void xc_pwm_capture_debounce_enable(uint8_t ch, uint32_t step);
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void xc_pwm_capture_debounce_disable(uint8_t ch, uint32_t step);
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void xc_pwm_capture_edge_set(uint8_t ch, uint32_t edge);
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void xc_pwm_capture_psc_set(uint8_t ch, uint32_t psc);
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void xc_pwm_capture_counter_enable(uint8_t ch);
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void xc_pwm_capture_counter_disable(uint8_t ch);
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uint16_t xc_pwm_capture_val_get(uint8_t ch);
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void xc_pwm_timer_init(uint8_t reg_idx, PWM_Timer_InitCfg_t *init_cfg);
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void xc_pwm_timer_deinit(uint8_t reg_idx);
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void xc_pwm_timer_set_freq(uint8_t reg_idx, uint32_t freq);
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void xc_pwm_timer_set_dutycycle(uint8_t reg_idx, double dutycycle);
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void xc_pwm_timer_start(uint8_t reg_idx);
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void xc_pwm_timer_stop(uint8_t reg_idx);
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void xc_pwm_timer_set_high_cnt(uint8_t reg_idx, uint16_t high_cnt);
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void xc_pwm_timer_set_low_cnt(uint8_t reg_idx, uint16_t high_cnt);
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uint8_t pwm_capture_ch0_callback(void *context);
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uint8_t pwm_capture_ch1_callback(void *context);
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uint8_t pwm_capture_ch2_callback(void *context);
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#endif // _XC_DRV_PWM_H_
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