Initial import: PWM32E C/W 100% firmware
This commit is contained in:
@@ -0,0 +1,232 @@
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/*!
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* \file system_it_xinc.c
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*
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* \brief Target system interruption implementation
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*
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* \copyright Revised BSD License, see section \ref LICENSE.
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*
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* \code
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*
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* _ __ _ ________ _
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* | |/ /(_)___ / ____/ /_ (_)___
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* | // / __ \/ / / __ \/ / __ \
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* / |/ / / / / /___/ / / / / /_/ /
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* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
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* /_/
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* (C) 2022-2025 XinChip
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*
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* \endcode
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*
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* \author ( XinChip ) Alex-J
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*
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* \author ( XinChip )
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*/
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/*-----------------------------------------------------------------------------------
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INCLUDE HEADE FILES
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------------------------------------------------------------------------------------*/
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#include "system_it_xinc.h"
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/*------------------------------------------------------------------------------------
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Func Prototype
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-------------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------------
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Functions
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-------------------------------------------------------------------------------------*/
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/**
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****************************************************************************************
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* @brief This function handles NMI exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn */
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DEBUG("%s\n", __func__);
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/* USER CODE END NonMaskableInt_IRQn */
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while (1)
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{
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}
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}
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/**
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****************************************************************************************
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* @brief This function handles Hard Fault exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn */
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DEBUG("%s\n", __func__);
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/* USER CODE END HardFault_IRQn */
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while (1)
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{
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}
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}
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/**
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****************************************************************************************
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* @brief This function handles Memory Manage exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN */
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DEBUG("%s\n", __func__);
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/* USER CODE END */
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while (1)
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{
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}
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}
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/**
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****************************************************************************************
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* @brief This function handles Bus Fault exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN */
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DEBUG("%s\n", __func__);
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/* USER CODE END */
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while (1)
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{
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}
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}
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/**
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****************************************************************************************
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* @brief This function handles Usage Fault exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN */
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DEBUG("%s\n", __func__);
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/* USER CODE END */
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while (1)
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{
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}
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}
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/**
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****************************************************************************************
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* @brief This function handles SVCall exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void SVC_Handler(void)
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{
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/* USER CODE BEGIN SVCall_IRQn */
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DEBUG("%s\n", __func__);
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/* USER CODE END SVCall_IRQn */
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while (1)
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{
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}
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}
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/**
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****************************************************************************************
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* @brief This function handles Debug Monitor exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN */
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DEBUG("%s\n", __func__);
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/* USER CODE END */
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while (1)
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{
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}
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}
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/**
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****************************************************************************************
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* @brief This function handles PendSVC exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void PendSV_Handler(void)
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{
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/* USER CODE BEGIN PendSV_IRQn */
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DEBUG("%s\n", __func__);
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/* USER CODE END PendSV_IRQn */
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while (1)
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{
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}
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}
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/****************************** Hard Fault Handler Functions *******************************/
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/*------------------------------------------------------------------------------------
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Private Functions
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-------------------------------------------------------------------------------------*/
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void HardFault_Handler_c(unsigned int * HardFault_args)
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{
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/*栈帧里面内容：*/
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unsigned int stack_r0; //压栈的 R0
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unsigned int stack_r1; //压栈的 R1
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unsigned int stack_r2; //压栈的 R2
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unsigned int stack_r3; //压栈的 R3
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unsigned int stack_r12; //压栈的 R12
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unsigned int stack_lr; //压栈的 lr
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unsigned int stack_pc; //压栈的 pc
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unsigned int stack_psr; //压栈的 psr
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stack_r0 = ((unsigned int)HardFault_args[0]);
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stack_r1 = ((unsigned int)HardFault_args[1]);
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stack_r2 = ((unsigned int)HardFault_args[2]);
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stack_r3 = ((unsigned int)HardFault_args[3]);
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stack_r12 = ((unsigned int)HardFault_args[4]);
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stack_lr = ((unsigned int)HardFault_args[5]);
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stack_pc = ((unsigned int)HardFault_args[6]);
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stack_psr = ((unsigned int)HardFault_args[7]);
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DEBUG("----%s----\n", __func__);
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DEBUG("R0=%x\n",stack_r0);
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DEBUG("R1=%x\n",stack_r1);
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DEBUG("R2=%x\n",stack_r2);
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DEBUG("R3=%x\n",stack_r3);
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DEBUG("R12=%x\n",stack_r12);
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DEBUG("LR[R14]=%x\n",stack_lr);
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DEBUG("PC[R15]=%x\n",stack_pc);
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DEBUG("PSR=%x\n",stack_psr);
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DEBUG("SCB_SHCSR=%x\n",SCB->SHCSR);
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DEBUG("---------------------------\n");
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while(1);
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}
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/*******************************************************************************************/
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@@ -0,0 +1,58 @@
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/*!
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* \file system_it_xinc.h
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*
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* \brief The header of system_it_xinc.c
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*
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* \copyright Revised BSD License, see section \ref LICENSE.
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*
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* \code
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||||
*
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||||
* _ __ _ ________ _
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||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
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||||
* (C) 2022-2025 XinChip
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||||
*
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||||
* \endcode
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||||
*
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||||
* \author ( XinChip ) Alex-J
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*
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* \author ( XinChip )
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __SYSTEM_IT_XINC_H__
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#define __SYSTEM_IT_XINC_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*-----------------------------------------------------------------------------------
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INCLUDE HEADE FILES
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------------------------------------------------------------------------------------*/
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#include "xc6xxx.h"
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/*------------------------------------------------------------------------------------
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Exported Functions
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-------------------------------------------------------------------------------------*/
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void NMI_Handler( void );
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void HardFault_Handler( void );
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void MemManage_Handler( void );
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void BusFault_Handler( void );
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void UsageFault_Handler( void );
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void SVC_Handler( void );
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void DebugMon_Handler( void );
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void PendSV_Handler( void );
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void HardFault_Handler_c(unsigned int * HardFault_args);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __SYSTEM_IT_XINC_H__ */
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@@ -0,0 +1,114 @@
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/**
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* Initialize the system
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*
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* @param none
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* @return none
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*
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* @brief Setup the microcontroller system
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*
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*/
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/*-----------------------------------------------------------------------------------
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||||
INCLUDE HEADE FILES
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------------------------------------------------------------------------------------*/
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#include <stdio.h>
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#include "xc6xxx.h"
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/*------------------------------------------------------------------------------------
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Macros
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-------------------------------------------------------------------------------------*/
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#define __DEBUG_OUT_PORT 0
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/*------------------------------------------------------------------------------------
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||||
Functions
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||||
-------------------------------------------------------------------------------------*/
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#define VECTOR_NUM 48
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void set_vector(void)
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{
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#if (USE_XIP == 1)
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__disable_irq();
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for (uint32_t i = 0, *Pvector = (uint32_t *)(0x11001000 + 0),
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*_vector_table = (uint32_t *)(0x10000000);
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i < VECTOR_NUM; i++) // copy vertor table
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{
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_vector_table[i] = *Pvector++;
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}
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*((volatile unsigned int *)(0x4000013C)) =
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0x10000001; // inter vertor table remap
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__enable_irq();
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#endif
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}
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||||
static void WDT_ResetInit(void)
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||||
{
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||||
cpr_ctlapbclken_grctl__wdt_pclk_en__setf(ENABLE);
|
||||
|
||||
cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_ENABLE);
|
||||
cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_DISABLE);
|
||||
|
||||
cpr_rstctl_wdtrst_mask_set(
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||||
(WDT_SYS_RSTN_MASK_DISABLE | WDT_M0_RSTN_MASK_ENABLE));
|
||||
|
||||
cpr_lp_ctl__ctl_wdt_tclk_en__setf(ENABLE);
|
||||
wdt_cr__wdt_en__setf(DISABLE);
|
||||
}
|
||||
|
||||
void SystemInit(void)
|
||||
{
|
||||
|
||||
WDT_ResetInit();
|
||||
|
||||
#if (USE_XIP == 1)
|
||||
|
||||
set_vector();
|
||||
#endif
|
||||
}
|
||||
|
||||
__RAM_CODE int sendchar(int c)
|
||||
{
|
||||
unsigned int status;
|
||||
#if (__DEBUG_OUT_PORT == 1)
|
||||
for (;;) {
|
||||
status = (*((volatile unsigned *)(0x40011000 + 0x14)));
|
||||
status &= 0x20;
|
||||
if (status == 0x20)
|
||||
break;
|
||||
}
|
||||
(*((volatile unsigned *)(0x40011000 + 0x00))) = c;
|
||||
return (1);
|
||||
#else
|
||||
for (;;) {
|
||||
status = (*((volatile unsigned *)(0x40010000 + 0x14)));
|
||||
status &= 0x20;
|
||||
if (status == 0x20)
|
||||
break;
|
||||
}
|
||||
(*((volatile unsigned *)(0x40010000 + 0x00))) = c;
|
||||
return (1);
|
||||
#endif
|
||||
}
|
||||
|
||||
struct __FILE
|
||||
{
|
||||
int handle; /* Add whatever you need here */
|
||||
};
|
||||
|
||||
FILE __stdout;
|
||||
__RAM_CODE int fputc(int ch, FILE *f) { return (sendchar(ch)); }
|
||||
|
||||
int ferror(FILE *f)
|
||||
{
|
||||
/* Your implementation of ferror */
|
||||
return EOF;
|
||||
}
|
||||
|
||||
void _ttywrch(int ch) { sendchar(ch); }
|
||||
|
||||
void _sys_exit(int return_code)
|
||||
{
|
||||
label:
|
||||
goto label; /* endless loop */
|
||||
}
|
||||
@@ -0,0 +1,256 @@
|
||||
|
||||
;/*****************************************************************************
|
||||
; * @file: startup_xinc.s
|
||||
; * @purpose: CMSIS Cortex-M0 Core Device Startup File for the
|
||||
; * Device xinc.
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00001000
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
; ToDo: Add here the vectors for the device specific external interrupts handler
|
||||
DCD BLE_Handler ; 0
|
||||
DCD DMA_Handler ; 1
|
||||
DCD CPR_Handler ; 2
|
||||
DCD GPIO_Handler ; 3
|
||||
DCD RTC_Handler ; 4
|
||||
DCD TIMER0_Handler ; 5
|
||||
DCD TIMER1_Handler ; 6
|
||||
DCD TIMER2_Handler ; 7
|
||||
DCD TIMER3_Handler ; 8
|
||||
DCD WDT_Handler ; 9
|
||||
DCD I2C_Handler ; 10
|
||||
DCD UART0_Handler ; 11
|
||||
DCD UART1_Handler ; 12
|
||||
DCD SPI0_Handler ; 13
|
||||
DCD SPI1_Handler ; 14
|
||||
DCD 0 ; 15
|
||||
DCD 0 ; 16
|
||||
DCD GADC_Handler ; 17
|
||||
DCD PWM_Handler ; 18
|
||||
DCD AES_Handler ; 19
|
||||
DCD USB_Handler ; 20
|
||||
DCD AUDIO_Handler ; 21
|
||||
DCD RF24G_Handler ; 22
|
||||
DCD SPI2_Handler ; 23
|
||||
DCD 0 ; 24
|
||||
DCD UART2_Handler ; 25
|
||||
DCD I2S_Handler ; 26
|
||||
DCD AOTIMER0_Handler ; 27
|
||||
DCD AOTIMER1_Handler ; 28
|
||||
DCD CMP_Handler ; 29
|
||||
DCD FMC_Handler ; 30
|
||||
DCD CAN_Handler ; 31
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR r0, =0x4000013C ; remap
|
||||
LDR r1, =0x10000001
|
||||
STR r1, [r0]
|
||||
|
||||
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
IMPORT HardFault_Handler_c ;函数声明
|
||||
movs r0, #4 ;判断主栈指针还是进程栈指针
|
||||
mov r1, lr
|
||||
tst r0, r1
|
||||
beq hf_used_msp ;如果是主栈指针
|
||||
mrs r0, psp ;否则是进程栈指针,把进程栈指针地址付给 R0
|
||||
ldr r1, =HardFault_Handler_c ;跳转到 HardFault 中断程序
|
||||
bx r1
|
||||
hf_used_msp
|
||||
mrs r0, msp ;把主栈指针地址赋给 R0
|
||||
ldr r1, =HardFault_Handler_c
|
||||
bx r1
|
||||
;EXPORT HardFault_Handler [WEAK]
|
||||
;B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
EXPORT BLE_Handler [WEAK]
|
||||
EXPORT DMA_Handler [WEAK]
|
||||
EXPORT CPR_Handler [WEAK]
|
||||
EXPORT GPIO_Handler [WEAK]
|
||||
EXPORT RTC_Handler [WEAK]
|
||||
EXPORT TIMER0_Handler [WEAK]
|
||||
EXPORT TIMER1_Handler [WEAK]
|
||||
EXPORT TIMER2_Handler [WEAK]
|
||||
EXPORT TIMER3_Handler [WEAK]
|
||||
EXPORT WDT_Handler [WEAK]
|
||||
EXPORT I2C_Handler [WEAK]
|
||||
EXPORT UART0_Handler [WEAK]
|
||||
EXPORT UART1_Handler [WEAK]
|
||||
EXPORT SPI0_Handler [WEAK]
|
||||
EXPORT SPI1_Handler [WEAK]
|
||||
;EXPORT KBS_Handler [WEAK]
|
||||
;EXPORT QDEC_Handler [WEAK]
|
||||
EXPORT GADC_Handler [WEAK]
|
||||
EXPORT PWM_Handler [WEAK]
|
||||
EXPORT AES_Handler [WEAK]
|
||||
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
|
||||
EXPORT USB_Handler [WEAK];20
|
||||
EXPORT AUDIO_Handler [WEAK];21
|
||||
EXPORT RF24G_Handler [WEAK];22
|
||||
EXPORT SPI2_Handler [WEAK];23
|
||||
;EXPORT MPU_Handler [WEAK];24
|
||||
EXPORT UART2_Handler [WEAK];25
|
||||
EXPORT I2S_Handler [WEAK];26
|
||||
EXPORT AOTIMER0_Handler [WEAK];27
|
||||
EXPORT AOTIMER1_Handler [WEAK];28
|
||||
EXPORT CMP_Handler [WEAK];29
|
||||
EXPORT FMC_Handler [WEAK];30
|
||||
EXPORT CAN_Handler [WEAK];31
|
||||
|
||||
PendSV_Handler
|
||||
SysTick_Handler
|
||||
BLE_Handler
|
||||
RF24G_Handler
|
||||
DMA_Handler
|
||||
CPR_Handler
|
||||
GPIO_Handler
|
||||
RTC_Handler
|
||||
TIMER0_Handler
|
||||
TIMER1_Handler
|
||||
TIMER2_Handler
|
||||
TIMER3_Handler
|
||||
WDT_Handler
|
||||
I2C_Handler
|
||||
I2S_Handler
|
||||
UART0_Handler
|
||||
UART1_Handler
|
||||
UART2_Handler
|
||||
SPI0_Handler
|
||||
SPI1_Handler
|
||||
SPI2_Handler
|
||||
;KBS_Handler
|
||||
;QDEC_Handler
|
||||
GADC_Handler
|
||||
PWM_Handler
|
||||
AUDIO_Handler
|
||||
;SIM_Handler
|
||||
AES_Handler
|
||||
AOTIMER0_Handler
|
||||
AOTIMER1_Handler
|
||||
CMP_Handler
|
||||
FMC_Handler
|
||||
CAN_Handler
|
||||
USB_Handler
|
||||
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
ALIGN
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, = (Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
END
|
||||
@@ -0,0 +1,66 @@
|
||||
/*!
|
||||
* \file main.h
|
||||
*
|
||||
* \brief The head file of main.c
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MAIN_H__
|
||||
#define __MAIN_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
|
||||
#include "xc6xxx.h"
|
||||
|
||||
#include "pwm.h"
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
TypeDef
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Global Variables
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Exported Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H__ */
|
||||
|
||||
@@ -0,0 +1,109 @@
|
||||
/*!
|
||||
* \file pwm_test.h
|
||||
*
|
||||
* \brief The head file of pwm_test.c
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __PWM_TEST_H__
|
||||
#define __PWM_TEST_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <stdint.h>
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
#define DEVIATION_FREQ 10
|
||||
#define DEVIATION_DUTYCYCLE 10
|
||||
#define CAPTURE_DATA_MAX 101
|
||||
#define CAPTURE_VALID_POS 4
|
||||
/*------------------------------------------------------------------------------------
|
||||
TypeDef
|
||||
-------------------------------------------------------------------------------------*/
|
||||
typedef enum
|
||||
{
|
||||
PWM_CAP_IDLE = 0,
|
||||
PWM_CAP_FREQ,
|
||||
PWM_CAP_DUTYCYCLE,
|
||||
PWM_CAP_RIGHT,
|
||||
PWM_CAP_ERROR,
|
||||
} PWM_CAP_STA_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
PWM_BRK_IDLE = 0,
|
||||
PWM_BRK_START,
|
||||
PWM_BRK_STOP,
|
||||
} PWM_BRK_STA_TypeDef;
|
||||
typedef enum
|
||||
{
|
||||
PWM_BRK_CAP_VALID,
|
||||
PWM_BRK_CAP_RECOVERY,
|
||||
PWM_BRK_CAP_ERROR,
|
||||
} PWM_BRK_CAP_STA_TypeDef;
|
||||
typedef struct pwm_ch_cap_freq
|
||||
{
|
||||
uint16_t ch0_cap_freq;
|
||||
uint16_t ch1_cap_freq;
|
||||
uint16_t ch2_cap_freq;
|
||||
} pwm_ch_cap_freq_t;
|
||||
typedef struct pwm_ch_cap_dutycycle
|
||||
{
|
||||
uint16_t ch0_cap_dutycycle;
|
||||
uint16_t ch1_cap_dutycycle;
|
||||
uint16_t ch2_cap_dutycycle;
|
||||
} pwm_ch_cap_dutycycle_t;
|
||||
typedef struct pwm_ch_cap_type
|
||||
{
|
||||
uint8_t ch0_cap_type;
|
||||
uint8_t ch1_cap_type;
|
||||
uint8_t ch2_cap_type;
|
||||
} pwm_ch_cap_type_t;
|
||||
typedef enum
|
||||
{
|
||||
PWM_CAP_TYPE_FREQ,
|
||||
PWM_CAP_TYPE_DUTYCYCLE,
|
||||
} PWM_CAP_TYPE_TypeDef;
|
||||
/*------------------------------------------------------------------------------------
|
||||
Global Variables
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Exported Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
void pwm_demo(void);
|
||||
uint32_t find_duplicate_data(uint16_t *buff, uint16_t size);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __PWM_TEST_H__ */
|
||||
|
||||
|
||||
@@ -0,0 +1,109 @@
|
||||
/*!
|
||||
* \file main.c
|
||||
*
|
||||
* \brief Target main implementation
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Global Variables
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Func Prototype
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
void clock_init(void)
|
||||
{
|
||||
CLOCK_InitCfg_t clock_cfg;
|
||||
|
||||
clock_cfg.hfclk_src = CLOCK_HFCLK_SRC_XTAL;
|
||||
clock_cfg.hfclk_in = CLOCK_HFCLK_IN_32M;
|
||||
clock_cfg.lfclk_src = CLOCK_LFCLK_SRC_RC;
|
||||
|
||||
if(clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_XTAL) {
|
||||
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32768;
|
||||
} else if(clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_RC) {
|
||||
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32K;
|
||||
}
|
||||
|
||||
xc_clock_init_cfg(&clock_cfg);
|
||||
|
||||
SysTick_Config(xc_clock_hfclk_in_get( ) / 100);
|
||||
SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
|
||||
}
|
||||
|
||||
void app_uart_init(void)
|
||||
{
|
||||
GPIO_InitCfg_t gpio_cfg = {0};
|
||||
|
||||
gpio_cfg.Mux = GPIO_Mux0;
|
||||
gpio_cfg.Pull = GPIO_PULLUP;
|
||||
gpio_cfg.Int = NOT_INT;
|
||||
gpio_cfg.FunSel = UART0_TX;
|
||||
|
||||
gpio_cfg.Pin = GPIO_18;
|
||||
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
gpio_cfg.FunSel = UART0_RX;
|
||||
gpio_cfg.Pin = GPIO_19;
|
||||
gpio_cfg.Dir = GPIO_DIR_INPUT;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
UART_InitCfg_t uart_cfg = {0};
|
||||
|
||||
uart_cfg.Parity = UART_PARITY_DISABLE;
|
||||
uart_cfg.StopBits = UART_STOP_1_BITS;
|
||||
uart_cfg.WordLength = UART_DATA_8_BITS;
|
||||
uart_cfg.BaudRate = UART_BAUDRATE_115200;
|
||||
uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE;
|
||||
|
||||
xc_uart_init(UART0_IDX, &uart_cfg);
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
// Clock Initialization
|
||||
clock_init();
|
||||
app_uart_init();
|
||||
DEBUG("__START__\n");
|
||||
/* pwm demo */
|
||||
pwm_demo( );
|
||||
|
||||
|
||||
while(1)
|
||||
{
|
||||
/* main loop */
|
||||
// DEBUG("111\n");
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,722 @@
|
||||
/*!
|
||||
* \file pwm.c
|
||||
*
|
||||
* \brief Target pwm implementation
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
/*------------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
--------------------------------------------------------------------------------------*/
|
||||
#include "pwm.h"
|
||||
#include "xc_drv_pwm.h"
|
||||
// #include "xc_drv_adc.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Global Variables
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
TypeDef
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Local Variables
|
||||
-------------------------------------------------------------------------------------*/
|
||||
uint16_t ch0_capture_data[CAPTURE_DATA_MAX];
|
||||
uint16_t ch1_capture_data[CAPTURE_DATA_MAX];
|
||||
uint16_t ch2_capture_data[CAPTURE_DATA_MAX];
|
||||
|
||||
PWM_CAP_STA_TypeDef pwm_cap_state = PWM_CAP_IDLE;
|
||||
PWM_BRK_STA_TypeDef pwm_brk_state = PWM_BRK_IDLE;
|
||||
PWM_BRK_CAP_STA_TypeDef pwm_brk_cap_state = PWM_BRK_CAP_VALID;
|
||||
pwm_ch_cap_dutycycle_t pwm_ch_cap_dutycycle;
|
||||
pwm_ch_cap_freq_t pwm_ch_cap_freq;
|
||||
pwm_ch_cap_type_t pwm_ch_cap_type;
|
||||
/*------------------------------------------------------------------------------------
|
||||
Func Prototype
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief pwm_test_demo
|
||||
* @details
|
||||
* @param void
|
||||
* @retval void
|
||||
*/
|
||||
|
||||
void pwm_output_demo()
|
||||
{
|
||||
//DEBUG("ffss\r");
|
||||
// CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2,
|
||||
// PWM_InitCfg_t pwm_cfg;
|
||||
// pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
|
||||
// pwm_cfg.DutyCycleAcc = 266;
|
||||
// pwm_cfg.DutyCycle = 100;
|
||||
// pwm_cfg.Period = 10;
|
||||
// pwm_cfg.InvertDelay = 0x3f;
|
||||
// pwm_cfg.InvertEnable =true;
|
||||
// pwm_cfg.OutputInvertPin = GPIO_2;
|
||||
// pwm_cfg.OutputPin = GPIO_1;
|
||||
// pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
|
||||
// //pwm_cfg.DivClk=4;
|
||||
// pwm_cfg.SrcEnable = PWM_EN_SEL_ALL;
|
||||
// xc_pwm_init(PWM0_IDX, &pwm_cfg);
|
||||
|
||||
|
||||
PWM_InitCfg_t pwm_cfg;
|
||||
pwm_cfg.Mode = 0x03UL;
|
||||
pwm_cfg.DutyCycleAcc = 255;
|
||||
pwm_cfg.DutyCycle = 200;
|
||||
pwm_cfg.Period = 300;
|
||||
pwm_cfg.InvertDelay = 0x3f;
|
||||
pwm_cfg.InvertEnable =true;
|
||||
pwm_cfg.OutputInvertPin = GPIO_2;
|
||||
pwm_cfg.OutputPin = GPIO_1;
|
||||
pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
|
||||
pwm_cfg.SrcEnable = PWM_EN_SEL_ALL;
|
||||
xc_pwm_init(PWM0_IDX, &pwm_cfg);
|
||||
|
||||
|
||||
|
||||
// pwm_cfg.OutputInvertPin = GPIO_7;
|
||||
// pwm_cfg.OutputPin = GPIO_13; // The pin cannot be changed
|
||||
// xc_pwm_init(PWM3_IDX, &pwm_cfg);
|
||||
|
||||
|
||||
|
||||
// pwm_cfg.OutputPin = GPIO_1; // The pin cannot be changed
|
||||
// xc_pwm_init(PWM5_IDX, &pwm_cfg);
|
||||
|
||||
// pwm_cfg.OutputPin = GPIO_0; // The pin cannot be changed
|
||||
// xc_pwm_init(PWM4_IDX, &pwm_cfg);
|
||||
|
||||
// pwm_cfg.OutputPin = GPIO_13; // The pin cannot be changed
|
||||
// xc_pwm_init(PWM5_IDX, &pwm_cfg);
|
||||
xc_pwm_start_all();
|
||||
}
|
||||
|
||||
void pwm_brake_demo()
|
||||
{
|
||||
DEBUG("PWM_BRAKE_DEMO\r");
|
||||
|
||||
|
||||
// PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
|
||||
// CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
|
||||
// EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
|
||||
PWM_InitCfg_t pwm_cfg;
|
||||
pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
|
||||
pwm_cfg.DutyCycleAcc = 60000;
|
||||
pwm_cfg.DutyCycle = 30000;
|
||||
pwm_cfg.Period = 99;
|
||||
pwm_cfg.InvertDelay = 0;
|
||||
pwm_cfg.InvertEnable = false;
|
||||
pwm_cfg.OutputInvertPin = GPIO_2;
|
||||
pwm_cfg.OutputPin = GPIO_1;
|
||||
pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
|
||||
pwm_cfg.SrcEnable = PWM_EN_SEL_SELF;
|
||||
|
||||
xc_pwm_init(PWM0_IDX, &pwm_cfg);
|
||||
xc_pwm_start(PWM0_IDX);
|
||||
|
||||
xc_gpio_fun_sel(PWM_SIGNAL_BRK0_GPIO4, GPIO_Dx);
|
||||
xc_gpio_mux_ctl(PWM_SIGNAL_BRK0_GPIO4, GPIO_Mux1);
|
||||
xc_gpio_pull_config(PWM_SIGNAL_BRK0_GPIO4, GPIO_PULLUP);
|
||||
|
||||
xc_gpio_fun_sel(PWM_SIGNAL_BRK1_GPIO5, GPIO_Dx);
|
||||
xc_gpio_mux_ctl(PWM_SIGNAL_BRK1_GPIO5, GPIO_Mux1);
|
||||
xc_gpio_pull_config(PWM_SIGNAL_BRK1_GPIO5, GPIO_PULLUP);
|
||||
|
||||
xc_gpio_fun_sel(PWM_SIGNAL_BRK2_GPIO6, GPIO_Dx);
|
||||
xc_gpio_mux_ctl(PWM_SIGNAL_BRK2_GPIO6, GPIO_Mux1);
|
||||
|
||||
cpr_opa_ctrl_reg__pdbias__setf(0);
|
||||
xc_gpio_pull_config(PWM_SIGNAL_BRK2_GPIO6, GPIO_PULLUP);
|
||||
|
||||
xc_pwm_brake_enable(PWM0_IDX);
|
||||
xc_pwm_brake_signal_mask_set(PWM_BRK0_MASK_DISABLE | PWM_BRK1_MASK_DISABLE | PWM_BRK2_MASK_DISABLE);
|
||||
xc_pwm_brake_signal_trigger_level_set(PWM_BRK0_LOW_LEVEL | PWM_BRK1_LOW_LEVEL | PWM_BRK2_LOW_LEVEL);
|
||||
xc_pwm_brake_recovery_mode_set(PWM_BRK_MODE_SOFTWARE);
|
||||
xc_pwm_brake_debounce_set(PWM_BRK_DBC_EN_ENABLE, PWM_BRK_DBC_STEP2);
|
||||
|
||||
while (1) {
|
||||
if (xc_pwm_brake_recovery_mode_get() & PWM_BRK_MODE_SOFTWARE) {
|
||||
if ((xc_pwm_brake_signal_valid_get() | PWM_BRK_SYNC_INVALID) == PWM_BRK_SYNC_INVALID) {
|
||||
xc_pwm_brake_clear();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void pwm_capture_demo()
|
||||
{
|
||||
DEBUG("PWM_CAPTURE_DEMO\r");
|
||||
// PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
|
||||
// CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
|
||||
// EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
|
||||
PWM_InitCfg_t pwm_cfg;
|
||||
pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
|
||||
pwm_cfg.DutyCycleAcc = 1000;
|
||||
pwm_cfg.DutyCycle = 700;
|
||||
pwm_cfg.Period = 0;
|
||||
pwm_cfg.InvertDelay = 0;
|
||||
pwm_cfg.InvertEnable = false;
|
||||
pwm_cfg.OutputInvertPin = GPIO_2;
|
||||
pwm_cfg.OutputPin = GPIO_1;
|
||||
pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
|
||||
pwm_cfg.SrcEnable = PWM_EN_SEL_SELF;
|
||||
|
||||
xc_pwm_init(PWM0_IDX, &pwm_cfg);
|
||||
xc_pwm_start(PWM0_IDX);
|
||||
|
||||
// Set capture pin
|
||||
xc_gpio_fun_sel(PWM_SIGNAL_CAPTURE0_GPIO0, GPIO_Dx);
|
||||
xc_gpio_mux_ctl(PWM_SIGNAL_CAPTURE0_GPIO0, GPIO_Mux1);
|
||||
|
||||
xc_gpio_fun_sel(PWM_SIGNAL_CAPTURE1_GPIO8, GPIO_Dx);
|
||||
xc_gpio_mux_ctl(PWM_SIGNAL_CAPTURE1_GPIO8, GPIO_Mux1);
|
||||
|
||||
xc_gpio_fun_sel(PWM_SIGNAL_CAPTURE2_GPIO9, GPIO_Dx);
|
||||
xc_gpio_mux_ctl(PWM_SIGNAL_CAPTURE2_GPIO9, GPIO_Mux1);
|
||||
|
||||
// Set capture freq
|
||||
pwm_ch_cap_freq.ch0_cap_freq = 1000;
|
||||
pwm_ch_cap_freq.ch1_cap_freq = 2000;
|
||||
pwm_ch_cap_freq.ch2_cap_freq = 8000;
|
||||
|
||||
// Set capture duty cycle
|
||||
pwm_ch_cap_dutycycle.ch0_cap_dutycycle = 50;
|
||||
pwm_ch_cap_dutycycle.ch1_cap_dutycycle = 60;
|
||||
pwm_ch_cap_dutycycle.ch2_cap_dutycycle = 70;
|
||||
|
||||
// Set capture type
|
||||
pwm_ch_cap_type.ch0_cap_type = PWM_CAP_TYPE_FREQ;
|
||||
pwm_ch_cap_type.ch1_cap_type = PWM_CAP_TYPE_FREQ;
|
||||
pwm_ch_cap_type.ch2_cap_type = PWM_CAP_TYPE_FREQ;
|
||||
|
||||
// capture ch0 set
|
||||
xc_pwm_capture_counter_enable(PWM_IC_CH0);
|
||||
xc_pwm_capture_psc_set(PWM_IC_CH0, PWM_CAPTURE_PSC_1);
|
||||
if (pwm_ch_cap_type.ch0_cap_type == PWM_CAP_TYPE_FREQ) {
|
||||
xc_pwm_capture_edge_set(PWM_IC_CH0, PWM_CAPTURE_MODE_RISE);
|
||||
} else if (pwm_ch_cap_type.ch0_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
|
||||
xc_pwm_capture_edge_set(PWM_IC_CH0, PWM_CAPTURE_MODE_BOTH);
|
||||
}
|
||||
xc_pwm_capture_debounce_enable(PWM_IC_CH0, PWM_CAPTURE_DBC_STEP1);
|
||||
xc_pwm_capture_signal_set(PWM_IC_CH0, PWM_ICSIG_CAPTURE0);
|
||||
xc_pwm_capture_enable_it(PWM_IC_CH0);
|
||||
xc_pwm_capture_enable(PWM_IC_CH0);
|
||||
|
||||
// capture ch1 set
|
||||
xc_pwm_capture_counter_enable(PWM_IC_CH1);
|
||||
xc_pwm_capture_psc_set(PWM_IC_CH1, PWM_CAPTURE_PSC_1);
|
||||
if (pwm_ch_cap_type.ch1_cap_type == PWM_CAP_TYPE_FREQ) {
|
||||
xc_pwm_capture_edge_set(PWM_IC_CH1, PWM_CAPTURE_MODE_RISE);
|
||||
} else if (pwm_ch_cap_type.ch1_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
|
||||
xc_pwm_capture_edge_set(PWM_IC_CH1, PWM_CAPTURE_MODE_BOTH);
|
||||
}
|
||||
xc_pwm_capture_debounce_enable(PWM_IC_CH1, PWM_CAPTURE_DBC_STEP1);
|
||||
xc_pwm_capture_signal_set(PWM_IC_CH1, PWM_ICSIG_CAPTURE1);
|
||||
xc_pwm_capture_enable_it(PWM_IC_CH1);
|
||||
xc_pwm_capture_enable(PWM_IC_CH1);
|
||||
|
||||
// capture ch2 set
|
||||
xc_pwm_capture_counter_enable(PWM_IC_CH2);
|
||||
xc_pwm_capture_psc_set(PWM_IC_CH2, PWM_CAPTURE_PSC_1);
|
||||
if (pwm_ch_cap_type.ch2_cap_type == PWM_CAP_TYPE_FREQ) {
|
||||
xc_pwm_capture_edge_set(PWM_IC_CH2, PWM_CAPTURE_MODE_RISE);
|
||||
} else if (pwm_ch_cap_type.ch2_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
|
||||
xc_pwm_capture_edge_set(PWM_IC_CH2, PWM_CAPTURE_MODE_BOTH);
|
||||
}
|
||||
xc_pwm_capture_debounce_enable(PWM_IC_CH2, PWM_CAPTURE_DBC_STEP1);
|
||||
xc_pwm_capture_signal_set(PWM_IC_CH2, PWM_ICSIG_CAPTURE2);
|
||||
xc_pwm_capture_enable_it(PWM_IC_CH2);
|
||||
xc_pwm_capture_enable(PWM_IC_CH2);
|
||||
|
||||
NVIC_EnableIRQ(PWM_IRQn);
|
||||
}
|
||||
|
||||
void pwm_enable_adc_demo(void)
|
||||
{
|
||||
DEBUG("PWM_ENABLE_ADC_DEMO\r");
|
||||
ADC_InitCfg_t adc_cfg;
|
||||
uint16_t adc_val, integer, decimal;
|
||||
// pwm 使能后触发 adc中断
|
||||
// PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
|
||||
// CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
|
||||
// EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
|
||||
PWM_InitCfg_t pwm_cfg;
|
||||
pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
|
||||
pwm_cfg.DutyCycleAcc = 60000;
|
||||
pwm_cfg.DutyCycle = 30000;
|
||||
pwm_cfg.Period = 0;
|
||||
pwm_cfg.InvertDelay = 0;
|
||||
pwm_cfg.InvertEnable = false;
|
||||
pwm_cfg.OutputInvertPin = GPIO_2;
|
||||
pwm_cfg.OutputPin = GPIO_1;
|
||||
pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
|
||||
pwm_cfg.SrcEnable = PWM_EN_SEL_SELF;
|
||||
|
||||
xc_pwm_init(PWM0_IDX, &pwm_cfg);
|
||||
xc_pwm_start(PWM0_IDX);
|
||||
|
||||
adc_cfg.Freq = ADC_FREQ_2M;
|
||||
adc_cfg.RefVol = ADC_REF_VOL_3_3V;
|
||||
adc_cfg.SampEdge = ADC_SAMPEDGE_RISE;
|
||||
adc_cfg.ExtDataMode = ADC_EXT_DATA_MODE_32BIT;
|
||||
adc_cfg.ExtEdgeSel = ADC_EXT_EDGE_SEL_EXTERN_RISE;
|
||||
adc_cfg.ExtSampleNum = ADC_EXT_SAMPLE_NUM_8;
|
||||
adc_cfg.ExtTriggerSel = ADC_EXT_TRIGGER_SEL_PWM0;
|
||||
|
||||
xc_adc_init(&adc_cfg);
|
||||
|
||||
adc_chan_ctl__select_chan__setf(ADC_CH4_PIN0);
|
||||
|
||||
xc_adc_channel_gpio_config(ADC_CH4_PIN0);
|
||||
|
||||
xc_adc_fifo_req_len_set(ADC_FIFO_CTL_READ_REQ_THRESH_LEN_8);
|
||||
|
||||
xc_adc_fifo_flush();
|
||||
|
||||
xc_adc_it_set(adc_int_get());
|
||||
|
||||
xc_adc_enable_it(ADC_INT_FIFO_ERROR_INT_SET | ADC_INT_READ_REQ_INT_SET);
|
||||
|
||||
xc_adc_enable();
|
||||
|
||||
NVIC_EnableIRQ(GADC_IRQn);
|
||||
|
||||
while (1) {
|
||||
|
||||
adc_val = xc_adc_it_collectval_get();
|
||||
|
||||
if (adc_cfg.RefVol == ADC_REF_VOL_3_3V) {
|
||||
integer = ((adc_val) * 3.3 * 100) / (1.0 * 4096) / 100;
|
||||
decimal = ((uint32_t)((adc_val * 3.3 * 100) / 4096) % 100);
|
||||
|
||||
DEBUG("3.3v ref adc_vol=%d.%d ,adc_val=%d\n", integer, decimal, adc_val);
|
||||
} else if (adc_cfg.RefVol == ADC_REF_VOL_2_48V) {
|
||||
integer = ((adc_val) * 2.33 * 100) / (1.0 * 4096) / 100;
|
||||
decimal = ((uint32_t)((adc_val * 2.33 * 100) / 4096) % 100);
|
||||
DEBUG("2.33v ref adc_vol=%d.%d ,adc_val=%d\n", integer, decimal, adc_val);
|
||||
}
|
||||
//delay_ms(1000);
|
||||
}
|
||||
}
|
||||
|
||||
void pwm_lowpower_demo(void)
|
||||
{
|
||||
xc_fmc_spi_init_oprt();
|
||||
xc_pwr_gpio_sleep_config();
|
||||
|
||||
DEBUG("PWM_LOWPOWER_DEMO\r");
|
||||
// PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
|
||||
// CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
|
||||
// EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
|
||||
PWM_InitCfg_t pwm_cfg;
|
||||
pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
|
||||
pwm_cfg.DutyCycleAcc = 1000;
|
||||
pwm_cfg.DutyCycle = 500;
|
||||
pwm_cfg.Period = 0;
|
||||
pwm_cfg.InvertDelay = 0;
|
||||
pwm_cfg.InvertEnable = false;
|
||||
pwm_cfg.OutputInvertPin = GPIO_2;
|
||||
pwm_cfg.OutputPin = GPIO_1;
|
||||
pwm_cfg.SrcClk = PWM_CLK_SRC_32K;
|
||||
pwm_cfg.SrcEnable = PWM_EN_SEL_SELF;
|
||||
|
||||
xc_pwm_init(PWM0_IDX, &pwm_cfg);
|
||||
xc_pwm_start(PWM0_IDX);
|
||||
|
||||
xc_pwm_lowpower_enable(PWM0_IDX);
|
||||
xc_pwm_lowpower_countdirection_set(PWM0_IDX, PWM_SLEEP_COUNT_DIRECTION_UP);
|
||||
|
||||
PWR_InitCfg_t pwr_cfg = {0};
|
||||
pwr_cfg.pwr_wake_it_src = GPIO_IRQn_WAKE | RTC_IRQn_WAKE;
|
||||
pwr_cfg.pwr_sleep_mode = LIGHT_SLEEP_MODE; // LIGHT_SLEEP_MODE;//DEEP_SLEEP_MODE;
|
||||
|
||||
// xc_fmc_spi_init_oprt();
|
||||
// xc_pwr_gpio_sleep_config();
|
||||
|
||||
if (pwr_cfg.pwr_sleep_mode == LIGHT_SLEEP_MODE) {
|
||||
xc_pwr_gpio_lightsleep_wake_config(GPIO_4, RIS_EDGE_INT);
|
||||
xc_pwr_gpio_lightsleep_wake_config(GPIO_5, FAIL_EDGE_INT);
|
||||
} else if (pwr_cfg.pwr_sleep_mode == DEEP_SLEEP_MODE) {
|
||||
// PWRKEY Initialization is required after deep sleep wakeup
|
||||
xc_pwr_pwrkey_init();
|
||||
xc_pwr_pwrkey_deepsleep_wake_config(GPIO_4, DEEP_SLEEP_GPIO_WAKE_HIGH_LEVEL);
|
||||
xc_pwr_pwrkey_deepsleep_wake_config(GPIO_5, DEEP_SLEEP_GPIO_WAKE_LOW_LEVEL);
|
||||
}
|
||||
|
||||
xc_pwr_sleep_init(&pwr_cfg);
|
||||
|
||||
while (1) {
|
||||
delay_ms(100);
|
||||
xc_pwr_cpu_sleep_enter();
|
||||
DEBUG("wakeup\n");
|
||||
}
|
||||
}
|
||||
|
||||
void bubble_sort(uint16_t *data, uint8_t len)
|
||||
{
|
||||
for (int i = 0; i < len - 1; i++) {
|
||||
for (int j = 0; j < len - i - 1; j++) {
|
||||
if (data[j] > data[j + 1]) {
|
||||
uint16_t temp = data[j];
|
||||
data[j] = data[j + 1];
|
||||
data[j + 1] = temp;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t find_duplicate_data(uint16_t *buff, uint16_t size)
|
||||
{
|
||||
uint32_t val[CAPTURE_DATA_MAX / 2];
|
||||
uint8_t cnt[CAPTURE_DATA_MAX / 2];
|
||||
uint8_t repeat_cnt = 0;
|
||||
uint32_t found = 0;
|
||||
uint32_t maxRepeatIndex = 0;
|
||||
|
||||
for (int i = 0; i < size; i++) {
|
||||
found = 0;
|
||||
for (int j = 0; j < repeat_cnt; j++) {
|
||||
if (val[j] == buff[i]) {
|
||||
cnt[j]++;
|
||||
found = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!found) {
|
||||
val[repeat_cnt] = buff[i];
|
||||
cnt[repeat_cnt] = 1;
|
||||
repeat_cnt++;
|
||||
}
|
||||
}
|
||||
|
||||
for (int i = 0; i < repeat_cnt; i++) {
|
||||
if (cnt[i] > cnt[maxRepeatIndex]) {
|
||||
maxRepeatIndex = i;
|
||||
}
|
||||
}
|
||||
|
||||
return val[maxRepeatIndex];
|
||||
}
|
||||
|
||||
bool pwm_freq_check(uint32_t cap_freq, uint16_t *data)
|
||||
{
|
||||
uint16_t diff_val[CAPTURE_DATA_MAX - 1];
|
||||
uint32_t val = 0;
|
||||
for (uint8_t i = 0; i < CAPTURE_DATA_MAX - 1; i++) {
|
||||
if(data[i + 1] - data[i] > 0){
|
||||
diff_val[i] = data[i + 1] - data[i];
|
||||
}else{
|
||||
diff_val[i] = data[i + 1] + 65536 - data[i];
|
||||
}
|
||||
}
|
||||
|
||||
bubble_sort(diff_val, CAPTURE_DATA_MAX - 1);
|
||||
|
||||
val = find_duplicate_data(diff_val, CAPTURE_DATA_MAX / 2);
|
||||
if ((val < (16000000 / cap_freq + DEVIATION_FREQ)) && (val > (16000000 / cap_freq - DEVIATION_FREQ))) {
|
||||
DEBUG("freq right\n");
|
||||
return true;
|
||||
} else {
|
||||
DEBUG("freq error\n");
|
||||
return false;
|
||||
}
|
||||
}
|
||||
bool pwm_dutycycle_check(uint16_t duty_cycle, uint16_t *data)
|
||||
{
|
||||
uint16_t diff_val[CAPTURE_DATA_MAX - 1];
|
||||
uint32_t low_level_cnt = 0;
|
||||
uint32_t high_level_cnt = 0;
|
||||
for (uint8_t i = 0; i < CAPTURE_DATA_MAX - 1; i++) {
|
||||
if(data[i + 1] - data[i] > 0){
|
||||
diff_val[i] = data[i + 1] - data[i];
|
||||
}else{
|
||||
diff_val[i] = data[i + 1] + 65536 - data[i];
|
||||
}
|
||||
}
|
||||
bubble_sort(diff_val, CAPTURE_DATA_MAX - 1);
|
||||
low_level_cnt = find_duplicate_data(diff_val, CAPTURE_DATA_MAX / 2);
|
||||
high_level_cnt = find_duplicate_data(diff_val + CAPTURE_DATA_MAX / 2, CAPTURE_DATA_MAX / 2);
|
||||
|
||||
DEBUG("low=%d, high=%d, dutycycle=%d\n", low_level_cnt, high_level_cnt,
|
||||
duty_cycle * (low_level_cnt + high_level_cnt) / 100);
|
||||
|
||||
if ((high_level_cnt <= (duty_cycle * (low_level_cnt + high_level_cnt) / 100 + DEVIATION_DUTYCYCLE)) &&
|
||||
(high_level_cnt >= (duty_cycle * (low_level_cnt + high_level_cnt) / 100 - DEVIATION_DUTYCYCLE))) {
|
||||
DEBUG("duty_cycle right\n");
|
||||
return true;
|
||||
} else {
|
||||
DEBUG("duty_cycle error\n");
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
bool pwm_invert_freq_check(uint32_t freq, uint16_t *data)
|
||||
{
|
||||
uint16_t diff_val[CAPTURE_DATA_MAX - 1];
|
||||
uint32_t val = 0;
|
||||
bubble_sort(data, CAPTURE_DATA_MAX);
|
||||
for (uint8_t i = 0; i < CAPTURE_DATA_MAX - 1; i++) {
|
||||
if(data[i + 1] - data[i] > 0){
|
||||
diff_val[i] = data[i + 1] - data[i];
|
||||
}else{
|
||||
diff_val[i] = data[i + 1] + 65536 - data[i];
|
||||
}
|
||||
}
|
||||
val = find_duplicate_data(diff_val, CAPTURE_DATA_MAX / 2);
|
||||
if ((val < (16000000 / freq + DEVIATION_FREQ)) && (val > (16000000 / freq - DEVIATION_FREQ))) {
|
||||
DEBUG("freq right\n");
|
||||
return true;
|
||||
} else {
|
||||
DEBUG("freq error\n");
|
||||
return false;
|
||||
}
|
||||
}
|
||||
bool pwm_invert_dutycycle_check(uint16_t duty_cycle, uint16_t *data)
|
||||
{
|
||||
uint16_t diff_val[CAPTURE_DATA_MAX - 1];
|
||||
uint32_t low_level_cnt = 0;
|
||||
uint32_t high_level_cnt = 0;
|
||||
bubble_sort(data, CAPTURE_DATA_MAX);
|
||||
for (uint8_t i = 0; i < CAPTURE_DATA_MAX - 1; i++) {
|
||||
if(data[i + 1] - data[i] > 0){
|
||||
diff_val[i] = data[i + 1] - data[i];
|
||||
}else{
|
||||
diff_val[i] = data[i + 1] + 65536 - data[i];
|
||||
}
|
||||
}
|
||||
bubble_sort(diff_val, CAPTURE_DATA_MAX - 1);
|
||||
low_level_cnt = find_duplicate_data(diff_val, CAPTURE_DATA_MAX / 2);
|
||||
low_level_cnt = find_duplicate_data(diff_val + CAPTURE_DATA_MAX / 2, CAPTURE_DATA_MAX / 2);
|
||||
DEBUG("low=%d, high=%d, dutycycle=%d\n", low_level_cnt, high_level_cnt,
|
||||
duty_cycle * (low_level_cnt + high_level_cnt) / 100);
|
||||
if ((high_level_cnt <= (duty_cycle * (low_level_cnt + high_level_cnt) / 100 + DEVIATION_DUTYCYCLE)) &&
|
||||
(high_level_cnt >= (duty_cycle * (low_level_cnt + high_level_cnt) / 100 - DEVIATION_DUTYCYCLE))) {
|
||||
DEBUG("duty_cycle right\n");
|
||||
return true;
|
||||
} else {
|
||||
DEBUG("duty_cycle error\n");
|
||||
return false;
|
||||
}
|
||||
}
|
||||
void pwm_brk_check(void)
|
||||
{
|
||||
if (pwm_brk_state == PWM_BRK_START) {
|
||||
pwm_brk_cap_state = PWM_BRK_CAP_ERROR;
|
||||
} else if (pwm_brk_state == PWM_BRK_STOP) {
|
||||
pwm_brk_cap_state = PWM_BRK_CAP_RECOVERY;
|
||||
}
|
||||
}
|
||||
void dump_capture_invert_data(uint16_t check_data, uint16_t *data)
|
||||
{
|
||||
if (pwm_cap_state == PWM_CAP_FREQ) {
|
||||
if (pwm_invert_freq_check(check_data, data) == true) {
|
||||
pwm_cap_state = PWM_CAP_RIGHT;
|
||||
} else {
|
||||
pwm_cap_state = PWM_CAP_ERROR;
|
||||
}
|
||||
} else if (pwm_cap_state == PWM_CAP_DUTYCYCLE) {
|
||||
if (pwm_invert_dutycycle_check(check_data, data) == true) {
|
||||
pwm_cap_state = PWM_CAP_RIGHT;
|
||||
} else {
|
||||
pwm_cap_state = PWM_CAP_ERROR;
|
||||
}
|
||||
}
|
||||
}
|
||||
void dump_capture_data(uint8_t cap_type, uint16_t check_data, uint16_t *data)
|
||||
{
|
||||
if (cap_type == PWM_CAP_TYPE_FREQ) {
|
||||
if (pwm_freq_check(check_data, data) == true) {
|
||||
pwm_cap_state = PWM_CAP_RIGHT;
|
||||
} else {
|
||||
pwm_cap_state = PWM_CAP_ERROR;
|
||||
}
|
||||
} else if (cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
|
||||
if (pwm_dutycycle_check(check_data, data) == true) {
|
||||
pwm_cap_state = PWM_CAP_RIGHT;
|
||||
} else {
|
||||
pwm_cap_state = PWM_CAP_ERROR;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//捕获中断
|
||||
uint8_t pwm_capture_ch0_callback(void *context)
|
||||
{
|
||||
DEBUG("111");
|
||||
static uint16_t ch0_capture_count = 0;
|
||||
|
||||
uint32_t val = xc_pwm_capture_val_get(PWM_IC_CH0);
|
||||
if (ch0_capture_count < CAPTURE_DATA_MAX) {
|
||||
ch0_capture_data[ch0_capture_count++] = val;
|
||||
}
|
||||
|
||||
if (ch0_capture_count == CAPTURE_DATA_MAX) {
|
||||
DEBUG("ch0=");
|
||||
if (pwm_ch_cap_type.ch0_cap_type == PWM_CAP_TYPE_FREQ) {
|
||||
dump_capture_data(pwm_ch_cap_type.ch0_cap_type, pwm_ch_cap_freq.ch0_cap_freq, ch0_capture_data);
|
||||
} else if (pwm_ch_cap_type.ch0_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
|
||||
dump_capture_data(pwm_ch_cap_type.ch0_cap_type, pwm_ch_cap_dutycycle.ch0_cap_dutycycle, ch0_capture_data);
|
||||
}
|
||||
ch0_capture_count++;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint8_t pwm_capture_ch1_callback(void *context)
|
||||
{
|
||||
static uint16_t ch1_capture_count = 0;
|
||||
uint32_t val = xc_pwm_capture_val_get(PWM_IC_CH1);
|
||||
if (ch1_capture_count < CAPTURE_DATA_MAX) {
|
||||
ch1_capture_data[ch1_capture_count++] = val;
|
||||
}
|
||||
if (ch1_capture_count == CAPTURE_DATA_MAX) {
|
||||
DEBUG("ch1=");
|
||||
if (pwm_ch_cap_type.ch1_cap_type == PWM_CAP_TYPE_FREQ) {
|
||||
dump_capture_data(pwm_ch_cap_type.ch1_cap_type, pwm_ch_cap_freq.ch1_cap_freq, ch1_capture_data);
|
||||
} else if (pwm_ch_cap_type.ch1_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
|
||||
dump_capture_data(pwm_ch_cap_type.ch1_cap_type, pwm_ch_cap_dutycycle.ch1_cap_dutycycle, ch1_capture_data);
|
||||
}
|
||||
pwm_brk_check();
|
||||
ch1_capture_count++;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint8_t pwm_capture_ch2_callback(void *context)
|
||||
{
|
||||
static uint16_t ch2_capture_count = 0;
|
||||
uint32_t val = xc_pwm_capture_val_get(PWM_IC_CH2);
|
||||
if (ch2_capture_count < CAPTURE_DATA_MAX) {
|
||||
ch2_capture_data[ch2_capture_count++] = val;
|
||||
}
|
||||
if (ch2_capture_count == CAPTURE_DATA_MAX) {
|
||||
DEBUG("ch2=");
|
||||
if (pwm_ch_cap_type.ch2_cap_type == PWM_CAP_TYPE_FREQ) {
|
||||
dump_capture_data(pwm_ch_cap_type.ch2_cap_type, pwm_ch_cap_freq.ch2_cap_freq, ch2_capture_data);
|
||||
} else if (pwm_ch_cap_type.ch2_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
|
||||
dump_capture_data(pwm_ch_cap_type.ch2_cap_type, pwm_ch_cap_dutycycle.ch2_cap_dutycycle, ch2_capture_data);
|
||||
}
|
||||
|
||||
ch2_capture_count++;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
*-----------------------------------------------------------------------------------------------
|
||||
* PWM Timer
|
||||
*-----------------------------------------------------------------------------------------------
|
||||
*/
|
||||
void pwm_timer_demo(void)
|
||||
{
|
||||
DEBUG("PWM_TIMER_DEMO\r");
|
||||
|
||||
GPIO_InitCfg_t gpio_cfg = {0};
|
||||
|
||||
gpio_cfg.Mux = GPIO_Mux1;
|
||||
gpio_cfg.Pull = GPIO_PULLUP;
|
||||
gpio_cfg.Int = NOT_INT;
|
||||
gpio_cfg.FunSel = GPIO_Dx;
|
||||
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
|
||||
|
||||
gpio_cfg.Pin = GPIO_29;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
gpio_cfg.Pin = GPIO_30;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
#if (USE_XIP == 0)
|
||||
cpr_rf_reg0__boot_done__setf(1);
|
||||
|
||||
gpio_cfg.Pin = GPIO_35;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
gpio_cfg.Pin = GPIO_36;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
gpio_cfg.Pin = GPIO_37;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
gpio_cfg.Pin = GPIO_38;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
#endif
|
||||
|
||||
PWM_Timer_InitCfg_t pwm_timer_cfg;
|
||||
pwm_timer_cfg.src_clk = PWM_CLK_SRC_32M_DIV;
|
||||
pwm_timer_cfg.clk_div = PWM_CLK_DIV0;
|
||||
pwm_timer_cfg.timer_mode = PWM_TIMER_MODE_USER_DEFINED;
|
||||
pwm_timer_cfg.timer_int_mask_en = DISABLE;
|
||||
pwm_timer_cfg.timer_pwm_en = ENABLE;
|
||||
pwm_timer_cfg.timer_0to100_pwm_en = ENABLE;
|
||||
xc_pwm_timer_init(PWM_TIMER0_IDX, &pwm_timer_cfg);
|
||||
|
||||
// If the duty cycle resolution is one-thousandth, the maximum frequency = xc_clock_hfclk_in_get()/2/1000.
|
||||
xc_pwm_timer_set_freq(PWM_TIMER0_IDX, 16000);
|
||||
xc_pwm_timer_set_dutycycle(PWM_TIMER0_IDX, (double)50.1);
|
||||
|
||||
xc_pwm_timer_start(PWM_TIMER0_IDX);
|
||||
}
|
||||
|
||||
#define PWM_TIMER_DEMO 0
|
||||
#define PWM_OUTPUT_DEMO 0
|
||||
#define PWM_CAPTURE_DEMO 0 //输出捕获
|
||||
#define PWM_BRAKE_DEMO 0
|
||||
#define PWM_ENABLE_ADC_DEMO 1
|
||||
#define PWM_LOWPOWER_DEMO 0
|
||||
|
||||
void pwm_demo()
|
||||
{
|
||||
#if PWM_TIMER_DEMO
|
||||
pwm_timer_demo();
|
||||
#endif
|
||||
|
||||
#if PWM_OUTPUT_DEMO
|
||||
pwm_output_demo();
|
||||
#endif
|
||||
|
||||
#if PWM_CAPTURE_DEMO
|
||||
pwm_capture_demo();
|
||||
#endif
|
||||
|
||||
#if PWM_BRAKE_DEMO
|
||||
pwm_brake_demo();
|
||||
#endif
|
||||
|
||||
#if PWM_ENABLE_ADC_DEMO
|
||||
pwm_enable_adc_demo();
|
||||
#endif
|
||||
|
||||
#if PWM_LOWPOWER_DEMO
|
||||
pwm_lowpower_demo();
|
||||
#endif
|
||||
}
|
||||
@@ -0,0 +1,39 @@
|
||||
[BREAKPOINTS]
|
||||
ForceImpTypeAny = 0
|
||||
ShowInfoWin = 1
|
||||
EnableFlashBP = 2
|
||||
BPDuringExecution = 0
|
||||
[CFI]
|
||||
CFISize = 0x00
|
||||
CFIAddr = 0x00
|
||||
[CPU]
|
||||
MonModeVTableAddr = 0xFFFFFFFF
|
||||
MonModeDebug = 0
|
||||
MaxNumAPs = 0
|
||||
LowPowerHandlingMode = 0
|
||||
OverrideMemMap = 0
|
||||
AllowSimulation = 1
|
||||
ScriptFile=""
|
||||
[FLASH]
|
||||
CacheExcludeSize = 0x00
|
||||
CacheExcludeAddr = 0x00
|
||||
MinNumBytesFlashDL = 0
|
||||
SkipProgOnCRCMatch = 1
|
||||
VerifyDownload = 1
|
||||
AllowCaching = 1
|
||||
EnableFlashDL = 2
|
||||
Override = 0
|
||||
Device="ARM7"
|
||||
[GENERAL]
|
||||
WorkRAMSize = 0x00
|
||||
WorkRAMAddr = 0x00
|
||||
RAMUsageLimit = 0x00
|
||||
[SWO]
|
||||
SWOLogFile=""
|
||||
[MEM]
|
||||
RdOverrideOrMask = 0x00
|
||||
RdOverrideAndMask = 0xFFFFFFFF
|
||||
RdOverrideAddr = 0xFFFFFFFF
|
||||
WrOverrideOrMask = 0x00
|
||||
WrOverrideAndMask = 0xFFFFFFFF
|
||||
WrOverrideAddr = 0xFFFFFFFF
|
||||
@@ -0,0 +1,12 @@
|
||||
|
||||
FUNC void Initialization(void)
|
||||
{
|
||||
SP = _RDWORD(0x10000000);
|
||||
PC = _RDWORD(0x10000004);
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
LOAD %L INCREMENTAL
|
||||
Initialization();
|
||||
@@ -0,0 +1,84 @@
|
||||
|
||||
|
||||
|
||||
FUNC void InitGpio(void)
|
||||
{
|
||||
// Config IOMUX
|
||||
/*
|
||||
gpio_mux_ctl_u(33,1);//d2
|
||||
gpio_mux_ctl_u(34,1);//d3
|
||||
gpio_mux_ctl_u(35,2);//clk
|
||||
gpio_mux_ctl_u(36,2);//cs
|
||||
gpio_mux_ctl_u(37,2);//d0 rx
|
||||
gpio_mux_ctl_u(38,2);//d1 tx
|
||||
*/
|
||||
_WDWORD(0x4000019c, 0x00002A94);
|
||||
}
|
||||
FUNC void InitFlash(void)
|
||||
{
|
||||
|
||||
}
|
||||
FUNC void InitXIP(void)
|
||||
{
|
||||
|
||||
_WDWORD(0x40000104,0x040000);//reset ssi0
|
||||
_WDWORD(0x40000104,0x040004);//reset ssi0
|
||||
_WDWORD(0x40000050,0x110000);//close spi0 mclk
|
||||
_WDWORD(0x40000070,0x1000000);//close spi0 pclk
|
||||
|
||||
|
||||
//config fmc
|
||||
_WDWORD(0x40000270, 0x0503);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x40000270, 0x3503);
|
||||
//config cache
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x52000000, 0x0);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x52000000, 0x21);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
|
||||
|
||||
//config xip spi
|
||||
_WDWORD(0x51000008, 0); //disable spi
|
||||
|
||||
_WDWORD(0x5100002c,0); //close IE
|
||||
_WDWORD(0x51000000,0x1F); //32bit SPI data
|
||||
_WDWORD(0x51000010,0x01); //enable select slave -- SE
|
||||
_WDWORD(0x51000018,0x0); //TXFTL be set 0
|
||||
_WDWORD(0x5100001c,0x0); //RXFTL be set 0
|
||||
|
||||
_WDWORD(0x5100010c, 0x01);//enable select slave
|
||||
_WDWORD(0x51000114, 0xFF);//XIP time out
|
||||
|
||||
_WDWORD(0x51000014, 0x2);//div 2
|
||||
|
||||
//quad
|
||||
// _WDWORD(0x51000108, (2)|(6<<4)|(2<<9)|(1<<22)|(1<<29)|(1<<23)|(0<<24)|(8<<13));
|
||||
// _WDWORD(0x51000100, 0x6b);//quad read cmd
|
||||
// _WDWORD(0x51000104, 0x6b);//quad read cmd
|
||||
|
||||
|
||||
//dual
|
||||
_WDWORD(0x51000108, (1)|(6<<4)|(2<<9)|(1<<22)|(1<<29)|(1<<23)|(0)|(8<<13));
|
||||
_WDWORD(0x51000100, 0x3b);//dual read cmd
|
||||
_WDWORD(0x51000104, 0x3b);//dual read cmd
|
||||
|
||||
|
||||
_WDWORD(0x51000008, 1); //enable spi
|
||||
}
|
||||
|
||||
FUNC void Initialization(void)
|
||||
{
|
||||
InitGpio();
|
||||
InitFlash();
|
||||
InitXIP();
|
||||
SP = _RDWORD(0x11001000);
|
||||
PC = _RDWORD(0x11001004);
|
||||
_WDWORD(0x4000013C, 0x11001001);
|
||||
}
|
||||
LOAD %L INCREMENTAL
|
||||
Initialization();
|
||||
@@ -0,0 +1,131 @@
|
||||
;;;
|
||||
;;;
|
||||
|
||||
|
||||
;;LOAD 0x10000000
|
||||
;;{
|
||||
;;EXE 0x10000000
|
||||
;;{
|
||||
;;startup_xinc.o (RESET, +FIRST)
|
||||
;;* (+RO)
|
||||
|
||||
;;}
|
||||
;;; L2CAP_CODE +0
|
||||
;;; {
|
||||
;;; * (l2cap_code)
|
||||
;;; }
|
||||
;;; GATT_CODE +0
|
||||
;;; {
|
||||
;;; * (gatt_code)
|
||||
;;; }
|
||||
;;; GAP_CODE +0
|
||||
;;; {
|
||||
;;; * (gap_code)
|
||||
;;; }
|
||||
;;; LLC_CODE +0
|
||||
;;; {
|
||||
;;; * (llc_code)
|
||||
;;; }
|
||||
;;; LLD_CODE +0
|
||||
;;; {
|
||||
;;; * (lld_code)
|
||||
;;; }
|
||||
;;;
|
||||
;;; LLM_CODE +0
|
||||
;;; {
|
||||
;;; * (llm_code)
|
||||
;;; }
|
||||
;;; ECC_CODE +0
|
||||
;;; {
|
||||
;;; * (ecc_code)
|
||||
;;; }
|
||||
;;RW +0000
|
||||
;;{
|
||||
;;* (+RW,+ZI)
|
||||
;;}
|
||||
|
||||
;;; KE_CODE +0
|
||||
;;; {
|
||||
;;; *(ke_code)
|
||||
;;;
|
||||
;;; }
|
||||
|
||||
;;; AES_CODE +0
|
||||
;;; {
|
||||
;;; * (aes_code)
|
||||
;;; }
|
||||
;;; CO_CODE +0
|
||||
;;; {
|
||||
;;; * (co_code)
|
||||
;;; }
|
||||
;;;
|
||||
;;; NVDS_CODE +0
|
||||
;;; {
|
||||
;;; * (nvds_code)
|
||||
;;; }
|
||||
;;;
|
||||
;;; SCH_CODE +0
|
||||
;;; {
|
||||
;;; * (sch_code)
|
||||
;;; }
|
||||
;;; LL_CO_CODE +0
|
||||
;;; {
|
||||
;;; * (ll_co_code)
|
||||
;;; }
|
||||
|
||||
;;ScatterAssert(ImageLength(RW) < 1024 * 28)
|
||||
;;;
|
||||
;;;
|
||||
;;; ScatterAssert(ImageLength(KE_CODE) < 100)
|
||||
;;; ScatterAssert(ImageLength(ECC_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(AES_CODE) < 0x10)
|
||||
;;; ScatterAssert(ImageLength(CO_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(NVDS_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(GAP_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(GATT_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(L2CAP_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(SCH_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(LL_CO_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(LLC_CODE) < 0x110)
|
||||
;;; ScatterAssert(ImageLength(LLD_CODE) < 0x1210)
|
||||
;;; ScatterAssert(ImageLength(LLM_CODE) < 0x910)
|
||||
;;; ScatterAssert(ImageLength(EXE)+ ImageLength(RW) + ImageLength(KE_CODE) + ImageLength(ECC_CODE) + ImageLength(AES_CODE)
|
||||
;;; + ImageLength(CO_CODE)+ ImageLength(NVDS_CODE)+ ImageLength(GAP_CODE)+ ImageLength(GATT_CODE)
|
||||
;;; + ImageLength(L2CAP_CODE)+ ImageLength(SCH_CODE)+ ImageLength(LL_CO_CODE)+ ImageLength(LLC_CODE)
|
||||
;;; + ImageLength(LLD_CODE)+ ImageLength(LLM_CODE)< 96*1024)
|
||||
;;}
|
||||
|
||||
LOAD 0x10000000
|
||||
{
|
||||
EXE 0x10000000
|
||||
{
|
||||
startup_xinc.o (RESET, +FIRST)
|
||||
* (+RO)
|
||||
|
||||
}
|
||||
|
||||
RW +0000
|
||||
{
|
||||
* (+RW,+ZI)
|
||||
}
|
||||
|
||||
ScatterAssert(ImageLength(RW) < 1024 * 28)
|
||||
}
|
||||
|
||||
|
||||
|
||||
;LOAD 0x11001000
|
||||
;{
|
||||
;EXE 0x11001000
|
||||
;{
|
||||
;startup_xinc.o (RESET, +FIRST)
|
||||
;* (+RO)
|
||||
|
||||
;}
|
||||
|
||||
;RW 0x10002000
|
||||
;{
|
||||
;* (+RW,+ZI)
|
||||
;*(ram_code)
|
||||
;}
|
||||
;}
|
||||
@@ -0,0 +1,131 @@
|
||||
;;;
|
||||
;;;
|
||||
|
||||
|
||||
;;LOAD 0x10000000
|
||||
;;{
|
||||
;;EXE 0x10000000
|
||||
;;{
|
||||
;;startup_xinc.o (RESET, +FIRST)
|
||||
;;* (+RO)
|
||||
|
||||
;;}
|
||||
;;; L2CAP_CODE +0
|
||||
;;; {
|
||||
;;; * (l2cap_code)
|
||||
;;; }
|
||||
;;; GATT_CODE +0
|
||||
;;; {
|
||||
;;; * (gatt_code)
|
||||
;;; }
|
||||
;;; GAP_CODE +0
|
||||
;;; {
|
||||
;;; * (gap_code)
|
||||
;;; }
|
||||
;;; LLC_CODE +0
|
||||
;;; {
|
||||
;;; * (llc_code)
|
||||
;;; }
|
||||
;;; LLD_CODE +0
|
||||
;;; {
|
||||
;;; * (lld_code)
|
||||
;;; }
|
||||
;;;
|
||||
;;; LLM_CODE +0
|
||||
;;; {
|
||||
;;; * (llm_code)
|
||||
;;; }
|
||||
;;; ECC_CODE +0
|
||||
;;; {
|
||||
;;; * (ecc_code)
|
||||
;;; }
|
||||
;;RW +0000
|
||||
;;{
|
||||
;;* (+RW,+ZI)
|
||||
;;}
|
||||
|
||||
;;; KE_CODE +0
|
||||
;;; {
|
||||
;;; *(ke_code)
|
||||
;;;
|
||||
;;; }
|
||||
|
||||
;;; AES_CODE +0
|
||||
;;; {
|
||||
;;; * (aes_code)
|
||||
;;; }
|
||||
;;; CO_CODE +0
|
||||
;;; {
|
||||
;;; * (co_code)
|
||||
;;; }
|
||||
;;;
|
||||
;;; NVDS_CODE +0
|
||||
;;; {
|
||||
;;; * (nvds_code)
|
||||
;;; }
|
||||
;;;
|
||||
;;; SCH_CODE +0
|
||||
;;; {
|
||||
;;; * (sch_code)
|
||||
;;; }
|
||||
;;; LL_CO_CODE +0
|
||||
;;; {
|
||||
;;; * (ll_co_code)
|
||||
;;; }
|
||||
|
||||
;;ScatterAssert(ImageLength(RW) < 1024 * 28)
|
||||
;;;
|
||||
;;;
|
||||
;;; ScatterAssert(ImageLength(KE_CODE) < 100)
|
||||
;;; ScatterAssert(ImageLength(ECC_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(AES_CODE) < 0x10)
|
||||
;;; ScatterAssert(ImageLength(CO_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(NVDS_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(GAP_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(GATT_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(L2CAP_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(SCH_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(LL_CO_CODE) < 0x100)
|
||||
;;; ScatterAssert(ImageLength(LLC_CODE) < 0x110)
|
||||
;;; ScatterAssert(ImageLength(LLD_CODE) < 0x1210)
|
||||
;;; ScatterAssert(ImageLength(LLM_CODE) < 0x910)
|
||||
;;; ScatterAssert(ImageLength(EXE)+ ImageLength(RW) + ImageLength(KE_CODE) + ImageLength(ECC_CODE) + ImageLength(AES_CODE)
|
||||
;;; + ImageLength(CO_CODE)+ ImageLength(NVDS_CODE)+ ImageLength(GAP_CODE)+ ImageLength(GATT_CODE)
|
||||
;;; + ImageLength(L2CAP_CODE)+ ImageLength(SCH_CODE)+ ImageLength(LL_CO_CODE)+ ImageLength(LLC_CODE)
|
||||
;;; + ImageLength(LLD_CODE)+ ImageLength(LLM_CODE)< 96*1024)
|
||||
;;}
|
||||
|
||||
;LOAD 0x10000000
|
||||
;{
|
||||
;EXE 0x10000000
|
||||
;{
|
||||
;startup_xinc.o (RESET, +FIRST)
|
||||
;* (+RO)
|
||||
|
||||
;}
|
||||
|
||||
;RW +0000
|
||||
;{
|
||||
;* (+RW,+ZI)
|
||||
;}
|
||||
|
||||
;ScatterAssert(ImageLength(RW) < 1024 * 28)
|
||||
;}
|
||||
|
||||
|
||||
|
||||
LOAD 0x11001000
|
||||
{
|
||||
EXE 0x11001000
|
||||
{
|
||||
startup_xinc.o (RESET, +FIRST)
|
||||
* (+RO)
|
||||
|
||||
}
|
||||
|
||||
RW 0x10002000
|
||||
{
|
||||
* (+RW,+ZI)
|
||||
*(ram_code)
|
||||
}
|
||||
}
|
||||
Binary file not shown.
Binary file not shown.
@@ -0,0 +1 @@
|
||||
Xincboot_tool.exe 0_ram.bin 1_ram_download.bin 0 0 0 0 1
|
||||
Binary file not shown.
@@ -0,0 +1 @@
|
||||
.\Tools\xinchip_xip_tool.exe .\Output\0_ram.bin .\Output\xip_dual .\Output\periph_Demo_xip_download.bin
|
||||
Binary file not shown.
Binary file not shown.
@@ -0,0 +1,59 @@
|
||||
#!/usr/bin/env python
|
||||
#-*- coding:UTF-8 -*-
|
||||
import socket
|
||||
from select import select
|
||||
import time
|
||||
import os
|
||||
import sys
|
||||
import threading
|
||||
import json
|
||||
import struct
|
||||
import binascii
|
||||
import time
|
||||
import re
|
||||
import fileinput
|
||||
|
||||
|
||||
|
||||
def dump_addr(addr):
|
||||
file_asm = "./Xinc_ble_sdk_asm"
|
||||
cur_func = ""
|
||||
with open(file_asm, 'r') as fd:
|
||||
for line in fd:
|
||||
if re.match(r" \w+", line) != None:
|
||||
cur_func = line.strip()
|
||||
#
|
||||
if re.search("^ 0x", line) != None and re.search(addr, line) != None:
|
||||
print(addr, cur_func)
|
||||
break
|
||||
fd.close()
|
||||
|
||||
if __name__ == "__main__":
|
||||
file_in = "./dump.txt"
|
||||
|
||||
for line in fileinput.input(file_in):
|
||||
# 处理 PC 指针信息
|
||||
if re.search("PC = ", line) != None:
|
||||
pc_addr = line.split("PC = ")[1].split(",")[0]
|
||||
#print(hex(int(pc_addr, 16)))
|
||||
dump_addr(hex(int(pc_addr, 16)))
|
||||
|
||||
# 处理 栈信息
|
||||
if re.search("^[0-9]",line) != None:
|
||||
#print(line)
|
||||
stack = line.split('=')[1].replace('\n', '').split(' ')
|
||||
for addr in stack:
|
||||
if addr == ' ' or re.search("^1", addr) == None:
|
||||
continue
|
||||
#print(addr, hex(int(addr,16)-1))
|
||||
dump_addr(hex(int(addr,16)-1))
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
Binary file not shown.
@@ -0,0 +1,432 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc; *.md</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>pwm_demo</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>0</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>7</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>0</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\UL2CM3.DLL</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Startup</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\CMSIS\core_cm0.h</PathWithFileName>
|
||||
<FilenameWithoutPath>core_cm0.h</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>2</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\Startup\xc60xx\startup_xinc.s</PathWithFileName>
|
||||
<FilenameWithoutPath>startup_xinc.s</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>3</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\Startup\system_xinc.c</PathWithFileName>
|
||||
<FilenameWithoutPath>system_xinc.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
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<tvExp>0</tvExp>
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|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\Startup\system_it_xinc.c</PathWithFileName>
|
||||
<FilenameWithoutPath>system_it_xinc.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
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<GroupName>Application</GroupName>
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<tvExp>1</tvExp>
|
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<tvExpOptDlg>0</tvExpOptDlg>
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<cbSel>0</cbSel>
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<File>
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<GroupNumber>2</GroupNumber>
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<FileNumber>5</FileNumber>
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<FileType>1</FileType>
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<tvExp>0</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\src\main.c</PathWithFileName>
|
||||
<FilenameWithoutPath>main.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
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<GroupName>bsp</GroupName>
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<tvExp>1</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<cbSel>0</cbSel>
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<File>
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<FileNumber>6</FileNumber>
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<FileType>1</FileType>
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<tvExp>0</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<bDave2>0</bDave2>
|
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<PathWithFileName>..\app\src\pwm.c</PathWithFileName>
|
||||
<FilenameWithoutPath>pwm.c</FilenameWithoutPath>
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<RteFlg>0</RteFlg>
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<bShared>0</bShared>
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</File>
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</Group>
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<Group>
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<GroupName>Drivers</GroupName>
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<tvExpOptDlg>0</tvExpOptDlg>
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<File>
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|
||||
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||||
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||||
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|
||||
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|
||||
<RteFlg>0</RteFlg>
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<File>
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<GroupNumber>4</GroupNumber>
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<FileType>1</FileType>
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<tvExp>0</tvExp>
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<bDave2>0</bDave2>
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|
||||
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||||
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||||
<bDave2>0</bDave2>
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||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_sw_i2c.c</PathWithFileName>
|
||||
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<RteFlg>0</RteFlg>
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||||
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|
||||
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|
||||
<RteFlg>0</RteFlg>
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|
||||
<FilenameWithoutPath>xc_drv_timer.c</FilenameWithoutPath>
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||||
<RteFlg>0</RteFlg>
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<File>
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<FileType>1</FileType>
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<bDave2>0</bDave2>
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||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_uart.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_uart.c</FilenameWithoutPath>
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||||
<RteFlg>0</RteFlg>
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</File>
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<FileType>1</FileType>
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||||
<bDave2>0</bDave2>
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||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_adc.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_adc.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
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<bShared>0</bShared>
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</File>
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<File>
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<FileType>1</FileType>
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<tvExp>0</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_fmc_spi.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_fmc_spi.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
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<bShared>0</bShared>
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</File>
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</Group>
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||||
|
||||
</ProjectOpt>
|
||||
@@ -0,0 +1,538 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>pwm_demo</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>ARMCM0</Device>
|
||||
<Vendor>ARM</Vendor>
|
||||
<PackID>ARM.CMSIS.5.9.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack/</PackURL>
|
||||
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:ARMCM0$Device\ARM\SVD\ARMCM0.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\Objects\</OutputDirectory>
|
||||
<OutputName>peripheral</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin --output=.\Output\0_ram.bin !L</UserProg1Name>
|
||||
<UserProg2Name>.\Output\xip_program.bat</UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --text -a -c --output=@L_asm !L</UserProg1Name>
|
||||
<UserProg2Name>.\tools\Xincboot_tool .\Output\0_ram.bin .\Output\1_ram_download.bin</UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>1</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin --output=.\Output\0_ram.bin !L</UserProg1Name>
|
||||
<UserProg2Name>.\Output\xip_program.bat</UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> </SimDllArguments>
|
||||
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM0</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments> </TargetDllArguments>
|
||||
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4096</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M0"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<RvdsCdeCp>0</RvdsCdeCp>
|
||||
<nBranchProt>0</nBranchProt>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>1</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>0</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>0</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>4</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>1</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>3</v6Lang>
|
||||
<v6LangP>3</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls>--gnu --diag_suppress=66</MiscControls>
|
||||
<Define>XC60XX DEBUG_ENABLE USE_XIP=1 DMAC_NVIC_ENABLE=0</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\CMSIS;..\..\..\..\..\component\xc6xx_drivers\Drivers\CMSIS\Device;..\..\..\..\..\component\xc6xx_drivers\Drivers\Startup;..\app\Startup\xc60xx;..\app\api;..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver;..\..\..\..\..\component\xc6xx_drivers\Drivers\CMSIS\Device\xc_m0_register</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<ClangAsOpt>4</ClangAsOpt>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\Linker\cpu_xip.scat</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Startup</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>core_cm0.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\CMSIS\core_cm0.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>startup_xinc.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\app\Startup\xc60xx\startup_xinc.s</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>system_xinc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\Startup\system_xinc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>system_it_xinc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\Startup\system_it_xinc.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Application</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\app\src\main.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>bsp</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>pwm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\app\src\pwm.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Drivers</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>ringbuffer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\ringbuffer.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>xc_drv_aotimer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_aotimer.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>xc_drv_clock.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_clock.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>xc_drv_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>xc_drv_i2c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_i2c.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>xc_drv_pwm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_pwm.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>xc_drv_pwr.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_pwr.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>xc_drv_sw_i2c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_sw_i2c.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>xc_drv_systick.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_systick.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>xc_drv_timer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_timer.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>xc_drv_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_uart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>xc_drv_adc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>xc_drv_fmc_spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_fmc_spi.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components/>
|
||||
<files>
|
||||
<file attr="config" category="linkerScript" condition="ARMCC5" name="Device\ARM\ARMCM0\Source\ARM\ARMCM0_ac5.sct" version="1.0.0">
|
||||
<instance index="0" removed="1">RTE\Device\ARMCM0\ARMCM0_ac5.sct</instance>
|
||||
<component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="1"/>
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
|
||||
<targetInfos/>
|
||||
</file>
|
||||
<file attr="config" category="sourceC" name="Device\ARM\ARMCM0\Source\startup_ARMCM0.c" version="2.0.3">
|
||||
<instance index="0" removed="1">RTE\Device\ARMCM0\startup_ARMCM0.c</instance>
|
||||
<component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="1"/>
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
|
||||
<targetInfos/>
|
||||
</file>
|
||||
<file attr="config" category="sourceC" name="Device\ARM\ARMCM0\Source\system_ARMCM0.c" version="1.0.0">
|
||||
<instance index="0" removed="1">RTE\Device\ARMCM0\system_ARMCM0.c</instance>
|
||||
<component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cvendor="ARM" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="1"/>
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
|
||||
<targetInfos/>
|
||||
</file>
|
||||
</files>
|
||||
</RTE>
|
||||
|
||||
<LayerInfo>
|
||||
<Layers>
|
||||
<Layer>
|
||||
<LayName><Project Info></LayName>
|
||||
<LayTarg>0</LayTarg>
|
||||
<LayPrjMark>1</LayPrjMark>
|
||||
</Layer>
|
||||
</Layers>
|
||||
</LayerInfo>
|
||||
|
||||
</Project>
|
||||
Reference in New Issue
Block a user