V1.0
This commit is contained in:
moyuhai
@@ -0,0 +1,127 @@
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/**
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****************************************************************************************
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*
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* @file flash.h
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*
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* @brief Flash driver interface
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*
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* Copyright (C) RivieraWaves 2009-2015
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*
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*
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****************************************************************************************
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*/
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#ifndef FLASH_H_
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#define FLASH_H_
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#include <stdint.h> // standard integer functions
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/**
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****************************************************************************************
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* @addtogroup FLASH
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* @ingroup DRIVERS
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*
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* @brief Flash memory driver
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*
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* @{
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****************************************************************************************
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*/
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/*
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* DEFINES
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****************************************************************************************
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*/
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///Flash type code used to select the correct erasing and programming algorithm
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#define FLASH_TYPE_UNKNOWN 0
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#define FLASH_TYPE_INTEL_28F320C3 1
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#define FLASH_TYPE_INTEL_28F800C3 2
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#define FLASH_TYPE_NUMONYX_M25P128 3
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///Base address of Flash on system bus
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#define FLASH_BASE_ADDR 0x03000000
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/*
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* FUNCTION DECLARATIONS
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****************************************************************************************
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*/
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/**
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****************************************************************************************
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* @brief Initialize flash driver.
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****************************************************************************************
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*/
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void flash_init(void);
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/**
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****************************************************************************************
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* @brief Identify the flash device.
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*
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* This function is used to read the flash device ID.
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*
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* Note: callback parameter is not used
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*
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* @param[out] id Pointer to id location
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* @param[in] callback Callback for end of identification
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* @return status 0 if operation can start successfully
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****************************************************************************************
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*/
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uint8_t flash_identify(uint8_t* id, void (*callback)(void));
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/**
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****************************************************************************************
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* @brief Erase a flash section.
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*
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* This function is used to erase a part of the flash memory.
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*
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* Note: callback parameter is not used
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*
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* @param[in] flash_type Flash type
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* @param[in] offset Starting offset from the beginning of the flash device
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* @param[in] size Size of the portion of flash to erase
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* @param[in] callback Callback for end of erase
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* @return status 0 if operation can start successfully
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****************************************************************************************
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*/
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uint8_t flash_erase(uint8_t flash_type, uint32_t offset, uint32_t size, void (*callback)(void));
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/**
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****************************************************************************************
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* @brief Write a flash section.
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*
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* This function is used to write a part of the flash memory.
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*
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* Note: callback parameter is not used
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*
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* @param[in] flash_type Flash type
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* @param[in] offset Starting offset from the beginning of the flash device
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* @param[in] length Size of the portion of flash to write
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* @param[in] buffer Pointer on data to write
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* @param[in] callback Callback for end of write
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* @return status 0 if operation can start successfully
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****************************************************************************************
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*/
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uint8_t flash_write(uint8_t flash_type, uint32_t offset, uint32_t length, uint8_t *buffer, void (*callback)(void));
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/**
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****************************************************************************************
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* @brief Read a flash section.
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*
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* This function is used to read a part of the flash memory.
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*
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* Note: callback parameter is not used
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*
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* @param[in] flash_type Flash type
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* @param[in] offset Starting offset from the beginning of the flash device
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* @param[in] length Size of the portion of flash to read
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* @param[out] buffer Pointer on data to read
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* @param[in] callback Callback for end of read
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* @return status 0 if operation can start successfully
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****************************************************************************************
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*/
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uint8_t flash_read(uint8_t flash_type, uint32_t offset, uint32_t length, uint8_t *buffer, void (*callback)(void));
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/// @} FLASH
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#endif // FLASH_H_
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@@ -0,0 +1,166 @@
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/**
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****************************************************************************************
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*
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* @file reg_access.h
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*
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* @brief File implementing the basic primitives for register accesses
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*
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* Copyright (C) RivieraWaves 2009-2015
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*
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*
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****************************************************************************************
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*/
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#ifndef REG_ACCESS_H_
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#define REG_ACCESS_H_
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/**
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****************************************************************************************
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* @addtogroup REG REG_ACCESS
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* @ingroup DRIVERS
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*
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* @brief Basic primitives for register access
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*
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* @{
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****************************************************************************************
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*/
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/*
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* INCLUDE FILES
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****************************************************************************************
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*/
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#include <string.h> // string functions
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#if defined(CFG_EMB)
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#include "co_utils.h"
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#include "em_map.h" // EM Map
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#endif // defined(CFG_EMB)
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/*
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* DEFINES
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****************************************************************************************
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*/
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/*
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* MACROS
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****************************************************************************************
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*/
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/// Macro to read a platform register
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#define REG_PL_RD(addr) (*(volatile uint32_t *)(addr))
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/// Macro to write a platform register
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#define REG_PL_WR(addr, value) (*(volatile uint32_t *)(addr)) = (value)
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/// Macro to read a common ip register
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#define REG_IP_RD(addr) (*(volatile uint32_t *)(addr))
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/// Macro to write a common ip register
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#define REG_IP_WR(addr, value) (*(volatile uint32_t *)(addr)) = (value)
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/// Macro to read a BLE register
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#define REG_BLE_RD(addr) (*(volatile uint32_t *)(addr))
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/// Macro to write a BLE register
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#define REG_BLE_WR(addr, value) (*(volatile uint32_t *)(addr)) = (value)
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/// Macro to read a BLE control structure field (16-bit wide)
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#define EM_BLE_RD(addr) (*(volatile uint16_t *)(addr))
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/// Macro to write a BLE control structure field (16-bit wide)
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#define EM_BLE_WR(addr, value) (*(volatile uint16_t *)(addr)) = (value)
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/// Macro to read a BT register
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#define REG_BT_RD(addr) (*(volatile uint32_t *)(addr))
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/// Macro to write a BT register
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#define REG_BT_WR(addr, value) (*(volatile uint32_t *)(addr)) = (value)
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/// Macro to read a BT control structure field (16-bit wide)
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#define EM_BT_RD(addr) (*(volatile uint16_t *)(addr))
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/// Macro to write a BT control structure field (16-bit wide)
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#define EM_BT_WR(addr, value) (*(volatile uint16_t *)(addr)) = (value)
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/// Macro to read a EM field (16-bit wide)
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#define EM_RD(addr) (*(volatile uint16_t *)(addr))
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/// Macro to write a EM field (16-bit wide)
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#define EM_WR(addr, value) (*(volatile uint16_t *)(addr)) = (value)
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/*
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* FUNCTION DECLARATIONS
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****************************************************************************************
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*/
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#if (defined(CFG_BT) || (defined(CFG_BLE) && defined(CFG_EMB)))
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/// Read bytes from EM
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__INLINE void em_rd(void *sys_addr, uint16_t em_addr, uint16_t len)
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{
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memcpy(sys_addr, (void *)(em_addr + EM_BASE_ADDR), len);
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}
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/// Write bytes to EM
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__INLINE void em_wr(void const *sys_addr, uint16_t em_addr, uint16_t len)
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{
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memcpy((void *)(em_addr + EM_BASE_ADDR), sys_addr, len);
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}
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// copy two exchange memory area
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__INLINE void em_cpy(uint16_t dst_em_addr, uint16_t src_em_addr, uint16_t len)
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{
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memcpy((void *)(dst_em_addr + EM_BASE_ADDR), (void *)(src_em_addr + EM_BASE_ADDR), len);
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}
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/// Fill an EM space with the same value
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__INLINE void em_set(int value, uint16_t em_addr, uint16_t len)
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{
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memset((void *)(em_addr + EM_BASE_ADDR), value, len);
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}
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/// Read 32-bits value from EM
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__INLINE uint32_t em_rd32p(uint16_t em_addr)
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{
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return co_read32p((void *)(em_addr + EM_BASE_ADDR));
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}
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/// Write 32-bits value to EM
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__INLINE void em_wr32p(uint16_t em_addr, uint32_t value)
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{
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co_write32p((void *)(em_addr + EM_BASE_ADDR), value);
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}
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/// Read 24-bits value from EM
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__INLINE uint32_t em_rd24p(uint16_t em_addr)
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{
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return co_read24p((void *)(em_addr + EM_BASE_ADDR));
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}
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/// Write 24-bits value to EM
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__INLINE void em_wr24p(uint16_t em_addr, uint32_t value)
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{
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co_write24p((void *)(em_addr + EM_BASE_ADDR), value);
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}
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/// Read 16-bits value from EM
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__INLINE uint16_t em_rd16p(uint16_t em_addr)
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{
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return co_read16p((void *)(em_addr + EM_BASE_ADDR));
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}
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/// Write 16-bits value to EM
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__INLINE void em_wr16p(uint16_t em_addr, uint16_t value)
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{
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co_write16p((void *)(em_addr + EM_BASE_ADDR), value);
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}
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/// Read 8-bits value from EM
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__INLINE uint8_t em_rd8p(uint16_t em_addr)
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{
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return *((uint8_t *)(em_addr + EM_BASE_ADDR));
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}
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/// Write 8-bits value to EM
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__INLINE void em_wr8p(uint16_t em_addr, uint8_t value)
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{
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*(uint8_t *)(em_addr + EM_BASE_ADDR) = value;
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}
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#endif // (defined(CFG_BT) || (defined(CFG_BLE) && defined(CFG_EMB)))
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/// @} REG
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#endif // REG_ACCESS_H_
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@@ -0,0 +1,534 @@
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/**
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****************************************************************************************
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*
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* @file uart.c
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*
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* @brief UART driver
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*
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* Copyright (C) RivieraWaves 2009-2015
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*
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*
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****************************************************************************************
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*/
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/**
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****************************************************************************************
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* @addtogroup UART
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* @{
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****************************************************************************************
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*/
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/*
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* INCLUDE FILES
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****************************************************************************************
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*/
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#include "arch.h"
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#include "compiler.h"
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#include <stddef.h> // standard definition
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#include <stdint.h>
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// #include "xinc_reg.h"
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#include "reg_access.h"
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// #include "bsp_gpio.h"
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// #include "bsp_uart.h"
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#include "uart.h"
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#include "xc_drv_uart.h"
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#ifndef CFG_ROM
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#include "rwip.h" // SW interface
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#if (PLF_NVDS)
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#include "nvds.h" // NVDS
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#endif // (PLF_NVDS)
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#endif // CFG_ROM
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#include "dbg.h"
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#include <stdio.h>
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#if (BLE_TEST_MODE_SUPPORT)
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/*
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* DEFINES
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*****************************************************************************************
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*/
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// /// Max baudrate supported by this UART (in bps)
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// #define UART_BAUD_MAX 3500000
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// /// Min baudrate supported by this UART (in bps)
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// #define UART_BAUD_MIN 9600
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// /// Duration of 1 byte transfer over UART (10 bits) in us (for 921600 default
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// baudrate) #define UART_CHAR_DURATION 11
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/*
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* ENUMERATION DEFINITIONS
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*****************************************************************************************
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*/
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/*
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* STRUCT DEFINITIONS
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*****************************************************************************************
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*/
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/*
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* GLOBAL VARIABLE DEFINITIONS
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****************************************************************************************
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*/
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/// uart environment structure
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volatile static struct uart_env_tag uart_env;
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volatile static uint8_t uart_rx_done = 0;
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volatile static uint16_t uart_rx_index = 0;
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uint8_t uart_tx_buf[UART_FIFO_MAX_COUNT];
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uint8_t uart_rx_buf[UART_FIFO_MAX_COUNT];
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/*
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* LOCAL FUNCTION DEFINITIONS
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****************************************************************************************
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*/
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/*
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* EXPORTED FUNCTION DEFINITIONS
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****************************************************************************************
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*/
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uint8_t uart_handle = UART1_IDX;
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UART_InitCfg_t uart_cfg = {0};
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void uart_init(void)
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{
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uart_rx_done = 0;
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uart_rx_index = 0;
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// Initialize RX and TX transfer callbacks
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uart_env.rx.callback = NULL;
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uart_env.tx.callback = NULL;
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uart_env.uart_tx_buf = NULL;
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uart_env.uart_rx_buf = NULL;
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uart_env.uart_tx_length = 0;
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uart_env.uart_rx_length = 0;
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uart_env.uart_tx_enable = 0;
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uart_env.uart_rx_enable = 0;
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GPIO_InitCfg_t gpio_cfg = {0};
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gpio_cfg.Mux = GPIO_Mux0;
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gpio_cfg.Pull = GPIO_PULLUP;
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gpio_cfg.Int = NOT_INT;
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gpio_cfg.Pin = GPIO_16; // GPIO_16;
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gpio_cfg.Dir = GPIO_DIR_OUTPUT;
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gpio_cfg.FunSel = UART1_TX;
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xc_gpio_init(&gpio_cfg);
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gpio_cfg.Pin = GPIO_15; // GPIO_15;
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gpio_cfg.Dir = GPIO_DIR_INPUT;
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gpio_cfg.FunSel = UART1_RX;
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xc_gpio_init(&gpio_cfg);
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uart_cfg.Parity = UART_PARITY_DISABLE;
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uart_cfg.StopBits = UART_TCR_STOP_1BITS;
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uart_cfg.WordLength = UART_DATA_8_BITS;
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uart_cfg.BaudRate = UART_BAUDRATE_115200;
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uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE;
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xc_uart_init(uart_handle, &uart_cfg);
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xc_uart_enable_rx_it(uart_handle);
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if (uart_handle == UART0_IDX) {
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NVIC_EnableIRQ(UART0_IRQn);
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} else if (uart_handle == UART1_IDX) {
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NVIC_EnableIRQ(UART1_IRQn);
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}
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|
||||
#if (VIRTUAL_UART_H4TL == 1)
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#if (BLE_APP_PRESENT)
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if (0)
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#endif
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{
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||||
hci_data_init(HCI_DATA_TYPE_CMD | HCI_DATA_TYPE_EVENT);
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host_get_event_cbReg(uart_send);
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}
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||||
#endif
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||||
}
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||||
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||||
void uart_send(void *buff, uint16_t len)
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{
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xc_uart_send_data(uart_handle, buff, len);
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}
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void uart_flow_on(void)
|
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{
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||||
// Configure modem (HW flow control enable)
|
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}
|
||||
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bool uart_flow_off(void)
|
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{
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bool flow_off = true;
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||||
|
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GLOBAL_INT_DISABLE();
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do {
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// Force RTS to 'flow off' via GPIO
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// uart_force_rts_setf(1);
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||||
|
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} while (0);
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GLOBAL_INT_RESTORE();
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return flow_off;
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||||
}
|
||||
|
||||
void uart_finish_transfers(void)
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||||
{
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||||
// Wait TX FIFO empty
|
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// while(!uart_tx_fifo_empty_getf());
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||||
}
|
||||
|
||||
void uart_read(uint8_t *bufptr, uint32_t size,
|
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void (*callback)(void *, uint8_t), void *dummy)
|
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{
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// Sanity check
|
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ASSERT_ERR(bufptr != NULL);
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ASSERT_ERR(size != 0);
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ASSERT_ERR(callback != NULL);
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uart_env.rx.callback = callback;
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uart_env.rx.dummy = dummy;
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uart_env.uart_rx_buf = bufptr;
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uart_env.uart_rx_length = size;
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uart_env.uart_rx_enable = 1;
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||||
|
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// DEBUG("uart_env.rx.callback:%x\r\n",uart_env.rx.callback);
|
||||
// DEBUG("uart_read
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// len:%d,data:%02x,%02x,%02x\r\n",uart_env.uart_rx_length,uart_env.uart_rx_buf[0],uart_env.uart_rx_buf[1],uart_env.uart_rx_buf[2]);
|
||||
}
|
||||
|
||||
void uart_write(uint8_t *bufptr, uint32_t size,
|
||||
void (*callback)(void *, uint8_t), void *dummy)
|
||||
{
|
||||
DEBUG("HCI RSP: ");
|
||||
// Sanity check
|
||||
ASSERT_ERR(bufptr != NULL);
|
||||
ASSERT_ERR(size != 0);
|
||||
ASSERT_ERR(callback != NULL);
|
||||
uart_env.tx.callback = callback;
|
||||
uart_env.tx.dummy = dummy;
|
||||
|
||||
uart_env.uart_tx_buf = bufptr;
|
||||
uart_env.uart_tx_length = size;
|
||||
uart_env.uart_tx_enable = 1;
|
||||
|
||||
for (int i = 0; i < size; i++) {
|
||||
DEBUG("%02x ", *bufptr++);
|
||||
}
|
||||
DEBUG("\r\n");
|
||||
}
|
||||
|
||||
void uart_isr(void) {}
|
||||
#define UART1_BASE 0x40011000
|
||||
#include "Platform.h"
|
||||
#define __write_hw_reg32(reg, val) ((*reg) = (val))
|
||||
#define __read_hw_reg32(reg, val) ((val) = (*reg))
|
||||
#define UART1_RBR ((volatile unsigned *)(UART1_BASE + 0x00))
|
||||
#define UART1_THR ((volatile unsigned *)(UART1_BASE + 0x00))
|
||||
#define UART1_DLL ((volatile unsigned *)(UART1_BASE + 0x00))
|
||||
#define UART1_IER ((volatile unsigned *)(UART1_BASE + 0x04))
|
||||
#define UART1_DLH ((volatile unsigned *)(UART1_BASE + 0x04))
|
||||
#define UART1_IIR ((volatile unsigned *)(UART1_BASE + 0x08))
|
||||
#define UART1_FCR ((volatile unsigned *)(UART1_BASE + 0x08))
|
||||
#define UART1_TCR ((volatile unsigned *)(UART1_BASE + 0x0c))
|
||||
#define UART1_MCR ((volatile unsigned *)(UART1_BASE + 0x10))
|
||||
#define UART1_TSR ((volatile unsigned *)(UART1_BASE + 0x14))
|
||||
#define UART1_MSR ((volatile unsigned *)(UART1_BASE + 0x18))
|
||||
#define UART1_USR ((volatile unsigned *)(UART1_BASE + 0x7c))
|
||||
|
||||
void uart_hci_handler(void)
|
||||
{
|
||||
// DEBUG("UART1_Handler\r\n");
|
||||
uint32_t iir = 0;
|
||||
uint32_t tsr;
|
||||
uint8_t data = 0;
|
||||
|
||||
__read_hw_reg32(UART1_IIR, iir);
|
||||
|
||||
// DEBUG("iWK:%x\r\n",iWK);
|
||||
iir &= 0x0F;
|
||||
|
||||
if ((iir != 0x04) && (iir != 0x0c))
|
||||
return;
|
||||
|
||||
if ((iir & 0x04) == 0x04) {
|
||||
__read_hw_reg32(UART1_TSR, tsr);
|
||||
while ((tsr & 0x01) == 0x01) {
|
||||
|
||||
__read_hw_reg32(UART1_RBR, data);
|
||||
uart_rx_buf[uart_rx_index++] = data;
|
||||
if (uart_rx_index == UART_FIFO_MAX_COUNT) {
|
||||
uart_rx_index = 0;
|
||||
}
|
||||
|
||||
__read_hw_reg32(UART1_TSR, tsr);
|
||||
}
|
||||
}
|
||||
|
||||
if ((iir & 0x0c) == 0x0c) {
|
||||
__read_hw_reg32(UART1_TSR, tsr);
|
||||
while ((tsr & 0x01) == 0x01) {
|
||||
|
||||
__read_hw_reg32(UART1_RBR, data);
|
||||
uart_rx_buf[uart_rx_index++] = data;
|
||||
if (uart_rx_index == UART_FIFO_MAX_COUNT) {
|
||||
uart_rx_index = 0;
|
||||
}
|
||||
|
||||
__read_hw_reg32(UART1_TSR, tsr);
|
||||
}
|
||||
host_send_cmd(uart_rx_buf, uart_rx_index);
|
||||
uart_rx_index = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void timeout_check()
|
||||
{
|
||||
static uint16_t count = 0;
|
||||
if (uart_rx_index != 0) {
|
||||
if (count++ > 3000) {
|
||||
host_send_cmd(uart_rx_buf, uart_rx_index);
|
||||
uart_rx_index = 0;
|
||||
count = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
void uart_rx_cmd_respone(uint8_t *buff, uint8_t len)
|
||||
{
|
||||
uint8_t rsp_buff[32];
|
||||
|
||||
rsp_buff[0] = 0x04;
|
||||
rsp_buff[1] = 0x0e;
|
||||
rsp_buff[2] = 0x04 + len;
|
||||
rsp_buff[3] = 0x01;
|
||||
rsp_buff[4] = 0xe0;
|
||||
rsp_buff[5] = 0xfc;
|
||||
rsp_buff[6] = len;
|
||||
|
||||
memcpy(&rsp_buff[7], buff, len);
|
||||
|
||||
uart_send(rsp_buff, 7 + len);
|
||||
}
|
||||
|
||||
void uart_rx_cmd_handler(uint8_t *buff, uint8_t len) {}
|
||||
|
||||
void uart_rx_handler(uint8_t value)
|
||||
{
|
||||
static uint8_t cmd_status = UART_CMD_STATE_HEAD;
|
||||
static uint16_t index = 0;
|
||||
static uint16_t length;
|
||||
static uint8_t uart_cmd[32];
|
||||
|
||||
switch (cmd_status) {
|
||||
case UART_CMD_STATE_HEAD: {
|
||||
if (value == 0x01) {
|
||||
cmd_status = UART_CMD_STATE_OPCODE_ONE;
|
||||
} else {
|
||||
cmd_status = UART_CMD_STATE_HEAD;
|
||||
}
|
||||
} break;
|
||||
|
||||
case UART_CMD_STATE_OPCODE_ONE: {
|
||||
if (value == 0xe0) {
|
||||
cmd_status = UART_CMD_STATE_OPCODE_TWO;
|
||||
} else {
|
||||
cmd_status = UART_CMD_STATE_HEAD;
|
||||
}
|
||||
} break;
|
||||
|
||||
case UART_CMD_STATE_OPCODE_TWO: {
|
||||
if (value == 0xfc) {
|
||||
cmd_status = UART_CMD_STATE_LENGTH;
|
||||
} else {
|
||||
cmd_status = UART_CMD_STATE_HEAD;
|
||||
}
|
||||
} break;
|
||||
|
||||
case UART_CMD_STATE_LENGTH: {
|
||||
length = value;
|
||||
if (length > 0) {
|
||||
cmd_status = UART_CMD_STATE_CMD;
|
||||
index = 0;
|
||||
} else {
|
||||
cmd_status = UART_CMD_STATE_HEAD;
|
||||
}
|
||||
} break;
|
||||
|
||||
case UART_CMD_STATE_CMD: {
|
||||
uart_cmd[index++] = value;
|
||||
|
||||
if (index == length) {
|
||||
uart_rx_cmd_handler(uart_cmd, length);
|
||||
cmd_status = UART_CMD_STATE_HEAD;
|
||||
}
|
||||
} break;
|
||||
}
|
||||
}
|
||||
|
||||
#if (VIRTUAL_UART_H4TL == 1)
|
||||
|
||||
volatile struct hci_cmd_event_data host_cmd_data;
|
||||
volatile struct hci_cmd_event_data host_event_data;
|
||||
|
||||
void hci_data_init(uint8_t type)
|
||||
{
|
||||
// DEBUG("hci_data_init:%x\r\n",type);
|
||||
if (type & HCI_DATA_TYPE_CMD) {
|
||||
host_cmd_data.callback = NULL;
|
||||
memset((void *)&host_cmd_data.data_buff[0], 0, HCI_DATA_BUF_SIZE);
|
||||
host_cmd_data.data_len = 0;
|
||||
}
|
||||
|
||||
if (type & HCI_DATA_TYPE_EVENT) {
|
||||
// host_event_data.callback = NULL;
|
||||
memset((void *)&host_event_data.data_buff[0], 0, HCI_DATA_BUF_SIZE);
|
||||
host_event_data.data_len = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void host_send_cmd(uint8_t *bufptr, uint16_t length)
|
||||
{
|
||||
host_cmd_data.callback = NULL; // Test Only
|
||||
memcpy((void *)&host_cmd_data.data_buff[0], bufptr, length);
|
||||
host_cmd_data.data_len = length;
|
||||
|
||||
DEBUG("HCI SEND: ");
|
||||
for (int i = 0; i < length; i++) {
|
||||
|
||||
DEBUG("%02x ", host_cmd_data.data_buff[i]);
|
||||
}
|
||||
DEBUG("\r\n");
|
||||
}
|
||||
|
||||
void host_get_event(void)
|
||||
{
|
||||
if (host_event_data.callback != NULL) {
|
||||
host_event_data.callback((void *)host_event_data.data_buff,
|
||||
host_event_data.data_len);
|
||||
}
|
||||
hci_data_init(HCI_DATA_TYPE_EVENT);
|
||||
}
|
||||
|
||||
void host_get_event_cbReg(void (*callback)(void *, uint16_t))
|
||||
{
|
||||
host_event_data.callback = callback;
|
||||
}
|
||||
|
||||
void uart_h4tl_data_switch(void)
|
||||
{
|
||||
void (*callback)(void *, uint8_t) = NULL;
|
||||
void *data = NULL;
|
||||
uint16_t data_len = 0;
|
||||
|
||||
if (uart_env.uart_tx_enable || uart_env.uart_rx_enable) {
|
||||
// DEBUG("uart_h4tl_data_switch:%d,%d\r\n",uart_env.uart_tx_enable,uart_env.uart_rx_enable);
|
||||
}
|
||||
|
||||
while (uart_env.uart_tx_enable == 1) {
|
||||
callback = uart_env.tx.callback;
|
||||
data = uart_env.tx.dummy;
|
||||
|
||||
uart_env.uart_tx_enable = 0;
|
||||
memcpy((void *)&host_event_data.data_buff[data_len],
|
||||
uart_env.uart_tx_buf, uart_env.uart_tx_length);
|
||||
data_len += uart_env.uart_tx_length;
|
||||
host_event_data.data_len += uart_env.uart_tx_length;
|
||||
if (callback != NULL) {
|
||||
uart_env.tx.callback = NULL;
|
||||
uart_env.tx.dummy = NULL;
|
||||
|
||||
callback(data, RWIP_EIF_STATUS_OK);
|
||||
} else {
|
||||
}
|
||||
}
|
||||
|
||||
if (host_event_data.data_len != 0) {
|
||||
host_get_event();
|
||||
}
|
||||
|
||||
data_len = 0;
|
||||
|
||||
if (host_cmd_data.data_len > 0) {
|
||||
while (uart_env.uart_rx_enable == 1) {
|
||||
callback = uart_env.rx.callback;
|
||||
data = uart_env.rx.dummy;
|
||||
uart_env.uart_rx_enable = 0;
|
||||
|
||||
memcpy((void *)uart_env.uart_rx_buf,
|
||||
(void *)&host_cmd_data.data_buff[data_len],
|
||||
uart_env.uart_rx_length);
|
||||
|
||||
data_len += uart_env.uart_rx_length;
|
||||
|
||||
// DEBUG("data_len:%d,uart_rx_length:%d\r\n",data_len,uart_env.uart_rx_length);
|
||||
|
||||
// DEBUG("callback:%x\r\n",callback);
|
||||
if (callback != NULL) {
|
||||
uart_env.rx.callback = NULL;
|
||||
uart_env.rx.dummy = NULL;
|
||||
|
||||
callback(data, RWIP_EIF_STATUS_OK);
|
||||
} else {
|
||||
}
|
||||
// DEBUG("data_len:%d,host_cmd_data.data_len:%d\r\n",data_len,host_cmd_data.data_len);
|
||||
if (data_len >= host_cmd_data.data_len) {
|
||||
// hci_data_init(HCI_DATA_TYPE_CMD);
|
||||
break;
|
||||
}
|
||||
}
|
||||
hci_data_init(HCI_DATA_TYPE_CMD);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
// Creation of uart external interface api
|
||||
const struct rwip_eif_api uart_api = {
|
||||
uart_read,
|
||||
uart_write,
|
||||
uart_flow_on,
|
||||
uart_flow_off,
|
||||
};
|
||||
|
||||
// static bool test_mode = false;
|
||||
static bool test_mode = true;
|
||||
|
||||
bool get_test_mode(void) { return test_mode; }
|
||||
|
||||
void enter_test_mode(void)
|
||||
{
|
||||
DEBUG("enter_test_mode \n");
|
||||
/// rf_test_pin_init();
|
||||
uart_init();
|
||||
NVIC_SetPriority((IRQn_Type)UART1_IRQn, 2);
|
||||
h4tl_init(0, rwip_eif_get(0));
|
||||
while (1) {
|
||||
// schedule all pending events
|
||||
rwip_schedule();
|
||||
#if (VIRTUAL_UART_H4TL == 1)
|
||||
uart_h4tl_data_switch();
|
||||
timeout_check();
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
const struct rwip_eif_api *rwip_eif_get(uint8_t idx)
|
||||
{
|
||||
const struct rwip_eif_api *ret = NULL;
|
||||
switch (idx) {
|
||||
case 0: {
|
||||
ret = &uart_api;
|
||||
} break;
|
||||
default: {
|
||||
ASSERT_INFO(0, idx, 0);
|
||||
} break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
#endif // (BLE_TEST_MODE_SUPPORT)
|
||||
|
||||
/// @} UART
|
||||
@@ -0,0 +1,207 @@
|
||||
/**
|
||||
****************************************************************************************
|
||||
*
|
||||
* @file uart.h
|
||||
*
|
||||
* @brief UART Driver for HCI over UART operation.
|
||||
*
|
||||
* Copyright (C) RivieraWaves 2009-2015
|
||||
*
|
||||
*
|
||||
****************************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _UART_H_
|
||||
#define _UART_H_
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @defgroup UART UART
|
||||
* @ingroup DRIVERS
|
||||
* @brief UART driver
|
||||
*
|
||||
* @{
|
||||
*
|
||||
****************************************************************************************
|
||||
*/
|
||||
|
||||
/*
|
||||
* INCLUDE FILES
|
||||
****************************************************************************************
|
||||
*/
|
||||
#include <stdbool.h> // standard boolean definitions
|
||||
#include <stdint.h> // standard integer functions
|
||||
|
||||
|
||||
#define VIRTUAL_UART_H4TL 1
|
||||
|
||||
#define UART_FIFO_MAX_COUNT 300
|
||||
/*
|
||||
* ENUMERATION DEFINITIONS
|
||||
*****************************************************************************************
|
||||
*/
|
||||
typedef enum _UART_CMD_STATE
|
||||
{
|
||||
UART_CMD_STATE_HEAD,
|
||||
UART_CMD_STATE_OPCODE_ONE,
|
||||
UART_CMD_STATE_OPCODE_TWO,
|
||||
UART_CMD_STATE_LENGTH,
|
||||
UART_CMD_STATE_CMD,
|
||||
UART_CMD_STATE_CMD_FLASH,
|
||||
UART_CMD_STATE_LENGTH_FLASH_LEN0,
|
||||
UART_CMD_STATE_LENGTH_FLASH_LEN1,
|
||||
UART_CMD_STATE_LENGTH_FLASH_SCMD,
|
||||
UART_CMD_STATE_PAYLOAD,
|
||||
UART_CMD_STATE_ERROR_ONE,
|
||||
UART_CMD_STATE_ERROR_TWO,
|
||||
UART_CMD_STATE_ERROR_THREE,
|
||||
UART_CMD_STATE_ERROR_FOUR,
|
||||
UART_CMD_STATE_PACKET,
|
||||
|
||||
}UART_CMD_STATE;
|
||||
|
||||
#if (VIRTUAL_UART_H4TL == 1)
|
||||
|
||||
#define HCI_DATA_BUF_SIZE 300
|
||||
#define HCI_DATA_TYPE_CMD 0x01
|
||||
#define HCI_DATA_TYPE_EVENT 0x02
|
||||
|
||||
struct hci_cmd_event_data
|
||||
{
|
||||
// call back function pointer
|
||||
void (*callback)(void*,uint16_t);
|
||||
//Dumy data pointer
|
||||
uint8_t data_buff[HCI_DATA_BUF_SIZE];
|
||||
uint32_t data_len;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/* TX and RX channel class holding data used for asynchronous read and write data
|
||||
* transactions
|
||||
*/
|
||||
|
||||
/// UART TX RX Channel
|
||||
struct uart_txrxchannel
|
||||
{
|
||||
uint32_t size;
|
||||
uint8_t *bufptr;
|
||||
/// call back function pointer
|
||||
void (*callback) (void*, uint8_t);
|
||||
/// Dummy data pointer returned to callback when operation is over.
|
||||
void* dummy;
|
||||
};
|
||||
|
||||
/// UART environment structure
|
||||
struct uart_env_tag
|
||||
{
|
||||
/// tx channel
|
||||
struct uart_txrxchannel tx;
|
||||
/// rx channel
|
||||
struct uart_txrxchannel rx;
|
||||
/// error detect
|
||||
uint8_t errordetect;
|
||||
/// external wakeup
|
||||
bool ext_wakeup;
|
||||
|
||||
uint8_t *uart_tx_buf;
|
||||
uint8_t *uart_rx_buf;
|
||||
uint32_t uart_tx_length;
|
||||
uint32_t uart_rx_length;
|
||||
uint8_t uart_tx_enable;
|
||||
uint8_t uart_rx_enable;
|
||||
};
|
||||
/*
|
||||
* FUNCTION DECLARATIONS
|
||||
****************************************************************************************
|
||||
*/
|
||||
|
||||
#if (BLE_TEST_MODE_SUPPORT)
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief Initializes the UART to default values.
|
||||
*****************************************************************************************
|
||||
*/
|
||||
void uart_init(void);
|
||||
#endif // (BLE_TEST_MODE_SUPPORT)
|
||||
|
||||
#ifndef CFG_ROM
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief Enable UART flow.
|
||||
*****************************************************************************************
|
||||
*/
|
||||
void uart_flow_on(void);
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief Disable UART flow.
|
||||
*****************************************************************************************
|
||||
*/
|
||||
bool uart_flow_off(void);
|
||||
#endif //CFG_ROM
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief Finish current UART transfers
|
||||
*****************************************************************************************
|
||||
*/
|
||||
void uart_finish_transfers(void);
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief Starts a data reception.
|
||||
*
|
||||
* @param[out] bufptr Pointer to the RX buffer
|
||||
* @param[in] size Size of the expected reception
|
||||
* @param[in] callback Pointer to the function called back when transfer finished
|
||||
* @param[in] dummy Dummy data pointer returned to callback when reception is finished
|
||||
*****************************************************************************************
|
||||
*/
|
||||
void uart_read(uint8_t *bufptr, uint32_t size, void (*callback) (void*, uint8_t), void* dummy);
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief Starts a data transmission.
|
||||
*
|
||||
* @param[in] bufptr Pointer to the TX buffer
|
||||
* @param[in] size Size of the transmission
|
||||
* @param[in] callback Pointer to the function called back when transfer finished
|
||||
* @param[in] dummy Dummy data pointer returned to callback when transmission is finished
|
||||
*****************************************************************************************
|
||||
*/
|
||||
void uart_write(uint8_t *bufptr, uint32_t size, void (*callback) (void*, uint8_t), void* dummy);
|
||||
|
||||
#if defined(CFG_ROM)
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief Poll UART on reception and transmission.
|
||||
*
|
||||
* This function is used to poll UART for reception and transmission.
|
||||
* It is used when IRQ are not used to detect incoming bytes.
|
||||
*****************************************************************************************
|
||||
*/
|
||||
void uart_poll(void);
|
||||
#endif //CFG_ROM
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief Serves the data transfer interrupt requests.
|
||||
*
|
||||
* It clears the requests and executes the appropriate callback function.
|
||||
*****************************************************************************************
|
||||
*/
|
||||
void uart_isr(void);
|
||||
|
||||
void hci_data_init(uint8_t type);
|
||||
void host_get_event_cbReg(void(*callback)(void*,uint16_t));
|
||||
void host_send_cmd(uint8_t *bufptr,uint16_t length);
|
||||
void uart_h4tl_data_switch(void);
|
||||
void uart_send(void *buff,uint16_t len);
|
||||
|
||||
|
||||
|
||||
|
||||
/// @} UART
|
||||
#endif /* _UART_H_ */
|
||||
Reference in New Issue
Block a user