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moyuhai
2026-06-09 16:39:17 +08:00
commit 41a602f89c
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component/xc6xx_drivers/test_case/SPI/spi_flash.c
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/*!
* \file spi_flash.c
*
* \brief Target spi flash implementation
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include "spi_flash.h"
#include "xc6xxx_hal_spi.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
#define FLASH_MAX_SIZE 256 * 1024
#define FLASH_MAX_PAGE_NUM (FLASH_MAX_SIZE / FLASH_PAGE_SIZE)
#define TEST_BASE_ADDR 0x6400
#define TEST_START_PAGE_IDX (TEST_BASE_ADDR / FLASH_PAGE_SIZE)
#define TEST_CYCLE_NUM 4u
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Functions
-------------------------------------------------------------------------------------*/
/**
* @brief spi_flash_demo
* @details
* @param void
* @retval void
*/
void spi_flash_demo(void) {
DEBUG("__SPI_FLASH_DEMO__\r");
SPI_TypeDef *spi_idx = XC_SPI0; // XC_SPI0;//XC_SPI1;//XC_SPI2;
if (spi_idx == XC_SPI1) {
GPIO_InitTypeDef gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux0;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
gpio_cfg.FunSel = SSI1_CLK;
gpio_cfg.Int = NOT_INT;
gpio_cfg.Pull = GPIO_PULLDOWN;
gpio_cfg.Pin = GPIO_14;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_SSN;
gpio_cfg.Pin = GPIO_15;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_TX;
gpio_cfg.Pin = GPIO_16;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_RX;
gpio_cfg.Pin = GPIO_17;
GPIO_Init(&gpio_cfg);
} else if (spi_idx == XC_SPI2) {
GPIO_InitTypeDef gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux2;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Int = NOT_INT;
gpio_cfg.Pull = GPIO_PULLDOWN;
gpio_cfg.Pin = GPIO_14; // clk
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Pin = GPIO_15; // ssn
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Pin = GPIO_16;
GPIO_Init(&gpio_cfg); // mosi
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Pin = GPIO_17;
GPIO_Init(&gpio_cfg); // miso
}
SPI_InitCfg_t spi_cfg = {0};
spi_cfg.Mode = SPI_MODE_MASTER;
spi_cfg.DataSize = SSI_CTRL0_DFS_LEN_8BIT;
spi_cfg.Direction = SSI_CTRL0_TMOD_WR;
spi_cfg.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
spi_cfg.CLKPolarity = SSI_CTRL0_SCPOL_LOW;
spi_cfg.CLKPhase = SPI_CPHA_LEAD;
spi_cfg.FirstBit = SPI_FirstBit_MSB;
xc_spi_init(spi_idx, &spi_cfg);
DEBUG("SPI Start\n");
xc_spi_flash_wake_up(spi_idx);
uint32_t mid = 0;
spi_flash_rdid(spi_idx, (uint8_t *)&mid);
DEBUG("Flash RDID: 0x%08x\n", mid);
uint8_t ruid[16];
spi_flash_read_128bit_uid(spi_idx, ruid);
DEBUG("Flash RUID: ");
for (int i = 0; i < 16; i++) {
PRINT("%02x ", ruid[i]);
}
PRINT("\n");
uint8_t data[FLASH_PAGE_SIZE];
#if 1
uint8_t rd_data[FLASH_PAGE_SIZE];
uint8_t cycle_num = 1;
// xc_spi_flash_erase_sector(spi_idx, 0x3F000);
while (cycle_num <= TEST_CYCLE_NUM) {
DEBUG("---------------- %d Cycle Start ----------------\n", cycle_num);
for (uint16_t n = TEST_START_PAGE_IDX; n < FLASH_MAX_PAGE_NUM; n++) {
memset(data, 0x55, FLASH_PAGE_SIZE);
spi_flash_erase_page(spi_idx, n * FLASH_PAGE_SIZE);
DEBUG("Page 0x%x Erased.\n", n * FLASH_PAGE_SIZE);
xc_spi_flash_write_page(spi_idx, n * FLASH_PAGE_SIZE, data);
DEBUG("Page 0x%x has been Written.\n", n * FLASH_PAGE_SIZE);
xc_spi_flash_read_page(spi_idx, n * FLASH_PAGE_SIZE, rd_data);
DEBUG("Page 0x%x Read: ", n * FLASH_PAGE_SIZE);
for (uint16_t i = 0; i < FLASH_PAGE_SIZE; i++) {
if (rd_data[i] != 0x55)
DEBUG("Err: %02x\n", rd_data[i]);
}
memset(rd_data, 0, FLASH_PAGE_SIZE);
DEBUG("--- Page 0x%x Check Complete ---\n", n * FLASH_PAGE_SIZE);
}
DEBUG("********** Code 0x55 Test End **********\n");
for (uint16_t n = TEST_START_PAGE_IDX; n < FLASH_MAX_PAGE_NUM; n++) {
memset(data, 0xaa, FLASH_PAGE_SIZE);
spi_flash_erase_page(spi_idx, n * FLASH_PAGE_SIZE);
DEBUG("Page 0x%x Erased.\n", n * FLASH_PAGE_SIZE);
xc_spi_flash_write_page(spi_idx, n * FLASH_PAGE_SIZE, data);
DEBUG("Page 0x%x has been Written.\n", n * FLASH_PAGE_SIZE);
xc_spi_flash_read_page(spi_idx, n * FLASH_PAGE_SIZE, rd_data);
DEBUG("Page 0x%x Read: ", n * FLASH_PAGE_SIZE);
for (uint16_t i = 0; i < FLASH_PAGE_SIZE; i++) {
if (rd_data[i] != 0xaa)
DEBUG("Err: %02x\n", rd_data[i]);
}
memset(rd_data, 0, FLASH_PAGE_SIZE);
DEBUG("--- Page 0x%x Check Complete ---\n", n * FLASH_PAGE_SIZE);
}
DEBUG("********** Code 0xAA Test End **********\n");
for (uint16_t n = TEST_START_PAGE_IDX; n < FLASH_MAX_PAGE_NUM; n++) {
memset(data, 0x00, FLASH_PAGE_SIZE);
spi_flash_erase_page(spi_idx, n * FLASH_PAGE_SIZE);
DEBUG("Page 0x%x Erased.\n", n * FLASH_PAGE_SIZE);
xc_spi_flash_write_page(spi_idx, n * FLASH_PAGE_SIZE, data);
DEBUG("Page 0x%x has been Written.\n", n * FLASH_PAGE_SIZE);
xc_spi_flash_read_page(spi_idx, n * FLASH_PAGE_SIZE, rd_data);
DEBUG("Page 0x%x Read: ", n * FLASH_PAGE_SIZE);
for (uint16_t i = 0; i < FLASH_PAGE_SIZE; i++) {
if (rd_data[i] != 0x00)
DEBUG("Err: %02x\n", rd_data[i]);
}
memset(rd_data, 0, FLASH_PAGE_SIZE);
DEBUG("--- Page 0x%x Check Complete ---\n", n * FLASH_PAGE_SIZE);
}
DEBUG("********** Code 0x00 Test End **********\n");
DEBUG("----------------- %d Cycle End -----------------\n", cycle_num);
cycle_num++;
}
#else
xc_spi_flash_erase_sector(spi_idx, 0x3F000);
xc_spi_flash_read_page(spi_idx, 0x3F000, data);
for (uint16_t i = 0; i < FLASH_PAGE_SIZE; i++) {
PRINT("%02x ", data[i]);
}
PRINT("\n");
for (uint16_t i = 0; i < FLASH_PAGE_SIZE; i++) {
data[i] = i;
}
// data[0] = 110;
for (uint8_t i = 0; i < 16; i++) {
xc_spi_flash_write_page(spi_idx, 0x3F000 + i * FLASH_PAGE_SIZE, data);
data[0]++;
}
for (uint8_t i = 0; i < 16; i++) {
memset(data, 0xff, FLASH_PAGE_SIZE);
xc_spi_flash_read_page(spi_idx, 0x3F000 + i * FLASH_PAGE_SIZE, data);
DEBUG("Flash Read finished%d: \n", i);
for (uint16_t i = 0; i < FLASH_PAGE_SIZE; i++) {
PRINT("%02x ", data[i]);
}
PRINT("\n");
}
uint8_t w_buff[716];
memset(w_buff, 0x11, sizeof(w_buff));
spi_write_bytes(spi_idx, 0x3F000 + 57, w_buff, sizeof(w_buff));
DEBUG("Flash Write Any finish\n");
uint8_t r_buff[1024];
spi_flash_read(spi_idx, 0x3F000, r_buff, sizeof(r_buff));
DEBUG("Flash Read Any addr: \n");
for (uint16_t i = 0; i < sizeof(r_buff); i++)
PRINT("%02x ", r_buff[i]);
PRINT("\n");
memset(w_buff, 0x22, sizeof(w_buff));
spi_write_bytes(spi_idx, 0x3F000 + 196, w_buff, 115);
DEBUG("Flash Write Any finish2\n");
spi_flash_read(spi_idx, 0x3F000, r_buff, sizeof(r_buff));
DEBUG("Flash Read Any addr2: \n");
for (uint16_t i = 0; i < sizeof(r_buff); i++)
PRINT("%02x ", r_buff[i]);
PRINT("\n");
#endif
}
/**
* @brief spi_flash_demo
* @details
* @param void
* @retval void
*/
void spi_dma_flash_demo(void) {
DEBUG("__SPI_DMA_FLASH_DEMO__\n");
SPI_TypeDef *spi_idx = XC_SPI0; // XC_SPI0;//XC_SPI1;//XC_SPI2;
if (spi_idx == XC_SPI1) {
GPIO_InitTypeDef gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux0;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
gpio_cfg.FunSel = SSI1_CLK;
gpio_cfg.Int = NOT_INT;
gpio_cfg.Pull = GPIO_PULLDOWN;
gpio_cfg.Pin = GPIO_14;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_SSN;
gpio_cfg.Pin = GPIO_15; // GPIO_15;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_TX;
gpio_cfg.Pin = GPIO_16;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_RX;
gpio_cfg.Pin = GPIO_17;
GPIO_Init(&gpio_cfg);
} else if (spi_idx == XC_SPI2) {
GPIO_InitTypeDef gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux2;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Int = NOT_INT;
gpio_cfg.Pull = GPIO_PULLDOWN;
gpio_cfg.Pin = GPIO_14; // clk
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Pin = GPIO_15; // ssn
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Pin = GPIO_16;
GPIO_Init(&gpio_cfg); // mosi
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Pin = GPIO_17;
GPIO_Init(&gpio_cfg); // miso
}
SPI_InitCfg_t spi_cfg = {0};
spi_cfg.Mode = SPI_MODE_MASTER;
spi_cfg.DataSize = SSI_CTRL0_DFS_LEN_8BIT;
spi_cfg.Direction = SSI_CTRL0_TMOD_WR;
spi_cfg.BaudRatePrescaler =
SPI_BAUDRATEPRESCALER_2; // SPI_BAUDRATEPRESCALER_2;
spi_cfg.CLKPolarity = SSI_CTRL0_SCPOL_LOW;
spi_cfg.CLKPhase = SPI_CPHA_LEAD;
spi_cfg.FirstBit = SPI_FirstBit_MSB;
xc_spi_init(spi_idx, &spi_cfg);
NVIC_EnableIRQ(DMA_IRQn);
SPI_DMA_Flash_WakeUp(spi_idx);
uint32_t mid = 0;
SPI_DMA_Flash_RDID(spi_idx, (uint8_t *)&mid);
// spi_flash_rdid(spi_idx, (uint8_t*)&mid);
DEBUG("Flash RDID: 0x%08x\n", mid);
uint8_t ruid[16];
SPI_DMA_Flash_RUID(spi_idx, ruid);
// spi_flash_read_128bit_uid(spi_idx, ruid);
DEBUG("Flash RUID: ");
for (int i = 0; i < 16; i++) {
PRINT("%02x ", ruid[i]);
}
PRINT("\n");
uint8_t data[FLASH_PAGE_SIZE];
#if 1
// test
uint8_t rd_data[FLASH_PAGE_SIZE];
uint8_t cycle_num = 1;
while (cycle_num <= TEST_CYCLE_NUM) {
DEBUG("---------------- %d Cycle Start ----------------\n", cycle_num);
for (uint16_t n = TEST_START_PAGE_IDX; n < FLASH_MAX_PAGE_NUM; n++) {
memset(data, 0x55, FLASH_PAGE_SIZE);
SPI_DMA_Flash_Erase_Page(spi_idx, n * FLASH_PAGE_SIZE);
DEBUG("Page 0x%x Erased.\n", n * FLASH_PAGE_SIZE);
SPI_DMA_Flash_WritePage(spi_idx, n * FLASH_PAGE_SIZE, data,
FLASH_PAGE_SIZE);
DEBUG("Page 0x%x has been Written.\n", n * FLASH_PAGE_SIZE);
SPI_DMA_Flash_ReadPage(spi_idx, n * FLASH_PAGE_SIZE, rd_data,
FLASH_PAGE_SIZE);
DEBUG("Page 0x%x Read: ", n * FLASH_PAGE_SIZE);
for (uint16_t i = 0; i < FLASH_PAGE_SIZE; i++) {
if (rd_data[i] != 0x55)
DEBUG("Err: %02x\n", rd_data[i]);
}
memset(rd_data, 0, FLASH_PAGE_SIZE);
DEBUG("--- Page 0x%x Check Complete ---\n", n * FLASH_PAGE_SIZE);
}
DEBUG("********** Code 0x55 Test End **********\n");
for (uint16_t n = TEST_START_PAGE_IDX; n < FLASH_MAX_PAGE_NUM; n++) {
memset(data, 0xaa, FLASH_PAGE_SIZE);
SPI_DMA_Flash_Erase_Page(spi_idx, n * FLASH_PAGE_SIZE);
DEBUG("Page 0x%x Erased.\n", n * FLASH_PAGE_SIZE);
SPI_DMA_Flash_WritePage(spi_idx, n * FLASH_PAGE_SIZE, data,
FLASH_PAGE_SIZE);
DEBUG("Page 0x%x has been Written.\n", n * FLASH_PAGE_SIZE);
SPI_DMA_Flash_ReadPage(spi_idx, n * FLASH_PAGE_SIZE, rd_data,
FLASH_PAGE_SIZE);
DEBUG("Page 0x%x Read: ", n * FLASH_PAGE_SIZE);
for (uint16_t i = 0; i < FLASH_PAGE_SIZE; i++) {
if (rd_data[i] != 0xaa)
DEBUG("Err: %02x\n", rd_data[i]);
}
memset(rd_data, 0, FLASH_PAGE_SIZE);
DEBUG("--- Page 0x%x Check Complete ---\n", n * FLASH_PAGE_SIZE);
}
DEBUG("********** Code 0xAA Test End **********\n");
for (uint16_t n = TEST_START_PAGE_IDX; n < FLASH_MAX_PAGE_NUM; n++) {
memset(data, 0x00, FLASH_PAGE_SIZE);
SPI_DMA_Flash_Erase_Page(spi_idx, n * FLASH_PAGE_SIZE);
DEBUG("Page 0x%x Erased.\n", n * FLASH_PAGE_SIZE);
SPI_DMA_Flash_WritePage(spi_idx, n * FLASH_PAGE_SIZE, data,
FLASH_PAGE_SIZE);
DEBUG("Page 0x%x has been Written.\n", n * FLASH_PAGE_SIZE);
SPI_DMA_Flash_ReadPage(spi_idx, n * FLASH_PAGE_SIZE, rd_data,
FLASH_PAGE_SIZE);
DEBUG("Page 0x%x Read: ", n * FLASH_PAGE_SIZE);
for (uint16_t i = 0; i < FLASH_PAGE_SIZE; i++) {
if (rd_data[i] != 0x00)
DEBUG("Err: %02x\n", rd_data[i]);
}
memset(rd_data, 0, FLASH_PAGE_SIZE);
DEBUG("--- Page 0x%x Check Complete ---\n", n * FLASH_PAGE_SIZE);
}
DEBUG("********** Code 0x00 Test End **********\n");
DEBUG("----------------- %d Cycle End -----------------\n", cycle_num);
cycle_num++;
}
#else
SPI_DMA_Flash_Erase_Sector(spi_idx, 0x5000);
SPI_DMA_Flash_ReadPage(spi_idx, 0x5000, data, FLASH_PAGE_SIZE);
for (uint16_t i = 0; i < FLASH_PAGE_SIZE; i++) {
PRINT("%02x ", data[i]);
}
PRINT("\n");
for (uint16_t i = 0; i < FLASH_PAGE_SIZE; i++) {
data[i] = i;
}
// data[0] = 110;
for (uint8_t i = 0; i < 16; i++) {
SPI_DMA_Flash_WritePage(spi_idx, 0x5000 + i * FLASH_PAGE_SIZE, data,
FLASH_PAGE_SIZE);
data[0]++;
}
for (uint8_t i = 0; i < 16; i++) {
memset(data, 0xff, FLASH_PAGE_SIZE);
SPI_DMA_Flash_ReadPage(spi_idx, 0x5000 + i * FLASH_PAGE_SIZE, data,
FLASH_PAGE_SIZE);
DEBUG("Flash Read finished%d: \n", i);
for (uint16_t i = 0; i < FLASH_PAGE_SIZE; i++) {
PRINT("%02x ", data[i]);
}
PRINT("\n");
}
uint8_t w_buff[716];
memset(w_buff, 0x11, sizeof(w_buff));
SPI_DMA_FlashWrite(spi_idx, 0x5000 + 57, w_buff, sizeof(w_buff));
DEBUG("Flash Write Any finish\n");
uint8_t r_buff[1024];
SPI_DMA_FlashRead(spi_idx, 0x5000, r_buff, sizeof(r_buff));
DEBUG("Flash Read Any addr: \n");
for (uint16_t i = 0; i < sizeof(r_buff); i++)
PRINT("%02x ", r_buff[i]);
PRINT("\n");
memset(w_buff, 0x22, sizeof(w_buff));
SPI_DMA_FlashWrite(spi_idx, 0x5000 + 196, w_buff, 115);
DEBUG("Flash Write Any finish2\n");
SPI_DMA_FlashRead(spi_idx, 0x5000, r_buff, sizeof(r_buff));
DEBUG("Flash Read Any addr2: \n");
for (uint16_t i = 0; i < sizeof(r_buff); i++)
PRINT("%02x ", r_buff[i]);
PRINT("\n");
#endif
}
component/xc6xx_drivers/test_case/SPI/spi_flash.h
+63
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/*!
* \file spi_flash.h
*
* \brief The head file of spi_flash.c
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __SPI_FLASH_H__
#define __SPI_FLASH_H__
#ifdef __cplusplus
extern "C" {
#endif
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include <stdint.h>
#include <stdio.h>
#include <string.h>
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
TypeDef
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Exported Functions
-------------------------------------------------------------------------------------*/
void spi_flash_demo(void);
void spi_dma_flash_demo(void);
#ifdef __cplusplus
}
#endif
#endif /* __SPI_FLASH_H__ */
component/xc6xx_drivers/test_case/SPI/spi_master.c
+208
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/*!
* \file spi_master.c
*
* \brief Target spi master device implementation
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include "spi_master.h"
#include "xc6xxx_hal_spi.h"
#include "xc6xxx_hal_spi_dmac.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
#define MS_BUFFER_LEN 64U
#define MS_NODMA_BUFFER_LEN 16U
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
volatile uint8_t m_wr_buff[MS_BUFFER_LEN] = {0};
volatile uint8_t m_rd_buff[MS_BUFFER_LEN] = {0};
/*------------------------------------------------------------------------------------
Functions
-------------------------------------------------------------------------------------*/
/**
****************************************************************************************
* @brief
*
* @param[in]
* @param[in]
* @return[out]
*
****************************************************************************************
*/
void spi_dma_master_demo(void) {
DEBUG("__SPI_DMA_MASTER_DEMO__\n");
GPIO_InitTypeDef gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux0;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
gpio_cfg.FunSel = SSI1_CLK;
gpio_cfg.Int = NOT_INT;
gpio_cfg.Pull = GPIO_PULLDOWN;
gpio_cfg.Pin = GPIO_5; // GPIO_24; //GPIO_14;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_SSN;
gpio_cfg.Pin = GPIO_15; // GPIO_15;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_TX;
gpio_cfg.Pin = GPIO_16;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_RX;
gpio_cfg.Pin = GPIO_17;
GPIO_Init(&gpio_cfg);
SPI_TypeDef *spi_idx = XC_SPI1; // XC_SPI0;//XC_SPI1;
SPI_InitCfg_t spi_cfg = {0};
spi_cfg.Mode = SPI_MODE_MASTER;
spi_cfg.DataSize = SSI_CTRL0_DFS_LEN_8BIT;
spi_cfg.Direction = SSI_CTRL0_TMOD_WR;
spi_cfg.BaudRatePrescaler =
SPI_BAUDRATEPRESCALER_4; // SPI_BAUDRATEPRESCALER_2;
spi_cfg.CLKPolarity = SSI_CTRL0_SCPOL_LOW;
spi_cfg.CLKPhase = SSI_CTRL0_SCPHA_TRAIL;
spi_cfg.FirstBit = SPI_FirstBit_MSB;
xc_spi_init(spi_idx, &spi_cfg);
NVIC_EnableIRQ(DMA_IRQn);
memset((uint8_t *)m_wr_buff, 0x55, sizeof(m_wr_buff));
DEBUG("Write buffer: \n");
for (uint16_t i = 0; i < sizeof(m_wr_buff); i++) {
PRINT("%02x ", m_wr_buff[i]);
}
PRINT("\n");
SPI_DMA_WriteAndReadData(spi_idx, (uint8_t *)m_wr_buff, sizeof(m_wr_buff),
(uint8_t *)m_rd_buff, sizeof(m_rd_buff));
DEBUG("__SPI_READ_END__\n");
for (uint16_t i = 0; i < sizeof(m_rd_buff); i++) {
PRINT("%02x ", m_rd_buff[i]);
}
PRINT("\n");
memset((uint8_t *)m_wr_buff, 0xaa, sizeof(m_wr_buff));
SPI_DMA_WriteAndReadData(spi_idx, (uint8_t *)m_wr_buff, sizeof(m_wr_buff),
(uint8_t *)m_rd_buff, sizeof(m_rd_buff));
DEBUG("__SPI_READ_END2__\n");
for (uint16_t i = 0; i < sizeof(m_rd_buff); i++) {
PRINT("%02x ", m_rd_buff[i]);
}
PRINT("\n");
}
/**
* @brief spi_master_demo
* @details
* @param void
* @retval void
*/
void spi_master_demo(void) {
DEBUG("__SPI_MASTER_DEMO__\r");
SPI_InitCfg_t spi_cfg = {0};
GPIO_InitTypeDef gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux0;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
gpio_cfg.FunSel = SSI1_CLK;
gpio_cfg.Int = NOT_INT;
gpio_cfg.Pull = GPIO_PULLDOWN;
gpio_cfg.Pin = GPIO_5;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_SSN;
gpio_cfg.Pin = GPIO_15;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_TX;
gpio_cfg.Pin = GPIO_16;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_RX;
gpio_cfg.Pin = GPIO_17;
GPIO_Init(&gpio_cfg);
spi_cfg.Mode = SPI_MODE_MASTER;
spi_cfg.DataSize = SSI_CTRL0_DFS_LEN_8BIT;
spi_cfg.Direction = SSI_CTRL0_TMOD_WR;
spi_cfg.BaudRatePrescaler = SSI_BAUD_DIV_8;
spi_cfg.CLKPolarity = SSI_CTRL0_SCPOL_LOW;
spi_cfg.CLKPhase = SSI_CTRL0_SCPHA_TRAIL;
spi_cfg.FirstBit = SPI_FirstBit_MSB;
SPI_TypeDef *spi_handle = XC_SPI1;
xc_spi_init(spi_handle, &spi_cfg);
uint8_t txbuff[MS_NODMA_BUFFER_LEN];
uint8_t rxbuff[MS_NODMA_BUFFER_LEN];
SPI_RXFTL_Set(XC_SPI1, 0x07);
SPI_IE_Enable(XC_SPI1, SSI_IE_RXFIE_ENABLE);
DEBUG("Write buffer: \n");
memset((uint8_t *)txbuff, 0xaa, sizeof(txbuff));
for (int i = 0; i < sizeof(txbuff); i++) {
PRINT("%02x ", txbuff[i]);
}
PRINT("\n");
spi_write_and_read_data(spi_handle, (uint8_t *)txbuff, sizeof(txbuff),
(uint8_t *)rxbuff, sizeof(rxbuff));
DEBUG("Read buffer:\n");
for (int i = 0; i < sizeof(rxbuff); i++) {
PRINT("%02x ", rxbuff[i]);
}
PRINT("\n");
DEBUG("__SPI_END__\n");
DEBUG("Write buffer: \n");
memset((uint8_t *)txbuff, 0x55, sizeof(txbuff));
for (int i = 0; i < sizeof(txbuff); i++) {
PRINT("%02x ", txbuff[i]);
}
PRINT("\n");
spi_write_and_read_data(spi_handle, (uint8_t *)txbuff, sizeof(txbuff),
(uint8_t *)rxbuff, sizeof(rxbuff));
DEBUG("Read buffer:\n");
for (int i = 0; i < sizeof(rxbuff); i++) {
PRINT("%02x ", rxbuff[i]);
}
PRINT("\n");
DEBUG("__SPI_END2__\n");
}
component/xc6xx_drivers/test_case/SPI/spi_master.h
+63
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/*!
* \file spi_master.h
*
* \brief The head file of spi_master.c
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __SPI_MASTER_H__
#define __SPI_MASTER_H__
#ifdef __cplusplus
extern "C" {
#endif
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include <stdint.h>
#include <stdio.h>
#include <string.h>
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
TypeDef
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Exported Functions
-------------------------------------------------------------------------------------*/
void spi_dma_master_demo(void);
void spi_master_demo(void);
#ifdef __cplusplus
}
#endif
#endif /* __SPI_MASTER_H__ */
component/xc6xx_drivers/test_case/SPI/spi_slave.c
+202
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/*!
* \file spi_slave.c
*
* \brief Target spi slave device implementation
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include "spi_slave.h"
#include "xc6xxx_hal_spi.h"
#include "xc6xxx_hal_spi_dmac.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
#define SL_BUFFER_LEN 64U
#define SL_NODMA_BUFFER_LEN 16U
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
volatile uint8_t s_rd_buff[SL_BUFFER_LEN] = {0};
volatile uint8_t s_wr_buff[SL_BUFFER_LEN] = {0};
/*------------------------------------------------------------------------------------
Functions
-------------------------------------------------------------------------------------*/
/**
* @brief spi_dma_slave_demo
* @details
* @param void
* @retval void
*/
void spi_dma_slave_demo(void) {
DEBUG("__SPI_DMA_SLAVE_DEMO__\n");
GPIO_InitTypeDef gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux0;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
gpio_cfg.FunSel = SSI1_CLK;
gpio_cfg.Int = NOT_INT;
gpio_cfg.Pull = GPIO_PULLDOWN;
gpio_cfg.Pin = GPIO_5;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_SSN;
gpio_cfg.Pin = GPIO_15; // GPIO_15;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_TX;
gpio_cfg.Pin = GPIO_16;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_RX;
gpio_cfg.Pin = GPIO_17;
GPIO_Init(&gpio_cfg);
SPI_TypeDef *spi_idx = XC_SPI1; // XC_SPI0;//XC_SPI1;
SPI_InitCfg_t spi_cfg = {0};
spi_cfg.Mode = SPI_MODE_SLAVE;
spi_cfg.DataSize = SSI_CTRL0_DFS_LEN_8BIT;
spi_cfg.Direction = SSI_CTRL0_TMOD_WR;
spi_cfg.BaudRatePrescaler =
SPI_BAUDRATEPRESCALER_2; // SPI_BAUDRATEPRESCALER_2;
spi_cfg.CLKPolarity = SSI_CTRL0_SCPOL_LOW;
spi_cfg.CLKPhase = SSI_CTRL0_SCPHA_TRAIL;
spi_cfg.FirstBit = SPI_FirstBit_MSB;
xc_spi_init(spi_idx, &spi_cfg);
NVIC_EnableIRQ(DMA_IRQn);
DEBUG("Write buffer: \n");
for (uint16_t i = 0; i < sizeof(s_wr_buff); i++) {
s_wr_buff[i] = i;
PRINT("%02x ", s_wr_buff[i]);
}
PRINT("\n");
SPI_DMA_ReadAndWriteData(spi_idx, (uint8_t *)s_wr_buff, sizeof(s_wr_buff),
(uint8_t *)s_rd_buff, sizeof(s_rd_buff));
DEBUG("__SPI_READ_END__\n");
for (uint16_t i = 0; i < sizeof(s_rd_buff); i++) {
PRINT("%02x ", s_rd_buff[i]);
}
PRINT("\n");
s_wr_buff[0] = 0xff;
SPI_DMA_ReadAndWriteData(spi_idx, (uint8_t *)s_wr_buff, sizeof(s_wr_buff),
(uint8_t *)s_rd_buff, sizeof(s_rd_buff));
DEBUG("__SPI_READ_END2__\n");
for (uint16_t i = 0; i < sizeof(s_rd_buff); i++) {
PRINT("%02x ", s_rd_buff[i]);
}
PRINT("\n");
}
/**
* @brief spi_slave_demo
* @details
* @param void
* @retval void
*/
void spi_slave_demo(void) {
DEBUG("__SPI_SLAVE_DEMO__\r");
SPI_InitCfg_t spi_cfg = {0};
GPIO_InitTypeDef gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux0;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
gpio_cfg.FunSel = SSI1_CLK;
gpio_cfg.Int = NOT_INT;
gpio_cfg.Pull = GPIO_PULLDOWN;
gpio_cfg.Pin = GPIO_5;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_SSN;
gpio_cfg.Pin = GPIO_15;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_TX;
gpio_cfg.Pin = GPIO_16;
GPIO_Init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_RX;
gpio_cfg.Pin = GPIO_17;
GPIO_Init(&gpio_cfg);
spi_cfg.Mode = SPI_MODE_SLAVE;
spi_cfg.DataSize = SSI_CTRL0_DFS_LEN_8BIT;
spi_cfg.Direction = SSI_CTRL0_TMOD_WR;
spi_cfg.BaudRatePrescaler = SSI_BAUD_DIV_8;
spi_cfg.CLKPolarity = SSI_CTRL0_SCPOL_LOW;
spi_cfg.CLKPhase = SSI_CTRL0_SCPHA_TRAIL;
spi_cfg.FirstBit = SPI_FirstBit_MSB;
SPI_TypeDef *spi_handle = XC_SPI1;
xc_spi_init(spi_handle, &spi_cfg);
uint8_t txbuff[SL_NODMA_BUFFER_LEN];
uint8_t rxbuff[SL_NODMA_BUFFER_LEN];
SPI_RXFTL_Set(XC_SPI1, 0x07);
SPI_IE_Enable(XC_SPI1, SSI_IE_RXFIE_ENABLE);
// while(1)
//{
DEBUG("Write buffer: \n");
for (int i = 0; i < sizeof(txbuff); i++) {
txbuff[i] = i + 1;
PRINT("%02x ", txbuff[i]);
}
PRINT("\n");
spi_write_and_read_data(spi_handle, (uint8_t *)txbuff, sizeof(txbuff),
(uint8_t *)rxbuff, sizeof(rxbuff));
DEBUG("Read buffer: \n");
for (int i = 0; i < sizeof(rxbuff); i++) {
PRINT("%02x ", rxbuff[i]);
}
PRINT("\n");
DEBUG("__SPI_END__\n");
DEBUG("Write buffer: \n");
memset((uint8_t *)txbuff, 0xbb, sizeof(txbuff));
for (int i = 0; i < sizeof(txbuff); i++) {
PRINT("%02x ", txbuff[i]);
}
PRINT("\n");
spi_write_and_read_data(spi_handle, (uint8_t *)txbuff, sizeof(txbuff),
(uint8_t *)rxbuff, sizeof(rxbuff));
DEBUG("Read buffer: \n");
for (int i = 0; i < sizeof(rxbuff); i++) {
PRINT("%02x ", rxbuff[i]);
}
PRINT("\n");
DEBUG("__SPI_END2__\n");
//}
}
component/xc6xx_drivers/test_case/SPI/spi_slave.h
+63
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/*!
* \file spi_slave.h
*
* \brief The head file of spi_slave.c
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __SPI_SLAVE_H__
#define __SPI_SLAVE_H__
#ifdef __cplusplus
extern "C" {
#endif
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include <stdint.h>
#include <stdio.h>
#include <string.h>
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
TypeDef
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Exported Functions
-------------------------------------------------------------------------------------*/
void spi_dma_slave_demo(void);
void spi_slave_demo(void);
#ifdef __cplusplus
}
#endif
#endif /* __SPI_SLAVE_H__ */