V1.0

2026-06-09 16:39:17 +08:00
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+/*!
+ * \file      pwr.c
+ *
+ * \brief     Target pwr implementation
+ *
+ * \copyright Revised BSD License, see section \ref LICENSE.
+ *
+ * \code
+ *
+ *            _  __ _       ________    _     
+ *           | |/ /(_)___  / ____/ /_  (_)___ 
+ *           |   // / __ \/ /   / __ \/ / __ \
+ *          /   |/ / / / / /___/ / / / / /_/ /
+ *         /_/|_/_/_/ /_/\____/_/ /_/_/ .___/ 
+ *                                   /_/      
+ *           (C) 2022-2025 XinChip
+ *
+ * \endcode
+ *
+ * \author     ( XinChip ) Alex-J
+ *
+ * \author     ( XinChip )
+ */
+
+/*-----------------------------------------------------------------------------------
+	                               INCLUDE HEADE FILES
+ ------------------------------------------------------------------------------------*/
+#include "pwr.h"
+#include "xc_drv_pwr.h"
+#include "xc_drv_fmc_spi.h"
+
+/*------------------------------------------------------------------------------------
+	                                    Macros
+ -------------------------------------------------------------------------------------*/
+
+/*------------------------------------------------------------------------------------
+	                                 Global Variables
+ -------------------------------------------------------------------------------------*/
+
+/*------------------------------------------------------------------------------------
+	                                    Functions
+ -------------------------------------------------------------------------------------*/
+/**
+ * @brief       pwr_demo
+ * @details     
+ * @param       void 
+ * @retval      void 	
+ */
+ void wakeup_timer_set(uint32_t time)
+{
+    cprao_aon_reg1__timer_ao_sleep_clksw__setf(0);
+
+    AOTimer_InitCfg_t aotimer_cfg;
+    aotimer_cfg.aotimer_mode    = AOTIMER_MODE_CYCLE;
+
+    // Timer0 Config & Start
+    xc_aotimer_init(AOTIMER0_IDX, &aotimer_cfg);
+    xc_aotimer_set_value(AOTIMER0_IDX, time);
+    xc_aotimer_start(AOTIMER0_IDX);
+
+}
+
+
+void system_sleep_init()
+{
+    uint32_t wake_it_src;
+    #if (USE_XIP == 1) 
+    xc_fmc_spi_init_oprt();
+    #endif
+  
+
+#if 0
+    #if (USE_XIP!=1)
+    SPI_InitCfg_t spi_cfg = {0};
+    spi_cfg.Mode                 = SPI_MODE_MASTER;
+    spi_cfg.DataSize             = SSI_CTRL0_DFS_LEN_8BIT;
+    spi_cfg.Direction            = SSI_CTRL0_TMOD_WR;    
+    spi_cfg.BaudRatePrescaler    = SPI_BAUDRATEPRESCALER_2;
+    spi_cfg.CLKPolarity          = SSI_CTRL0_SCPOL_LOW;
+    spi_cfg.CLKPhase             = SPI_CPHA_LEAD;
+    spi_cfg.FirstBit             = SPI_FirstBit_MSB;
+    
+    xc_spi_init(XC_SPI0, &spi_cfg);  
+    SPI_Flash_PowerDown(XC_SPI0);
+    #endif
+#endif
+	xc_pwr_gpio_sleep_config();  
+    wake_it_src = GPIO_IRQn_WAKE | RTC_IRQn_WAKE|TIMER_AO0_IRQn_WAKE| TIMER0_IRQn_WAKE;
+    xc_pwr_wake_it_set(wake_it_src);
+}
+
+void system_lightsleep_cfg()
+{
+    #if (USE_XIP!=1)
+    cprao_aon_puctrl1_set(0x4);/* puctrl1= 0x4 , SSI0RX must pulldown*/
+    #endif 
+    cprao_aon_sys_time_set((RST_READY_TIME<<12) | (OSC32_STABLE_TIME));
+    
+   xc_pwr_pd_lightsleep_set();
+   xc_pwr_sleepsrc_mask_set(0x1e001e);
+   xc_pwr_osc_off(); 
+}
+
+
+void system_deepsleep_cfg()
+{
+    #if (USE_XIP!=1)
+    cprao_aon_puctrl1_set(0xf);
+    #endif 
+   cprao_aon_sys_time_set((RST_READY_TIME<<12) | (OSC32_STABLE_TIME));
+   xc_pwr_pd_deepsleep_set(); 
+   delay_us(100);    
+   xc_pwr_sleepsrc_mask_set(0x1e001e);
+   xc_pwr_osc_off();
+}
+
+void Sleep_Demo()
+{
+    cprao_aon_vdd_retmem_set(0);
+  
+    system_sleep_init();
+    xc_pwr_gpio_lightsleep_wake_config(GPIO_3, RIS_EDGE_INT);
+    xc_pwr_gpio_lightsleep_wake_config(GPIO_2, FAIL_EDGE_INT); 
+    system_lightsleep_cfg();
+
+    while(1)
+    {
+        xc_sleep();
+        delay_ms(50);
+    }
+}
+
+void DeepSleep_Demo()
+{
+  
+    system_sleep_init();
+   // PWRKEY Initialization is required after deep sleep wakeup
+    xc_pwr_pwrkey_init();
+    xc_pwr_pwrkey_deepsleep_wake_config(GPIO_2, DEEP_SLEEP_GPIO_WAKE_HIGH_LEVEL);
+    xc_pwr_pwrkey_deepsleep_wake_config(GPIO_3, DEEP_SLEEP_GPIO_WAKE_LOW_LEVEL);   
+    system_deepsleep_cfg();
+  
+    while(1)
+    {
+       xc_deep_sleep();
+    }
+}
+
+void DeepSleep_Timerwakeup_Demo()
+{
+    system_sleep_init();
+   // PWRKEY Initialization is required after deep sleep wakeup
+    xc_pwr_pwrkey_init(); 
+    system_deepsleep_cfg();
+    while(1)
+    {
+        wakeup_timer_set(1000*1000);
+        xc_deep_sleep();
+    }
+ 
+}
+
+
+#define SLEEP_DEMO                     1
+#define DEEPSLEEP_DEMO                 0
+#define DEEPSLEEP_TIMERWAKEUP_DEMO     0
+
+void pwr_demo()
+{
+#if SLEEP_DEMO
+    Sleep_Demo();
+#endif
+    
+#if DEEPSLEEP_DEMO
+    DeepSleep_Demo();
+#endif
+    
+#if DEEPSLEEP_TIMERWAKEUP_DEMO 
+    DeepSleep_Timerwakeup_Demo();
+#endif
+
+}
+
+
+
+
+
+
+
+