V1.0
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moyuhai
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/*!
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* \file main.c
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*
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* \brief Target main implementation
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*
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* \copyright Revised BSD License, see section \ref LICENSE.
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*
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* \code
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*
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* _ __ _ ________ _
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* | |/ /(_)___ / ____/ /_ (_)___
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* | // / __ \/ / / __ \/ / __ \
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* / |/ / / / / /___/ / / / / /_/ /
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* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
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* /_/
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* (C) 2022-2025 XinChip
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*
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* \endcode
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*
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* \author ( XinChip ) Alex-J
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*
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* \author ( XinChip )
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*/
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/*-----------------------------------------------------------------------------------
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INCLUDE HEADE FILES
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------------------------------------------------------------------------------------*/
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#include "main.h"
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/*------------------------------------------------------------------------------------
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Macros
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-------------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------------
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Global Variables
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-------------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------------
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Func Prototype
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-------------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------------
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Functions
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-------------------------------------------------------------------------------------*/
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void clock_init(void)
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{
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CLOCK_InitCfg_t clock_cfg;
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clock_cfg.hfclk_src = CLOCK_HFCLK_SRC_XTAL;
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clock_cfg.hfclk_in = CLOCK_HFCLK_IN_32M;
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clock_cfg.lfclk_src = CLOCK_LFCLK_SRC_RC;
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if(clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_XTAL) {
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clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32768;
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} else if(clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_RC) {
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clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32K;
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}
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xc_clock_init_cfg(&clock_cfg);
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SysTick_Config(xc_clock_hfclk_in_get( ) / 100);
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SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
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}
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void app_uart_init(void)
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{
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GPIO_InitCfg_t gpio_cfg = {0};
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gpio_cfg.Mux = GPIO_Mux0;
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gpio_cfg.Pull = GPIO_PULLUP;
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gpio_cfg.Int = NOT_INT;
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gpio_cfg.FunSel = UART0_TX;
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gpio_cfg.Pin = GPIO_18;
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gpio_cfg.Dir = GPIO_DIR_OUTPUT;
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xc_gpio_init(&gpio_cfg);
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gpio_cfg.FunSel = UART0_RX;
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gpio_cfg.Pin = GPIO_19;
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gpio_cfg.Dir = GPIO_DIR_INPUT;
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xc_gpio_init(&gpio_cfg);
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UART_InitCfg_t uart_cfg = {0};
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uart_cfg.Parity = UART_PARITY_DISABLE;
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uart_cfg.StopBits = UART_STOP_1_BITS;
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uart_cfg.WordLength = UART_DATA_8_BITS;
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uart_cfg.BaudRate = UART_BAUDRATE_115200;
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uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE;
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xc_uart_init(UART0_IDX, &uart_cfg);
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}
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/**
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* @brief main
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* @details
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* @param[in] void
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* @param[out] void
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* @retval int - 0
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* @retval void
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* @par identifier
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* reserve
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* @par other
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* void
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* @par change log
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* Alex created on 2023-05-31
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*/
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int main(void)
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{
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// Clock Initialization
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clock_init();
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app_uart_init( );
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DEBUG("__START__\n");
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/* qdec demo */
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qdec_demo( );
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while(1)
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{
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/* main loop */
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;
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}
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}
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@@ -0,0 +1,62 @@
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/*!
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* \file qdec.c
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*
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* \brief Target qdec implementation
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*
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* \copyright Revised BSD License, see section \ref LICENSE.
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*
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* \code
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*
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* _ __ _ ________ _
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* | |/ /(_)___ / ____/ /_ (_)___
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||||
* | // / __ \/ / / __ \/ / __ \
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||||
* / |/ / / / / /___/ / / / / /_/ /
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* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
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* /_/
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* (C) 2022-2025 XinChip
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*
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* \endcode
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*
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* \author ( XinChip ) Alex-J
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*
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* \author ( XinChip )
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*/
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/*------------------------------------------------------------------------------------
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INCLUDE HEADE FILES
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--------------------------------------------------------------------------------------*/
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#include "qdec.h"
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#include "xc_drv_qdec.h"
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/*------------------------------------------------------------------------------------
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Functions
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-------------------------------------------------------------------------------------*/
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void qdec_demo(void)
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{
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DEBUG("__QDEC_DEMO__\n");
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DEBUG("0_QDEC_CTL[0x%08x]: %08x\n", &QDEC_CTL_REG, qdec_ctl_get());
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Qdec_InitCfg_t qdec_config;
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qdec_config.auto_clr_en = DISABLE;
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qdec_config.single_sample_rst_en = DISABLE;
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qdec_config.db_filter_en = ENABLE;
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qdec_config.acc_sample_div = QDEC_DIVIDE_DIV_32768;
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qdec_config.num_pts_sampled = QDEC_PTS_NUM_80;
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qdec_config.db_sample_div = QDEC_DB_SAMP_DIV_32;
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xc_qdec_init(&qdec_config);
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DEBUG("1_QDEC_CTL[0x%08x]: %08x\n", &QDEC_CTL_REG, qdec_ctl_get());
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DEBUG("SAMP_CTL[0x%08x]: %08x\n", &QDEC_SAMP_CTL_REG, qdec_samp_ctl_get());
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xc_qdec_enable( );
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xc_qdec_start( );
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DEBUG("2_QDEC_CTL[0x%08x]: %08x\n", &QDEC_CTL_REG, qdec_ctl_get());
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NVIC_EnableIRQ(QDEC_IRQn);
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}
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