/*! * \file pwr.c * * \brief Target pwr implementation * * \copyright Revised BSD License, see section \ref LICENSE. * * \code * * _ __ _ ________ _ * | |/ /(_)___ / ____/ /_ (_)___ * | // / __ \/ / / __ \/ / __ \ * / |/ / / / / /___/ / / / / /_/ / * /_/|_/_/_/ /_/\____/_/ /_/_/ .___/ * /_/ * (C) 2022-2025 XinChip * * \endcode * * \author ( XinChip ) Alex-J * * \author ( XinChip ) */ /*----------------------------------------------------------------------------------- INCLUDE HEADE FILES ------------------------------------------------------------------------------------*/ #include "pwr.h" #include "xc6xxx_hal_pwr.h" /*------------------------------------------------------------------------------------ Macros -------------------------------------------------------------------------------------*/ /*------------------------------------------------------------------------------------ Global Variables -------------------------------------------------------------------------------------*/ /*------------------------------------------------------------------------------------ Functions -------------------------------------------------------------------------------------*/ /** * @brief pwr_demo * @details * @param void * @retval void */ void wakeup_timer_set(uint32_t time) { XC_CPR_AO->ALWAYS_ON_REG1 &= (~(1 << 19)); // deep sleep set TIMER_BaseInitTypeDef Timer_Init; Timer_Init.src_clk = TIMER_CLK_SRC_32K; Timer_Init.mode = TIMER_MODE_SINGLE_COUNT; Timer_Init.div_clk = TIMER_DIV_CLK_32000Hz; // Timer0 Config & Start TIMER_Base_Init(XC_AOTIMER0, &Timer_Init); TIMER_SetUs(XC_AOTIMER0, time); TIMER_Start_IT(XC_AOTIMER0); } void system_sleep_init() { uint32_t WakeITSrc; #if (USE_XIP == 1) FMC_SPI_Init(); #endif //(USE_XIP == 1) // PWR_InitTypeDef PWR_InitStruct = {0}; #if (USE_XIP != 1) SPI_InitCfg_t spi_cfg = {0}; spi_cfg.Mode = SPI_MODE_MASTER; spi_cfg.DataSize = SSI_CTRL0_DFS_LEN_8BIT; spi_cfg.Direction = SSI_CTRL0_TMOD_WR; spi_cfg.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; spi_cfg.CLKPolarity = SSI_CTRL0_SCPOL_LOW; spi_cfg.CLKPhase = SPI_CPHA_LEAD; spi_cfg.FirstBit = SPI_FirstBit_MSB; xc_spi_init(XC_SPI0, &spi_cfg); SPI_Flash_PowerDown(XC_SPI0); #endif //(USE_XIP!=1) GPIO_SleepConfig(); WakeITSrc = GPIO_IRQn_WAKE | RTC_IRQn_WAKE | TIMER_AO0_IRQn_WAKE | TIMER0_IRQn_WAKE; __PWR_WakeIT_Set(WakeITSrc); } void system_lightsleep_cfg() { #if (USE_XIP != 1) cprao_aon_puctrl1_set(0x4); // XC_CPR_AO->PU_CTRLx[0] = 0x4; // 0x4; /* puctrl1= 0x4 , SSI0RX must // pulldown*/ #endif //(USE_XIP!=1) XC_CPR_AO->SYS_TIME = (RST_READY_TIME << 12) | (OSC32_STABLE_TIME); __PWR_PD_LightSleep_Set(); __PWR_SleepSrcMask_Set(0x1e001e); __PWR_OSC_Off(); } void system_deepsleep_cfg() { #if (USE_XIP != 1) XC_CPR_AO->PU_CTRLx[0] = 0xf; // 0xF; #endif //(USE_XIP!=1) XC_CPR_AO->SYS_TIME = (RST_READY_TIME << 12) | (OSC32_STABLE_TIME); __PWR_PD_DeepSleep_Set(); Delay_Us(100); __PWR_SleepSrcMask_Set(0x1e001e); __PWR_OSC_Off(); } void Sleep_Demo() { system_sleep_init(); PWR_GPIO_LightSleepWakeConfig(GPIO_3, RIS_EDGE_INT); PWR_GPIO_LightSleepWakeConfig(GPIO_2, FAIL_EDGE_INT); system_lightsleep_cfg(); while (1) { Sleep(); DEBUG("wakeup\n"); } } void DeepSleep_Demo() { system_sleep_init(); // PWRKEY Initialization is required after deep sleep wakeup PWR_PWRKEY_Init(); PWR_PWRKEY_DeepSleepWakeConfig(GPIO_2, DEEP_SLEEP_GPIO_WAKE_HIGH_LEVEL); PWR_PWRKEY_DeepSleepWakeConfig(GPIO_3, DEEP_SLEEP_GPIO_WAKE_LOW_LEVEL); system_deepsleep_cfg(); while (1) { DeepSleep(); } } void DeepSleep_Timerwakeup_Demo() { system_sleep_init(); // PWRKEY Initialization is required after deep sleep wakeup PWR_PWRKEY_Init(); system_deepsleep_cfg(); while (1) { wakeup_timer_set(100 * 1000); DeepSleep(); } } #define SLEEP_DEMO 1 #define DEEPSLEEP_DEMO 0 #define DEEPSLEEP_TIMERWAKEUP_DEMO 0 void pwr_demo() { #if SLEEP_DEMO Sleep_Demo(); #endif #if DEEPSLEEP_DEMO DeepSleep_Demo(); #endif #if DEEPSLEEP_TIMERWAKEUP_DEMO DeepSleep_Timerwakeup_Demo(); #endif }