/*!
 * \file      xc6xxx.h
 *
 * \brief     CMSIS xc6xxx Device Peripheral Access Layer Header File.
 *
 * \copyright Revised BSD License, see section \ref LICENSE.
 *
 * \code
 *
 *            _  __ _       ________    _
 *           | |/ /(_)___  / ____/ /_  (_)___
 *           |   // / __ \/ /   / __ \/ / __ \
 *          /   |/ / / / / /___/ / / / / /_/ /
 *         /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
 *                                   /_/
 *           (C) 2022-2025 XinChip
 *
 * \endcode
 *
 * \author     ( XinChip ) Alex-J
 *
 * \author     ( XinChip )
 */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __XC6xxx_H
#define __XC6xxx_H

#ifdef __cplusplus
extern "C"
{
#endif

    /*-----------------------------------------------------------------------------------
                                           INCLUDE HEADE FILES
     ------------------------------------------------------------------------------------*/

    /** @addtogroup Device_Included
     * @{
     */

#if defined(XC60XX)
#include "xc60xx.h"
#elif defined(XC_LORA_XX)
#include "xc_lora_xx.h"
#else
#error                                                                         \
    "Please select first the target XC6xxx device used in your application (in xc6xxx.h file)"
#endif

/**
 * @}
 */

/*------------------------------------------------------------------------------------
                                            TypeDef
 -------------------------------------------------------------------------------------*/

/** @addtogroup Exported_types
 * @{
 */

typedef enum
{
    RESET = 0,
    SET   = !RESET
} FlagStatus, ITStatus;

typedef enum
{
    XR_OK = 0,
    XR_ERROR,
    XR_TIMEOUT,
    XR_UNKNOWN = 0xFF,
} eXC_RESULT;

/**
 * @}
 */

/*------------------------------------------------------------------------------------
                                             Macros
 -------------------------------------------------------------------------------------*/

/** @addtogroup Exported_macro
 * @{
 */
#define GD_FlASH_RDID       0x1364c8

#define SET_BIT(REG, BIT)   ((REG) |= (BIT))

#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))

#define READ_BIT(REG, BIT)  ((REG) & (BIT))

#define CLEAR_REG(REG)      ((REG) = (0x0))

#define WRITE_REG(REG, VAL) ((REG) = (VAL))

#define READ_REG(REG)       ((REG))

#define MODIFY_REG(REG, CLEARMASK, SETMASK)                                    \
    WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))

#define REG_BIT_VAL_GET(REG, MSK, POS) ((REG & MSK) >> POS)

#define BIT_BUILD(VAL, POS, MSK)       ((uint32_t)(((VAL) << POS) & MSK))

#define MIN(a, b)                      ((a) < (b) ? (a) : (b))

#define MAX(a, b)                      ((a) < (b) ? (b) : (a))
// power of 2 macro
#define POW2(pow)                      (1 << (pow))
// Is A greater than or equal to B macro ?
#define A_MAXEQ_B(a, b)                ((a) >= (b))

#define ALIGN_DOWN_ADDR(a, size)       (a & (~(size - 1)))
#define ALIGN_UP_ADDR(a, size)         ((a + size - 1) & (~(size - 1)))

#ifdef DEBUG_ENABLE
#define DEBUG(fmt, ...) printf(fmt, ##__VA_ARGS__)//printf("[DEBUG] " fmt, ##__VA_ARGS__)
#define PRINT(fmt, ...) printf(fmt, ##__VA_ARGS__)

#if(_DEBUG_==0)
//#define printf
#endif
#else
#define DEBUG(fmt, ...)
#define PRINT(fmt, ...)
#endif

#define RSTN_VALID   (0UL)
#define RSTN_INVALID (1UL)

#ifndef ENABLE
#define ENABLE 0x01
#endif

#ifndef DISABLE
#define DISABLE 0x00
#endif

#ifndef RSTCTL_ENABLE
#define RSTCTL_ENABLE 0x00
#endif

#ifndef RSTCTL_DISABLE
#define RSTCTL_DISABLE 0x01
#endif

#ifndef ASSERT_ERR
#define ASSERT_ERR(cond)                                                       \
    {                                                                          \
    }
#endif

/** @brief Enable interrupts globally in the system.
 * This macro must be used when the initialization phase is over and the interrupts
 * can start being handled by the system.
 */
#define GLOBAL_INT_START() ; \
do { \
    __enable_irq(); \
} while(0); 

#define GLOBAL_INT_STOP()  ; \
do { \
    __disable_irq(); \
} while(0);

#define GLOBAL_INT_DISABLE() ; \
do { \
    uint32_t irq_temp; \
    irq_temp = __disable_irq(); 
#define GLOBAL_INT_RESTORE() ;  \
    if(!irq_temp)               \
    {                           \
        __enable_irq();         \
    }                           \
} while(0);


/**
 * @}
 */
#include "xc_drv_conf.h"

    /**
     * @brief  HAL Status structures definition
     */
    typedef enum
    {
        HAL_OK      = 0x00U,
        HAL_ERROR   = 0x01U,
        HAL_BUSY    = 0x02U,
        HAL_TIMEOUT = 0x03U
    } HAL_StatusTypeDef;

    /**
     * @brief  HAL Lock structures definition
     */
    typedef enum
    {
        HAL_UNLOCKED = 0x00U,
        HAL_LOCKED   = 0x01U
    } HAL_LockTypeDef;

#define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
#define HAL_Delay delay_ms

    void HAL_Delay(unsigned int Delay);
    void Error_Handler(void);

#define __HAL_LOCK(__HANDLE__)                                                 \
    do {                                                                       \
        if ((__HANDLE__)->Lock == HAL_LOCKED) {                                \
            return HAL_BUSY;                                                   \
        } else {                                                               \
            (__HANDLE__)->Lock = HAL_LOCKED;                                   \
        }                                                                      \
    } while (0U)

#define __HAL_UNLOCK(__HANDLE__)                                               \
    do {                                                                       \
        (__HANDLE__)->Lock = HAL_UNLOCKED;                                     \
    } while (0U)

/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive
 * "#pragma data_alignment=4" must be used instead */
#if defined(__ARMCC_VERSION) &&                                                \
    (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
#ifndef __ALIGN_BEGIN
#define __ALIGN_BEGIN
#endif
#ifndef __ALIGN_END
#define __ALIGN_END __attribute__((aligned(4)))
#endif
#elif defined(__GNUC__) && !defined(__CC_ARM) /* GNU Compiler */
#ifndef __ALIGN_END
#define __ALIGN_END __attribute__((aligned(4)))
#endif /* __ALIGN_END */
#ifndef __ALIGN_BEGIN
#define __ALIGN_BEGIN
#endif /* __ALIGN_BEGIN */
#else
#ifndef __ALIGN_END
#define __ALIGN_END
#endif /* __ALIGN_END */
#ifndef __ALIGN_BEGIN
#if defined(__CC_ARM) /* ARM Compiler V5*/
#define __ALIGN_BEGIN __align(4)
#elif defined(__ICCARM__) /* IAR Compiler */
#define __ALIGN_BEGIN
#endif /* __CC_ARM */
#endif /* __ALIGN_BEGIN */
#endif /* __GNUC__ */

#ifdef __cplusplus
}
#endif

#endif /* __XC6xxx_H */