moyuhai
191 lines
4.6 KiB
C
191 lines
4.6 KiB
C
/*!
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* \file pwr.c
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*
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* \brief Target pwr implementation
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*
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* \copyright Revised BSD License, see section \ref LICENSE.
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*
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* \code
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*
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* _ __ _ ________ _
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* | |/ /(_)___ / ____/ /_ (_)___
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* | // / __ \/ / / __ \/ / __ \
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* / |/ / / / / /___/ / / / / /_/ /
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* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
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* /_/
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* (C) 2022-2025 XinChip
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*
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* \endcode
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*
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* \author ( XinChip ) Alex-J
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*
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* \author ( XinChip )
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*/
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/*-----------------------------------------------------------------------------------
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INCLUDE HEADE FILES
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------------------------------------------------------------------------------------*/
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#include "pwr.h"
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#include "xc_drv_pwr.h"
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#include "xc_drv_fmc_spi.h"
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/*------------------------------------------------------------------------------------
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Macros
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-------------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------------
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Global Variables
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-------------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------------
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Functions
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-------------------------------------------------------------------------------------*/
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/**
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* @brief pwr_demo
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* @details
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* @param void
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* @retval void
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*/
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void wakeup_timer_set(uint32_t time)
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{
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cprao_aon_reg1__timer_ao_sleep_clksw__setf(0);
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AOTimer_InitCfg_t aotimer_cfg;
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aotimer_cfg.aotimer_mode = AOTIMER_MODE_CYCLE;
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// Timer0 Config & Start
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xc_aotimer_init(AOTIMER0_IDX, &aotimer_cfg);
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xc_aotimer_set_value(AOTIMER0_IDX, time);
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xc_aotimer_start(AOTIMER0_IDX);
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}
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void system_sleep_init()
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{
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uint32_t wake_it_src;
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#if (USE_XIP == 1)
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xc_fmc_spi_init_oprt();
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#endif
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#if 0
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#if (USE_XIP!=1)
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SPI_InitCfg_t spi_cfg = {0};
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spi_cfg.Mode = SPI_MODE_MASTER;
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spi_cfg.DataSize = SSI_CTRL0_DFS_LEN_8BIT;
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spi_cfg.Direction = SSI_CTRL0_TMOD_WR;
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spi_cfg.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
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spi_cfg.CLKPolarity = SSI_CTRL0_SCPOL_LOW;
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spi_cfg.CLKPhase = SPI_CPHA_LEAD;
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spi_cfg.FirstBit = SPI_FirstBit_MSB;
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xc_spi_init(XC_SPI0, &spi_cfg);
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SPI_Flash_PowerDown(XC_SPI0);
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#endif
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#endif
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xc_pwr_gpio_sleep_config();
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wake_it_src = GPIO_IRQn_WAKE | RTC_IRQn_WAKE|TIMER_AO0_IRQn_WAKE| TIMER0_IRQn_WAKE;
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xc_pwr_wake_it_set(wake_it_src);
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}
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void system_lightsleep_cfg()
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{
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#if (USE_XIP!=1)
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cprao_aon_puctrl1_set(0x4);/* puctrl1= 0x4 , SSI0RX must pulldown*/
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#endif
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cprao_aon_sys_time_set((RST_READY_TIME<<12) | (OSC32_STABLE_TIME));
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xc_pwr_pd_lightsleep_set();
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xc_pwr_sleepsrc_mask_set(0x1e001e);
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xc_pwr_osc_off();
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}
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void system_deepsleep_cfg()
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{
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#if (USE_XIP!=1)
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cprao_aon_puctrl1_set(0xf);
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#endif
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cprao_aon_sys_time_set((RST_READY_TIME<<12) | (OSC32_STABLE_TIME));
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xc_pwr_pd_deepsleep_set();
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delay_us(100);
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xc_pwr_sleepsrc_mask_set(0x1e001e);
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xc_pwr_osc_off();
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}
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void Sleep_Demo()
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{
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cprao_aon_vdd_retmem_set(0);
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system_sleep_init();
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xc_pwr_gpio_lightsleep_wake_config(GPIO_3, RIS_EDGE_INT);
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xc_pwr_gpio_lightsleep_wake_config(GPIO_2, FAIL_EDGE_INT);
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system_lightsleep_cfg();
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while(1)
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{
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xc_sleep();
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delay_ms(50);
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}
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}
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void DeepSleep_Demo()
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{
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system_sleep_init();
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// PWRKEY Initialization is required after deep sleep wakeup
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xc_pwr_pwrkey_init();
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xc_pwr_pwrkey_deepsleep_wake_config(GPIO_2, DEEP_SLEEP_GPIO_WAKE_HIGH_LEVEL);
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xc_pwr_pwrkey_deepsleep_wake_config(GPIO_3, DEEP_SLEEP_GPIO_WAKE_LOW_LEVEL);
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system_deepsleep_cfg();
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while(1)
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{
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xc_deep_sleep();
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}
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}
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void DeepSleep_Timerwakeup_Demo()
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{
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system_sleep_init();
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// PWRKEY Initialization is required after deep sleep wakeup
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xc_pwr_pwrkey_init();
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system_deepsleep_cfg();
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while(1)
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{
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wakeup_timer_set(1000*1000);
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xc_deep_sleep();
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}
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}
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#define SLEEP_DEMO 1
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#define DEEPSLEEP_DEMO 0
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#define DEEPSLEEP_TIMERWAKEUP_DEMO 0
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void pwr_demo()
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{
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#if SLEEP_DEMO
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Sleep_Demo();
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#endif
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#if DEEPSLEEP_DEMO
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DeepSleep_Demo();
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#endif
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#if DEEPSLEEP_TIMERWAKEUP_DEMO
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DeepSleep_Timerwakeup_Demo();
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#endif
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}
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