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b5495492a706c6c06fe6ec5c2b565c5a9e1be7b4
pwm32e_pro/project/example/driver/pwm/app/src/pwm.c
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moyuhai 41a602f89c V1.0
2026-06-09 16:39:17 +08:00

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/*!
* \file pwm.c
*
* \brief Target pwm implementation
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/*------------------------------------------------------------------------------------
INCLUDE HEADE FILES
--------------------------------------------------------------------------------------*/
#include "pwm.h"
#include "xc_drv_pwm.h"
// #include "xc_drv_adc.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
TypeDef
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Local Variables
-------------------------------------------------------------------------------------*/
uint16_t ch0_capture_data[CAPTURE_DATA_MAX];
uint16_t ch1_capture_data[CAPTURE_DATA_MAX];
uint16_t ch2_capture_data[CAPTURE_DATA_MAX];
PWM_CAP_STA_TypeDef pwm_cap_state = PWM_CAP_IDLE;
PWM_BRK_STA_TypeDef pwm_brk_state = PWM_BRK_IDLE;
PWM_BRK_CAP_STA_TypeDef pwm_brk_cap_state = PWM_BRK_CAP_VALID;
pwm_ch_cap_dutycycle_t pwm_ch_cap_dutycycle;
pwm_ch_cap_freq_t pwm_ch_cap_freq;
pwm_ch_cap_type_t pwm_ch_cap_type;
/*------------------------------------------------------------------------------------
Func Prototype
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Functions
-------------------------------------------------------------------------------------*/
/**
* @brief pwm_test_demo
* @details
* @param void
* @retval void
*/
//void pwm_output_demo()
//{
// DEBUG("PWM_OUTPUT_DEMO\r");
// // PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
// // CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
// // EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
//// PWM_InitCfg_t pwm_cfg;
//// pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
//// pwm_cfg.DutyCycleAcc = 8000;
//// pwm_cfg.DutyCycle = 1000;
//// pwm_cfg.Period = 0;
//// pwm_cfg.InvertDelay = 0x17;
//// pwm_cfg.InvertEnable = true;
//// pwm_cfg.OutputInvertPin = GPIO_1;
//// pwm_cfg.OutputPin = GPIO_2;
//// pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
//// pwm_cfg.SrcEnable = PWM_EN_SEL_ALL;
//// xc_pwm_init(PWM0_IDX, &pwm_cfg);
//
//
// PWM_InitCfg_t pwm_cfg;
// pwm_cfg.Mode = 0x03UL;
// pwm_cfg.DutyCycleAcc = 255;
// pwm_cfg.DutyCycle = 200;
// pwm_cfg.Period = 300;
// pwm_cfg.InvertDelay = 0x3f;
// pwm_cfg.InvertEnable =true;
// pwm_cfg.OutputInvertPin = GPIO_2;
// pwm_cfg.OutputPin = GPIO_1;
// pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
// pwm_cfg.SrcEnable = PWM_EN_SEL_ALL;
// xc_pwm_init(PWM0_IDX, &pwm_cfg);
// xc_pwm_start_all();
//}
void pwm_output_demo()
{
PWM_InitCfg_t pwm_cfg;
pwm_cfg.Mode = 0x03UL;
pwm_cfg.DutyCycleAcc = 255;
pwm_cfg.DutyCycle = 250;
pwm_cfg.Period = 300;
pwm_cfg.InvertDelay = 0x3f;
pwm_cfg.InvertEnable = true; //false;
pwm_cfg.OutputInvertPin = GPIO_2;
pwm_cfg.OutputPin = GPIO_1;
pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
pwm_cfg.SrcEnable = PWM_EN_SEL_ALL;
xc_pwm_init(PWM0_IDX, &pwm_cfg);
xc_pwm_start_all();
}
void pwm_brake_demo()
{
DEBUG("PWM_BRAKE_DEMO\r");
// PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
// CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
// EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
PWM_InitCfg_t pwm_cfg;
pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
pwm_cfg.DutyCycleAcc = 60000;
pwm_cfg.DutyCycle = 30000;
pwm_cfg.Period = 99;
pwm_cfg.InvertDelay = 0;
pwm_cfg.InvertEnable = false;
pwm_cfg.OutputInvertPin = GPIO_2;
pwm_cfg.OutputPin = GPIO_1;
pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
pwm_cfg.SrcEnable = PWM_EN_SEL_SELF;
xc_pwm_init(PWM0_IDX, &pwm_cfg);
xc_pwm_start(PWM0_IDX);
xc_gpio_fun_sel(PWM_SIGNAL_BRK0_GPIO4, GPIO_Dx);
xc_gpio_mux_ctl(PWM_SIGNAL_BRK0_GPIO4, GPIO_Mux1);
xc_gpio_pull_config(PWM_SIGNAL_BRK0_GPIO4, GPIO_PULLUP);
xc_gpio_fun_sel(PWM_SIGNAL_BRK1_GPIO5, GPIO_Dx);
xc_gpio_mux_ctl(PWM_SIGNAL_BRK1_GPIO5, GPIO_Mux1);
xc_gpio_pull_config(PWM_SIGNAL_BRK1_GPIO5, GPIO_PULLUP);
xc_gpio_fun_sel(PWM_SIGNAL_BRK2_GPIO6, GPIO_Dx);
xc_gpio_mux_ctl(PWM_SIGNAL_BRK2_GPIO6, GPIO_Mux1);
cpr_opa_ctrl_reg__pdbias__setf(0);
xc_gpio_pull_config(PWM_SIGNAL_BRK2_GPIO6, GPIO_PULLUP);
xc_pwm_brake_enable(PWM0_IDX);
xc_pwm_brake_signal_mask_set(PWM_BRK0_MASK_DISABLE | PWM_BRK1_MASK_DISABLE | PWM_BRK2_MASK_DISABLE);
xc_pwm_brake_signal_trigger_level_set(PWM_BRK0_LOW_LEVEL | PWM_BRK1_LOW_LEVEL | PWM_BRK2_LOW_LEVEL);
xc_pwm_brake_recovery_mode_set(PWM_BRK_MODE_SOFTWARE);
xc_pwm_brake_debounce_set(PWM_BRK_DBC_EN_ENABLE, PWM_BRK_DBC_STEP2);
while (1) {
if (xc_pwm_brake_recovery_mode_get() & PWM_BRK_MODE_SOFTWARE) {
if ((xc_pwm_brake_signal_valid_get() | PWM_BRK_SYNC_INVALID) == PWM_BRK_SYNC_INVALID) {
xc_pwm_brake_clear();
}
}
}
}
void pwm_capture_demo()
{
DEBUG("PWM_CAPTURE_DEMO\r");
// PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
// CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
// EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
PWM_InitCfg_t pwm_cfg;
pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
pwm_cfg.DutyCycleAcc = 1000;
pwm_cfg.DutyCycle = 700;
pwm_cfg.Period = 0;
pwm_cfg.InvertDelay = 0;
pwm_cfg.InvertEnable = false;
pwm_cfg.OutputInvertPin = GPIO_2;
pwm_cfg.OutputPin = GPIO_1;
pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
pwm_cfg.SrcEnable = PWM_EN_SEL_SELF;
xc_pwm_init(PWM0_IDX, &pwm_cfg);
xc_pwm_start(PWM0_IDX);
// Set capture pin
xc_gpio_fun_sel(PWM_SIGNAL_CAPTURE0_GPIO3, GPIO_Dx);
xc_gpio_mux_ctl(PWM_SIGNAL_CAPTURE0_GPIO3, GPIO_Mux1);
xc_gpio_fun_sel(PWM_SIGNAL_CAPTURE1_GPIO8, GPIO_Dx);
xc_gpio_mux_ctl(PWM_SIGNAL_CAPTURE1_GPIO8, GPIO_Mux1);
xc_gpio_fun_sel(PWM_SIGNAL_CAPTURE2_GPIO9, GPIO_Dx);
xc_gpio_mux_ctl(PWM_SIGNAL_CAPTURE2_GPIO9, GPIO_Mux1);
// Set capture freq
pwm_ch_cap_freq.ch0_cap_freq = 1000;
pwm_ch_cap_freq.ch1_cap_freq = 2000;
pwm_ch_cap_freq.ch2_cap_freq = 8000;
// Set capture duty cycle
pwm_ch_cap_dutycycle.ch0_cap_dutycycle = 50;
pwm_ch_cap_dutycycle.ch1_cap_dutycycle = 60;
pwm_ch_cap_dutycycle.ch2_cap_dutycycle = 70;
// Set capture type
pwm_ch_cap_type.ch0_cap_type = PWM_CAP_TYPE_FREQ;
pwm_ch_cap_type.ch1_cap_type = PWM_CAP_TYPE_FREQ;
pwm_ch_cap_type.ch2_cap_type = PWM_CAP_TYPE_FREQ;
// capture ch0 set
xc_pwm_capture_counter_enable(PWM_IC_CH0);
xc_pwm_capture_psc_set(PWM_IC_CH0, PWM_CAPTURE_PSC_1);
if (pwm_ch_cap_type.ch0_cap_type == PWM_CAP_TYPE_FREQ) {
xc_pwm_capture_edge_set(PWM_IC_CH0, PWM_CAPTURE_MODE_RISE);
} else if (pwm_ch_cap_type.ch0_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
xc_pwm_capture_edge_set(PWM_IC_CH0, PWM_CAPTURE_MODE_BOTH);
}
xc_pwm_capture_debounce_enable(PWM_IC_CH0, PWM_CAPTURE_DBC_STEP1);
xc_pwm_capture_signal_set(PWM_IC_CH0, PWM_ICSIG_CAPTURE0);
xc_pwm_capture_enable_it(PWM_IC_CH0);
xc_pwm_capture_enable(PWM_IC_CH0);
// capture ch1 set
xc_pwm_capture_counter_enable(PWM_IC_CH1);
xc_pwm_capture_psc_set(PWM_IC_CH1, PWM_CAPTURE_PSC_1);
if (pwm_ch_cap_type.ch1_cap_type == PWM_CAP_TYPE_FREQ) {
xc_pwm_capture_edge_set(PWM_IC_CH1, PWM_CAPTURE_MODE_RISE);
} else if (pwm_ch_cap_type.ch1_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
xc_pwm_capture_edge_set(PWM_IC_CH1, PWM_CAPTURE_MODE_BOTH);
}
xc_pwm_capture_debounce_enable(PWM_IC_CH1, PWM_CAPTURE_DBC_STEP1);
xc_pwm_capture_signal_set(PWM_IC_CH1, PWM_ICSIG_CAPTURE1);
xc_pwm_capture_enable_it(PWM_IC_CH1);
xc_pwm_capture_enable(PWM_IC_CH1);
// capture ch2 set
xc_pwm_capture_counter_enable(PWM_IC_CH2);
xc_pwm_capture_psc_set(PWM_IC_CH2, PWM_CAPTURE_PSC_1);
if (pwm_ch_cap_type.ch2_cap_type == PWM_CAP_TYPE_FREQ) {
xc_pwm_capture_edge_set(PWM_IC_CH2, PWM_CAPTURE_MODE_RISE);
} else if (pwm_ch_cap_type.ch2_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
xc_pwm_capture_edge_set(PWM_IC_CH2, PWM_CAPTURE_MODE_BOTH);
}
xc_pwm_capture_debounce_enable(PWM_IC_CH2, PWM_CAPTURE_DBC_STEP1);
xc_pwm_capture_signal_set(PWM_IC_CH2, PWM_ICSIG_CAPTURE2);
xc_pwm_capture_enable_it(PWM_IC_CH2);
xc_pwm_capture_enable(PWM_IC_CH2);
NVIC_EnableIRQ(PWM_IRQn);
}
void pwm_enable_adc_demo(void)
{
DEBUG("PWM_ENABLE_ADC_DEMO\r");
ADC_InitCfg_t adc_cfg;
uint16_t adc_val, integer, decimal;
// pwm 使能后触发 adc中断
// PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
// CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
// EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
PWM_InitCfg_t pwm_cfg;
pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
pwm_cfg.DutyCycleAcc = 60000;
pwm_cfg.DutyCycle = 30000;
pwm_cfg.Period = 99;
pwm_cfg.InvertDelay = 0;
pwm_cfg.InvertEnable = false;
pwm_cfg.OutputInvertPin = GPIO_2;
pwm_cfg.OutputPin = GPIO_1;
pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV;
pwm_cfg.SrcEnable = PWM_EN_SEL_SELF;
xc_pwm_init(PWM0_IDX, &pwm_cfg);
xc_pwm_start(PWM0_IDX);
adc_cfg.Freq = ADC_FREQ_2M;
adc_cfg.RefVol = ADC_REF_VOL_3_3V;
adc_cfg.SampEdge = ADC_SAMPEDGE_RISE;
adc_cfg.ExtDataMode = ADC_EXT_DATA_MODE_32BIT;
adc_cfg.ExtEdgeSel = ADC_EXT_EDGE_SEL_EXTERN_RISE;
adc_cfg.ExtSampleNum = ADC_EXT_SAMPLE_NUM_8;
adc_cfg.ExtTriggerSel = ADC_EXT_TRIGGER_SEL_PWM0;
xc_adc_init(&adc_cfg);
adc_chan_ctl__select_chan__setf(ADC_CH6_PIN4);
xc_adc_channel_gpio_config(ADC_CH6_PIN4);
xc_adc_fifo_req_len_set(ADC_FIFO_CTL_READ_REQ_THRESH_LEN_8);
xc_adc_fifo_flush();
xc_adc_it_set(adc_int_get());
xc_adc_enable_it(ADC_INT_FIFO_ERROR_INT_SET | ADC_INT_READ_REQ_INT_SET);
xc_adc_enable();
NVIC_EnableIRQ(GADC_IRQn);
while (1) {
adc_val = xc_adc_it_collectval_get();
if (adc_cfg.RefVol == ADC_REF_VOL_3_3V) {
integer = ((adc_val) * 3.3 * 100) / (1.0 * 4096) / 100;
decimal = ((uint32_t)((adc_val * 3.3 * 100) / 4096) % 100);
DEBUG("3.3v ref adc_vol=%d.%d ,adc_val=%d\n", integer, decimal, adc_val);
} else if (adc_cfg.RefVol == ADC_REF_VOL_2_48V) {
integer = ((adc_val) * 2.33 * 100) / (1.0 * 4096) / 100;
decimal = ((uint32_t)((adc_val * 2.33 * 100) / 4096) % 100);
DEBUG("2.33v ref adc_vol=%d.%d ,adc_val=%d\n", integer, decimal, adc_val);
}
delay_ms(1000);
}
}
void pwm_lowpower_demo(void)
{
xc_fmc_spi_init_oprt();
xc_pwr_gpio_sleep_config();
DEBUG("PWM_LOWPOWER_DEMO\r");
// PWM0 and PWM1 can be mapped to other pins, PWM0 and PWM1 have inverted output.
// CENTER_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1))/2, Duty Cycle = (2*(DutyCycleAcc-DutyCycle)-1) / (2*DutyCycleAcc)
// EDGE_ALIGNED: PWM(HZ) = PWMCLK(mclk/2)/(DutyCycleAcc*(period+1)), Duty Cycle = DutyCycle/DutyCycleAcc
PWM_InitCfg_t pwm_cfg;
pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
pwm_cfg.DutyCycleAcc = 1000;
pwm_cfg.DutyCycle = 500;
pwm_cfg.Period = 0;
pwm_cfg.InvertDelay = 0;
pwm_cfg.InvertEnable = false;
pwm_cfg.OutputInvertPin = GPIO_2;
pwm_cfg.OutputPin = GPIO_1;
pwm_cfg.SrcClk = PWM_CLK_SRC_32K;
pwm_cfg.SrcEnable = PWM_EN_SEL_SELF;
xc_pwm_init(PWM0_IDX, &pwm_cfg);
xc_pwm_start(PWM0_IDX);
xc_pwm_lowpower_enable(PWM0_IDX);
xc_pwm_lowpower_countdirection_set(PWM0_IDX, PWM_SLEEP_COUNT_DIRECTION_UP);
PWR_InitCfg_t pwr_cfg = {0};
pwr_cfg.pwr_wake_it_src = GPIO_IRQn_WAKE | RTC_IRQn_WAKE;
pwr_cfg.pwr_sleep_mode = LIGHT_SLEEP_MODE; // LIGHT_SLEEP_MODE;//DEEP_SLEEP_MODE;
// xc_fmc_spi_init_oprt();
// xc_pwr_gpio_sleep_config();
if (pwr_cfg.pwr_sleep_mode == LIGHT_SLEEP_MODE) {
xc_pwr_gpio_lightsleep_wake_config(GPIO_4, RIS_EDGE_INT);
xc_pwr_gpio_lightsleep_wake_config(GPIO_5, FAIL_EDGE_INT);
} else if (pwr_cfg.pwr_sleep_mode == DEEP_SLEEP_MODE) {
// PWRKEY Initialization is required after deep sleep wakeup
xc_pwr_pwrkey_init();
xc_pwr_pwrkey_deepsleep_wake_config(GPIO_4, DEEP_SLEEP_GPIO_WAKE_HIGH_LEVEL);
xc_pwr_pwrkey_deepsleep_wake_config(GPIO_5, DEEP_SLEEP_GPIO_WAKE_LOW_LEVEL);
}
xc_pwr_sleep_init(&pwr_cfg);
while (1) {
delay_ms(100);
xc_pwr_cpu_sleep_enter();
DEBUG("wakeup\n");
}
}
void bubble_sort(uint16_t *data, uint8_t len)
{
for (int i = 0; i < len - 1; i++) {
for (int j = 0; j < len - i - 1; j++) {
if (data[j] > data[j + 1]) {
uint16_t temp = data[j];
data[j] = data[j + 1];
data[j + 1] = temp;
}
}
}
}
uint32_t find_duplicate_data(uint16_t *buff, uint16_t size)
{
uint32_t val[CAPTURE_DATA_MAX / 2];
uint8_t cnt[CAPTURE_DATA_MAX / 2];
uint8_t repeat_cnt = 0;
uint32_t found = 0;
uint32_t maxRepeatIndex = 0;
for (int i = 0; i < size; i++) {
found = 0;
for (int j = 0; j < repeat_cnt; j++) {
if (val[j] == buff[i]) {
cnt[j]++;
found = 1;
break;
}
}
if (!found) {
val[repeat_cnt] = buff[i];
cnt[repeat_cnt] = 1;
repeat_cnt++;
}
}
for (int i = 0; i < repeat_cnt; i++) {
if (cnt[i] > cnt[maxRepeatIndex]) {
maxRepeatIndex = i;
}
}
return val[maxRepeatIndex];
}
bool pwm_freq_check(uint32_t cap_freq, uint16_t *data)
{
uint16_t diff_val[CAPTURE_DATA_MAX - 1];
uint32_t val = 0;
for (uint8_t i = 0; i < CAPTURE_DATA_MAX - 1; i++) {
if(data[i + 1] - data[i] > 0){
diff_val[i] = data[i + 1] - data[i];
}else{
diff_val[i] = data[i + 1] + 65536 - data[i];
}
}
bubble_sort(diff_val, CAPTURE_DATA_MAX - 1);
val = find_duplicate_data(diff_val, CAPTURE_DATA_MAX / 2);
if ((val < (16000000 / cap_freq + DEVIATION_FREQ)) && (val > (16000000 / cap_freq - DEVIATION_FREQ))) {
DEBUG("freq right\n");
return true;
} else {
DEBUG("freq error\n");
return false;
}
}
bool pwm_dutycycle_check(uint16_t duty_cycle, uint16_t *data)
{
uint16_t diff_val[CAPTURE_DATA_MAX - 1];
uint32_t low_level_cnt = 0;
uint32_t high_level_cnt = 0;
for (uint8_t i = 0; i < CAPTURE_DATA_MAX - 1; i++) {
if(data[i + 1] - data[i] > 0){
diff_val[i] = data[i + 1] - data[i];
}else{
diff_val[i] = data[i + 1] + 65536 - data[i];
}
}
bubble_sort(diff_val, CAPTURE_DATA_MAX - 1);
low_level_cnt = find_duplicate_data(diff_val, CAPTURE_DATA_MAX / 2);
high_level_cnt = find_duplicate_data(diff_val + CAPTURE_DATA_MAX / 2, CAPTURE_DATA_MAX / 2);
DEBUG("low=%d, high=%d, dutycycle=%d\n", low_level_cnt, high_level_cnt,
duty_cycle * (low_level_cnt + high_level_cnt) / 100);
if ((high_level_cnt <= (duty_cycle * (low_level_cnt + high_level_cnt) / 100 + DEVIATION_DUTYCYCLE)) &&
(high_level_cnt >= (duty_cycle * (low_level_cnt + high_level_cnt) / 100 - DEVIATION_DUTYCYCLE))) {
DEBUG("duty_cycle right\n");
return true;
} else {
DEBUG("duty_cycle error\n");
return false;
}
}
bool pwm_invert_freq_check(uint32_t freq, uint16_t *data)
{
uint16_t diff_val[CAPTURE_DATA_MAX - 1];
uint32_t val = 0;
bubble_sort(data, CAPTURE_DATA_MAX);
for (uint8_t i = 0; i < CAPTURE_DATA_MAX - 1; i++) {
if(data[i + 1] - data[i] > 0){
diff_val[i] = data[i + 1] - data[i];
}else{
diff_val[i] = data[i + 1] + 65536 - data[i];
}
}
val = find_duplicate_data(diff_val, CAPTURE_DATA_MAX / 2);
if ((val < (16000000 / freq + DEVIATION_FREQ)) && (val > (16000000 / freq - DEVIATION_FREQ))) {
DEBUG("freq right\n");
return true;
} else {
DEBUG("freq error\n");
return false;
}
}
bool pwm_invert_dutycycle_check(uint16_t duty_cycle, uint16_t *data)
{
uint16_t diff_val[CAPTURE_DATA_MAX - 1];
uint32_t low_level_cnt = 0;
uint32_t high_level_cnt = 0;
bubble_sort(data, CAPTURE_DATA_MAX);
for (uint8_t i = 0; i < CAPTURE_DATA_MAX - 1; i++) {
if(data[i + 1] - data[i] > 0){
diff_val[i] = data[i + 1] - data[i];
}else{
diff_val[i] = data[i + 1] + 65536 - data[i];
}
}
bubble_sort(diff_val, CAPTURE_DATA_MAX - 1);
low_level_cnt = find_duplicate_data(diff_val, CAPTURE_DATA_MAX / 2);
low_level_cnt = find_duplicate_data(diff_val + CAPTURE_DATA_MAX / 2, CAPTURE_DATA_MAX / 2);
DEBUG("low=%d, high=%d, dutycycle=%d\n", low_level_cnt, high_level_cnt,
duty_cycle * (low_level_cnt + high_level_cnt) / 100);
if ((high_level_cnt <= (duty_cycle * (low_level_cnt + high_level_cnt) / 100 + DEVIATION_DUTYCYCLE)) &&
(high_level_cnt >= (duty_cycle * (low_level_cnt + high_level_cnt) / 100 - DEVIATION_DUTYCYCLE))) {
DEBUG("duty_cycle right\n");
return true;
} else {
DEBUG("duty_cycle error\n");
return false;
}
}
void pwm_brk_check(void)
{
if (pwm_brk_state == PWM_BRK_START) {
pwm_brk_cap_state = PWM_BRK_CAP_ERROR;
} else if (pwm_brk_state == PWM_BRK_STOP) {
pwm_brk_cap_state = PWM_BRK_CAP_RECOVERY;
}
}
void dump_capture_invert_data(uint16_t check_data, uint16_t *data)
{
if (pwm_cap_state == PWM_CAP_FREQ) {
if (pwm_invert_freq_check(check_data, data) == true) {
pwm_cap_state = PWM_CAP_RIGHT;
} else {
pwm_cap_state = PWM_CAP_ERROR;
}
} else if (pwm_cap_state == PWM_CAP_DUTYCYCLE) {
if (pwm_invert_dutycycle_check(check_data, data) == true) {
pwm_cap_state = PWM_CAP_RIGHT;
} else {
pwm_cap_state = PWM_CAP_ERROR;
}
}
}
void dump_capture_data(uint8_t cap_type, uint16_t check_data, uint16_t *data)
{
if (cap_type == PWM_CAP_TYPE_FREQ) {
if (pwm_freq_check(check_data, data) == true) {
pwm_cap_state = PWM_CAP_RIGHT;
} else {
pwm_cap_state = PWM_CAP_ERROR;
}
} else if (cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
if (pwm_dutycycle_check(check_data, data) == true) {
pwm_cap_state = PWM_CAP_RIGHT;
} else {
pwm_cap_state = PWM_CAP_ERROR;
}
}
}
uint8_t pwm_capture_ch0_callback(void *context)
{
static uint16_t ch0_capture_count = 0;
uint32_t val = xc_pwm_capture_val_get(PWM_IC_CH0);
if (ch0_capture_count < CAPTURE_DATA_MAX) {
ch0_capture_data[ch0_capture_count++] = val;
}
if (ch0_capture_count == CAPTURE_DATA_MAX) {
DEBUG("ch0=");
if (pwm_ch_cap_type.ch0_cap_type == PWM_CAP_TYPE_FREQ) {
dump_capture_data(pwm_ch_cap_type.ch0_cap_type, pwm_ch_cap_freq.ch0_cap_freq, ch0_capture_data);
} else if (pwm_ch_cap_type.ch0_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
dump_capture_data(pwm_ch_cap_type.ch0_cap_type, pwm_ch_cap_dutycycle.ch0_cap_dutycycle, ch0_capture_data);
}
ch0_capture_count++;
}
return 0;
}
uint8_t pwm_capture_ch1_callback(void *context)
{
static uint16_t ch1_capture_count = 0;
uint32_t val = xc_pwm_capture_val_get(PWM_IC_CH1);
if (ch1_capture_count < CAPTURE_DATA_MAX) {
ch1_capture_data[ch1_capture_count++] = val;
}
if (ch1_capture_count == CAPTURE_DATA_MAX) {
DEBUG("ch1=");
if (pwm_ch_cap_type.ch1_cap_type == PWM_CAP_TYPE_FREQ) {
dump_capture_data(pwm_ch_cap_type.ch1_cap_type, pwm_ch_cap_freq.ch1_cap_freq, ch1_capture_data);
} else if (pwm_ch_cap_type.ch1_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
dump_capture_data(pwm_ch_cap_type.ch1_cap_type, pwm_ch_cap_dutycycle.ch1_cap_dutycycle, ch1_capture_data);
}
pwm_brk_check();
ch1_capture_count++;
}
return 0;
}
uint8_t pwm_capture_ch2_callback(void *context)
{
static uint16_t ch2_capture_count = 0;
uint32_t val = xc_pwm_capture_val_get(PWM_IC_CH2);
if (ch2_capture_count < CAPTURE_DATA_MAX) {
ch2_capture_data[ch2_capture_count++] = val;
}
if (ch2_capture_count == CAPTURE_DATA_MAX) {
DEBUG("ch2=");
if (pwm_ch_cap_type.ch2_cap_type == PWM_CAP_TYPE_FREQ) {
dump_capture_data(pwm_ch_cap_type.ch2_cap_type, pwm_ch_cap_freq.ch2_cap_freq, ch2_capture_data);
} else if (pwm_ch_cap_type.ch2_cap_type == PWM_CAP_TYPE_DUTYCYCLE) {
dump_capture_data(pwm_ch_cap_type.ch2_cap_type, pwm_ch_cap_dutycycle.ch2_cap_dutycycle, ch2_capture_data);
}
ch2_capture_count++;
}
return 0;
}
/*
*-----------------------------------------------------------------------------------------------
* PWM Timer
*-----------------------------------------------------------------------------------------------
*/
void pwm_timer_demo(void)
{
DEBUG("PWM_TIMER_DEMO\r");
GPIO_InitCfg_t gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux1;
gpio_cfg.Pull = GPIO_PULLUP;
gpio_cfg.Int = NOT_INT;
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
gpio_cfg.Pin = GPIO_29;
xc_gpio_init(&gpio_cfg);
gpio_cfg.Pin = GPIO_30;
xc_gpio_init(&gpio_cfg);
#if (USE_XIP == 0)
cpr_rf_reg0__boot_done__setf(1);
gpio_cfg.Pin = GPIO_35;
xc_gpio_init(&gpio_cfg);
gpio_cfg.Pin = GPIO_36;
xc_gpio_init(&gpio_cfg);
gpio_cfg.Pin = GPIO_37;
xc_gpio_init(&gpio_cfg);
gpio_cfg.Pin = GPIO_38;
xc_gpio_init(&gpio_cfg);
#endif
PWM_Timer_InitCfg_t pwm_timer_cfg;
pwm_timer_cfg.src_clk = PWM_CLK_SRC_32M_DIV;
pwm_timer_cfg.clk_div = PWM_CLK_DIV0;
pwm_timer_cfg.timer_mode = PWM_TIMER_MODE_USER_DEFINED;
pwm_timer_cfg.timer_int_mask_en = DISABLE;
pwm_timer_cfg.timer_pwm_en = ENABLE;
pwm_timer_cfg.timer_0to100_pwm_en = ENABLE;
xc_pwm_timer_init(PWM_TIMER0_IDX, &pwm_timer_cfg);
// If the duty cycle resolution is one-thousandth, the maximum frequency = xc_clock_hfclk_in_get()/2/1000.
xc_pwm_timer_set_freq(PWM_TIMER0_IDX, 16000);
xc_pwm_timer_set_dutycycle(PWM_TIMER0_IDX, (double)50.1);
xc_pwm_timer_start(PWM_TIMER0_IDX);
}
#define PWM_TIMER_DEMO 0
#define PWM_OUTPUT_DEMO 1
#define PWM_CAPTURE_DEMO 0
#define PWM_BRAKE_DEMO 0
#define PWM_ENABLE_ADC_DEMO 0
#define PWM_LOWPOWER_DEMO 0
void pwm_demo()
{
#if PWM_TIMER_DEMO
pwm_timer_demo();
#endif
#if PWM_OUTPUT_DEMO
pwm_output_demo();
#endif
#if PWM_CAPTURE_DEMO
pwm_capture_demo();
#endif
#if PWM_BRAKE_DEMO
pwm_brake_demo();
#endif
#if PWM_ENABLE_ADC_DEMO
pwm_enable_adc_demo();
#endif
#if PWM_LOWPOWER_DEMO
pwm_lowpower_demo();
#endif
}
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