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/**
****************************************************************************************
*
* @file em_map_bt.h
*
* @brief Mapping of the different descriptors in the exchange memory
*
* Copyright (C) RivieraWaves 2009-2015
*
*
****************************************************************************************
*/
#ifndef EM_MAP_BT_H_
#define EM_MAP_BT_H_
/**
****************************************************************************************
* @addtogroup EM Exchange Memory
* @ingroup CONTROLLER
* @brief Mapping of the different descriptors in the exchange memory
*
* @{
****************************************************************************************
*/
/*
* INCLUDE FILES
****************************************************************************************
*/
#include "rwip_config.h"
#include <stdint.h> // integer
#include "_reg_em_bt_cs.h"
#include "_reg_em_bt_rxdesc.h"
#include "_reg_em_bt_txdesc.h"
/// Null pointer in EM offset space
#define EM_PTR_NULL (0x0000)
/*
* CONTROL STRUCTURES
****************************************************************************************
*/
/**
* Control Structures area definition
*
* - ACL (N)
* - INQ
* - ISCAN
* - Active slave broadcast
* - Sync train
* - Sync scan
* - Connectionless slave broadcast TX
* - Connectionless slave broadcast RX
*/
#define EM_BT_CS_OFFSET (CO_ALIGN4_HI(EM_BT_OFFSET))
#define EM_BT_CS_NB (MAX_NB_ACTIVE_ACL+5+2*CSB_SUPPORT)
#define EM_BT_CS_END (EM_BT_CS_OFFSET + EM_BT_CS_NB * REG_EM_BT_CS_SIZE)
/**
* Control Structures indexes definition
*/
#define EM_BT_CS_ACL_INDEX(acl) (acl)
#define EM_BT_CS_IDX_TO_LID(idx) (idx)
#define EM_BT_CS_INQ_INDEX (MAX_NB_ACTIVE_ACL)
#define EM_BT_CS_ISCAN_INDEX (EM_BT_CS_INQ_INDEX + 1)
#define EM_BT_CS_ACT_BCST_INDEX (EM_BT_CS_ISCAN_INDEX + 1)
#define EM_BT_CS_STRAIN_INDEX (EM_BT_CS_ACT_BCST_INDEX + 1)
#define EM_BT_CS_SSCAN_INDEX (EM_BT_CS_STRAIN_INDEX + 1)
#define EM_BT_CS_CSB_TX_INDEX (EM_BT_CS_SSCAN_INDEX + 1)
#define EM_BT_CS_CSB_RX_INDEX (EM_BT_CS_CSB_TX_INDEX + 1)
#define EM_BT_CS_INDEX_MAX (EM_BT_CS_CSB_RX_INDEX + 1)
/**
* Frame Format
* Bluetooth state and device activity used for frequency selection and TDD frame format. See section 3.5 for further details
* Note this field is automatically updated by the RW-BT Core when changing from Page to Master Page Response mode.
* - 0000x: Do not use. -
* - 00010: Master connect. Master device
* - 00011: Slave connect. Slave device
* - 00100: Page. Initiator device
* - 00101: Page scan. Responder device
* - 00110: Master page response. -
* - 00111: Slave page response. -
* - 01000: Inquiry. Initiator device
* - 01001: Inquiry response Responder device
* - 01010: Do not use. -
* - 01011: Do not use. -
* - 011xx: Do not use. -
* - 10xxx: Do not use. -
* - 11000: Master Broadcast Master device
* - 11001: Broadcast Scan Slave device
* - 11010: Master Access window. Master device
* - 11011: Slave Access window 1. Slave device
* - 11100: Slave Access window 2. Slave device
* - 11101: Do not use. -
* - 1111x: Do not use -
*/
#define EM_BT_CS_FMT_MST_CONNECT 0x02
#define EM_BT_CS_FMT_SLV_CONNECT 0x03
#define EM_BT_CS_FMT_PAGE 0x04
#define EM_BT_CS_FMT_PAGE_SCAN 0x05
#define EM_BT_CS_FMT_MST_PAGE_RSP 0x06
#define EM_BT_CS_FMT_SLV_PAGE_RSP 0x07
#define EM_BT_CS_FMT_INQUIRY 0x08
#define EM_BT_CS_FMT_INQ_RSP 0x09
#define EM_BT_CS_FMT_MST_BCST 0x18
#define EM_BT_CS_FMT_BCST_SCAN 0x19
#define EM_BT_CS_FMT_MST_ACC_WIN 0x1A
#define EM_BT_CS_FMT_SLV_ACC_WIN1 0x1B
#define EM_BT_CS_FMT_SLV_ACC_WIN2 0x1C
/// Maximum value of RXWINSZ field (8191)
#define EM_BT_CS_RXWINSZ_MAX ((1 << 13)-1)
/// Maximum value of MAXFRMTIME field (8191)
#define EM_BT_CS_MAXFRMTIME_MAX ((1 << 13)-1)
/*
* RX DESCRIPTORS
****************************************************************************************
*/
/**
* RX Descriptors area definition
*/
#define EM_BT_RXDESC_OFFSET (CO_ALIGN4_HI(EM_BT_CS_END))
#define EM_BT_RXDESC_NB (BT_RXDESC_NB)
#define EM_BT_RXDESC_END (EM_BT_RXDESC_OFFSET + EM_BT_RXDESC_NB * REG_EM_BT_RXDESC_SIZE)
/*
* TX DESCRIPTORS
****************************************************************************************
*/
/**
* TX Descriptors area definition
*
* - ACL (2xN)
* - Active slave broadcast
* - FHS
* - EIR
* - Sync train packet
* - Connectionless slave broadcast
*/
#define EM_BT_TXDESC_OFFSET (CO_ALIGN4_HI(EM_BT_RXDESC_END))
#define EM_BT_TXDESC_NB (2*MAX_NB_ACTIVE_ACL + 4 + CSB_SUPPORT)
#define EM_BT_TXDESC_END (EM_BT_TXDESC_OFFSET + EM_BT_TXDESC_NB * REG_EM_BT_TXDESC_SIZE)
#define EM_BT_TXDESC_ACL_INDEX(acl, tog) (2*acl + tog)
#define EM_BT_TXDESC_ACT_BCST_INDEX (2*MAX_NB_ACTIVE_ACL)
#define EM_BT_TXDESC_ISCANFHS_INDEX (EM_BT_TXDESC_ACT_BCST_INDEX + 1)
#define EM_BT_TXDESC_EIR_INDEX (EM_BT_TXDESC_ISCANFHS_INDEX + 1)
#define EM_BT_TXDESC_STP_INDEX (EM_BT_TXDESC_EIR_INDEX + 1)
#define EM_BT_TXDESC_CSB_INDEX (EM_BT_TXDESC_STP_INDEX + 1)
/*
* LMP RX BUFFERS
****************************************************************************************
*/
/// LMP RX buffers area definition
#define EM_BT_LMPRXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_TXDESC_END))
#define EM_BT_LMPRXBUF_NB (EM_BT_RXDESC_NB)
#define EM_BT_LMPRXBUF_SIZE (20)
#define EM_BT_LMPRXBUF_END (EM_BT_LMPRXBUF_OFFSET + EM_BT_LMPRXBUF_NB * EM_BT_LMPRXBUF_SIZE)
/*
* LMP TX BUFFERS
****************************************************************************************
*/
/// LMP TX buffers area definition
#define EM_BT_LMPTXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_LMPRXBUF_END))
#define EM_BT_LMPTXBUF_NB (BT_LMP_BUF_NB_TX)
#define EM_BT_LMPTXBUF_SIZE (24)
#define EM_BT_LMPTXBUF_END (EM_BT_LMPTXBUF_OFFSET + EM_BT_LMPTXBUF_NB * EM_BT_LMPTXBUF_SIZE)
/*
* ISCAN FHS TX BUFFER
****************************************************************************************
*/
/// ISCAN FHS TX buffer area definition
#define EM_BT_ISCANFHSTXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_LMPTXBUF_END))
#define EM_BT_ISCANFHSTXBUF_SIZE (20)
#define EM_BT_ISCANFHSTXBUF_END (EM_BT_ISCANFHSTXBUF_OFFSET + EM_BT_ISCANFHSTXBUF_SIZE)
/*
* PAGE FHS TX BUFFER
****************************************************************************************
*/
/// PAGE FHS TX buffer area definition
#define EM_BT_PAGEFHSTXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_ISCANFHSTXBUF_END))
#define EM_BT_PAGEFHSTXBUF_SIZE (20)
#define EM_BT_PAGEFHSTXBUF_END (EM_BT_PAGEFHSTXBUF_OFFSET + EM_BT_PAGEFHSTXBUF_SIZE)
/*
* EIR TX BUFFER
****************************************************************************************
*/
/// EIR TX buffer area definition
#define EM_BT_EIRTXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_PAGEFHSTXBUF_END))
#define EM_BT_EIRTXBUF_SIZE (240)
#define EM_BT_EIRTXBUF_END (EM_BT_EIRTXBUF_OFFSET + EM_BT_EIRTXBUF_SIZE)
/*
* SAM SUBMAP BUFFER
****************************************************************************************
*/
/// SAM SUBMAP (Local) buffer area definition
#define EM_BT_LOCAL_SAM_SUBMAP_OFFSET (CO_ALIGN4_HI(EM_BT_EIRTXBUF_END))
#define EM_BT_LOCAL_SAM_SUBMAP_SIZE (SAM_TYPE0_SUBMAP_LEN)
#define EM_BT_LOCAL_SAM_SUBMAP_END (EM_BT_LOCAL_SAM_SUBMAP_OFFSET + EM_BT_LOCAL_SAM_SUBMAP_SIZE)
/// SAM MAP (Peer) buffer area definition
#define EM_BT_PEER_SAM_MAP_OFFSET (CO_ALIGN4_HI(EM_BT_LOCAL_SAM_SUBMAP_END))
#define EM_BT_PEER_SAM_MAP_OFF(acl) (EM_BT_PEER_SAM_MAP_OFFSET + (acl * RW_PEER_SAM_MAP_MAX_LEN))
#define EM_BT_PEER_SAM_MAP_SIZE (MAX_NB_ACTIVE_ACL * RW_PEER_SAM_MAP_MAX_LEN) // HW restriction
#define EM_BT_PEER_SAM_MAP_END (EM_BT_PEER_SAM_MAP_OFFSET + EM_BT_PEER_SAM_MAP_SIZE)
/*
* STP TX BUFFER
****************************************************************************************
*/
/// Sync Train Packet TX buffer area definition
#define EM_BT_STPTXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_PEER_SAM_MAP_END))
#define EM_BT_STPTXBUF_SIZE (28)
#define EM_BT_STPTXBUF_END (EM_BT_STPTXBUF_OFFSET + EM_BT_STPTXBUF_SIZE)
/*
* ACL RX BUFFERS
****************************************************************************************
*/
/// ACL RX buffers area definition
#define EM_BT_ACLRXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_STPTXBUF_END))
#define EM_BT_ACLRXBUF_NB (ACL_DATA_BUF_NB_RX)
#define EM_BT_ACLRXBUF_SIZE (1028)
#define EM_BT_ACLRXBUF_END (EM_BT_ACLRXBUF_OFFSET + EM_BT_ACLRXBUF_NB * EM_BT_ACLRXBUF_SIZE)
/*
* ACL TX BUFFERS
****************************************************************************************
*/
/// ACL TX buffers area definition
#define EM_BT_ACLTXBUF_OFFSET (CO_ALIGN4_HI(EM_BT_ACLRXBUF_END))
#define EM_BT_ACLTXBUF_NB (ACL_DATA_BUF_NB_TX)
#define EM_BT_ACLTXBUF_SIZE (1028)
#define EM_BT_ACLTXBUF_END (EM_BT_ACLTXBUF_OFFSET + EM_BT_ACLTXBUF_NB * EM_BT_ACLTXBUF_SIZE)
/*
* AUDIO RX BUFFERS
****************************************************************************************
*/
/// AUDIO buffers area definition
#define EM_BT_AUDIOBUF_OFFSET (CO_ALIGN4_HI(EM_BT_ACLTXBUF_END))
#define EM_BT_AUDIOBUF_NB (MAX_NB_SYNC)
#define EM_BT_AUDIOBUF_SIZE (2*1080) // (4*1080) !!! Maximum configuration (2 x eSCO-3EV5) not possible on Bubble
#define EM_BT_AUDIOBUF_END (EM_BT_AUDIOBUF_OFFSET + EM_BT_AUDIOBUF_NB * EM_BT_AUDIOBUF_SIZE)
#define EM_BT_AUDIOBUF_OFF(sco) (EM_BT_AUDIOBUF_OFFSET + (sco * EM_BT_AUDIOBUF_SIZE))
/*
* END
****************************************************************************************
*/
#define EM_BT_END (EM_BT_AUDIOBUF_END)
/// @} EM
#endif // EM_MAP_BT_H_
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/**
****************************************************************************************
*
* @file rwbt.h
*
* @brief RWBT interrupt definitions
*
* Copyright (C) RivieraWaves 2009-2015
*
*
****************************************************************************************
*/
#ifndef _RW_BT_H_
#define _RW_BT_H_
/**
****************************************************************************************
* @addtogroup ROOT
* @brief Entry points of the BT stack
*
* This module contains the primitives that allow an application accessing and running the
* BT protocol stack.
*
*
* @{
****************************************************************************************
*/
#include <stdint.h> // standard integer definitions
#include <stdbool.h> // standard boolean definitions
#include "rwip_config.h" // stack configuration
#include "arch.h"
/*
* FUNCTION DECLARATION
*****************************************************************************************
*/
/**
****************************************************************************************
* @brief Initializes the RW BT SW.
*
****************************************************************************************
*/
void rwbt_init(void);
/**
****************************************************************************************
* @brief Reset the RW BT SW.
*
****************************************************************************************
*/
void rwbt_reset(void);
/**
****************************************************************************************
* @brief The RWBT core interrupt handler.
*
* Handles both the clock interrupt and the Rx Packet interrupt (when activated)
* In the case of a clock interrupt, check if there are active links and which one
* has the highest priority.
*
****************************************************************************************
*/
__BTIRQ void rwbt_isr(void);
///@} ROOT
#endif // _RW_BT_H_
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/**
****************************************************************************************
*
* @file rwbt_config.h
*
* @brief Configuration of the BT protocol stack (max number of supported connections,
* type of partitioning, etc.)
*
* Copyright (C) RivieraWaves 2009-2015
*
*
****************************************************************************************
*/
#ifndef RWBT_CONFIG_H_
#define RWBT_CONFIG_H_
/**
****************************************************************************************
* @addtogroup ROOT
* @{
*
* @name RWBT Stack Configuration
* @{
****************************************************************************************
*/
/*
* INCLUDE FILES
****************************************************************************************
*/
/*
* DEFINES
****************************************************************************************
*/
/******************************************************************************************/
/* -------------------------- GENERAL SETUP --------------------------------------*/
/******************************************************************************************/
/// Maximum number of ACL links
#define MAX_NB_ACTIVE_ACL CFG_CON_ACL
/// BT Heap size
#define BT_HEAP_MSG_SIZE (256 + 256 * MAX_NB_ACTIVE_ACL)
#define BT_HEAP_ENV_SIZE (1024 + 1024 * MAX_NB_ACTIVE_ACL)
/// Number of BT tasks
#define BT_TASK_SIZE 4
/// Number of RX descriptors
#define BT_RXDESC_NB (4)
/// Number of RX/TX ACL data buffers
#define ACL_DATA_BUF_NB_RX (BT_RXDESC_NB + 2)
#define ACL_DATA_BUF_NB_TX (MAX_NB_ACTIVE_ACL + 2)
/// Guard space reserved for HCI header in ACL RX buffers
#define ACL_RX_BUF_HEADER_SPACE (HCI_ACL_HDR_LEN + 1)
/// Number of TX LMP buffers
#if (MAX_NB_ACTIVE_ACL > 3)
#define BT_LMP_BUF_NB_TX (2*MAX_NB_ACTIVE_ACL)
#else // (MAX_NB_ACTIVE_ACL > 3)
#define BT_LMP_BUF_NB_TX (7)
#endif // (MAX_NB_ACTIVE_ACL > 3)
/// Maximum ACL Data Packet Size
#define ACL_DATA_BUF_SIZE DH5_3_PACKET_SIZE
/// Normal Rx window size
#define NORMAL_WIN_SIZE 26
/// Range of key size supported by the FW
#define ENC_KEY_SIZE_MAX 16
#define ENC_KEY_SIZE_MIN 7
#define ENC_KEY_SIZE_MASK 0xFFFF
/// Inquiry response TX power (the value code depends on radio used)
#define INQ_RSP_TX_PWR rwip_rf.txpwr_max
/// Size of the inquiry result filtering list
#define INQ_FILT_LEN 10
/******************************************************************************************/
/* -------------------------- SYNC SETUP ------------------------------------------*/
/******************************************************************************************/
/// Maximum number of Synchronous connections (0 to 2)
#define MAX_NB_SYNC CFG_CON_SCO
/// Flag indicating if debug mode is activated or not
#if defined (CFG_VOHCI) && (MAX_NB_SYNC > 0)
#define VOICE_OVER_HCI 1
#else
#define VOICE_OVER_HCI 0
#endif // defined (CFG_VOHCI) && (MAX_NB_SYNC > 0)
#if VOICE_OVER_HCI
/// Number of Synchronous TX buffers used for one VoHCI link
#define SYNC_TX_BUF_NB 4
/// Number of Synchronous RX buffers used for one VoHCI link
#define SYNC_RX_BUF_NB 3
/// Guard space reserved for HCI header in Sync RX buffers
#define SYNC_RX_BUF_HEADER_SPACE (HCI_SYNC_HDR_LEN + 1)
#endif //(VOICE_OVER_HCI)
/// Synchronous link negotiation number of retries
#define SYNC_NEGO_TRY 1
/******************************************************************************************/
/* ------------------------- FIRMWARE SETUP ---------------------------------------*/
/******************************************************************************************/
///Number of HCI Event filter
#define HCI_FILTER_NB 0x5
/*
* Test mode option to be able to enter test mode as defined
* in part I1: BT Test Mode, of the BT specification.
*/
/// Test mode support
#define TEST_MODE 1
/******************************************************************************************/
/* ------------------------- COEXISTENCE SETUP ------------------------------------*/
/******************************************************************************************/
/// WLAN Coexistence
#define RW_BT_WLAN_COEX RW_WLAN_COEX
///WLAN test mode
#define RW_BT_WLAN_COEX_TEST RW_WLAN_COEX_TEST
/// MWS Coexistence
#define RW_BT_MWS_COEX RW_MWS_COEX
///WLAN test mode
#define RW_BT_MWS_COEX_TEST RW_MWS_COEX_TEST
///To let the HW using the default values set in the registers
#define RW_BT_PTI_PRIO_AUTO 31
/// Coexistence Packet traffic information - Index Definitions
enum rwbt_pti_config_idx
{
BT_PTI_PAGERES_IDX ,
BT_PTI_MCONPEND_IDX ,
BT_PTI_PSCANRES_IDX ,
BT_PTI_SCONPEND_IDX ,
BT_PTI_MSSWITCH_IDX ,
BT_PTI_SNIFFANC_IDX ,
BT_PTI_BEACON_IDX ,
BT_PTI_SNIFFATT_IDX ,
BT_PTI_ACCWIN_IDX ,
BT_PTI_POLLINT_IDX ,
BT_PTI_PAGE_IDX ,
BT_PTI_PSCAN_IDX ,
BT_PTI_INQ_IDX ,
BT_PTI_INQSCAN_IDX ,
BT_PTI_INQRES_IDX ,
BT_PTI_SCORSVD_IDX ,
BT_PTI_SCORETX_IDX ,
BT_PTI_ACLTX_IDX ,
BT_PTI_ACLRETX_IDX ,
BT_PTI_LMPTX_IDX ,
BT_PTI_BCAST_IDX ,
BT_PTI_CONNECT_IDX ,
BT_PTI_IDX_MAX
};
/******************************************************************************************/
/* ------------------------- AFH SETUP ------------------------------------*/
/******************************************************************************************/
/// Minimum classification interval requested to slave devices (in slots) (2 secs)
#define BT_AFH_CH_CLASS_INT_MIN 0x0C80
/// Maximum classification interval requested to slave devices (in slots) (4 secs)
#define BT_AFH_CH_CLASS_INT_MAX 0x1900
/// AFH update period (in sec)
#define BT_AFH_UPDATE_PERIOD 4
/// Maximum duration without receiving a packet before considering a channel quality unknown (in slots) (2 secs)
#define BT_AFH_ASSESS_VALID_TO 0x1900
/// Maximum duration without receiving a packet before reintroducing a channel to the map (in slots) (20 secs)
#define BT_AFH_REASSESS_TO 0x7D00
/// Maximum counter value for channel assessment
#define BT_AFH_ASSESS_COUNT_MAX 4
/// Counter threshold to consider a channel good
#define BT_AFH_ASSESS_COUNT_THR_GOOD 2
/// Counter threshold to consider a channel bad
#define BT_AFH_ASSESS_COUNT_THR_BAD -2
/// Minimum counter value for channel assessment
#define BT_AFH_ASSESS_COUNT_MIN -4
/******************************************************************************************/
/* -------------------------- CSB SETUP ----------------------------------------*/
/******************************************************************************************/
/// Support of Connectionless Slave Broadcast
#if defined (CFG_CSB)
#define CSB_SUPPORT 1
#else
#define CSB_SUPPORT 0
#endif // defined (CFG_CSB)
/******************************************************************************************/
/* -------------------------- PCA SETUP ----------------------------------------*/
/******************************************************************************************/
/// Support of Piconet Clock Adjust
#if defined (CFG_PCA)
#define PCA_SUPPORT 1
#else
#define PCA_SUPPORT 0
#endif // defined (CFG_PCA)
/// PCA update period (in sec)
#define BT_PCA_UPDATE_PERIOD 30
/// PCA request clk_adj_slots in addition to clk_adj_us: enable=1, disable=0
#define BT_PCA_CLK_ADJ_SLOTS 0 // No mandate to request a clk_adj_slots currently - for test only
/******************************************************************************************/
/* ------------------------ CONNECTION HANDLE ----------------------------------------*/
/******************************************************************************************/
/// Bit set for BT ACL connection handles
#define BT_ACL_CONHDL_BIT (0x80)
#define BT_ACL_CONHDL_MIN (BT_ACL_CONHDL_BIT)
#define BT_ACL_CONHDL_MAX (BT_ACL_CONHDL_BIT + MAX_NB_ACTIVE_ACL - 1)
/// Bit set for BT SCO connection handles
#define BT_SYNC_CONHDL_OFF (8)
#define BT_SYNC_CONHDL_MSK (((1 << MAX_NB_SYNC) - 1) << BT_SYNC_CONHDL_OFF)
#define BT_SYNC_CONHDL_BIT(sco_link_id) ((sco_link_id + 1) << BT_SYNC_CONHDL_OFF)
#define BT_SYNC_CONHDL_LID(sco_conhdl) ((sco_conhdl >> BT_SYNC_CONHDL_OFF) - 1)
#define BT_SYNC_CONHDL(link_id, sco_link_id) (BT_ACL_CONHDL_MIN + link_id + BT_SYNC_CONHDL_BIT(sco_link_id))
/// @} BT Stack Configuration
/// @} ROOT
#endif //RWBT_CONFIG_H_