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Stair56E UART project

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This commit is contained in:
吴琪
2026-08-05 19:07:52 +08:00
parent 7ca1af130d
commit f5654b70cc
2500 changed files with 619007 additions and 282610 deletions
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component/rf24/Drivers/xc6xxx_rf_ADV/xc6xxx_rf_ADV.c
+217 -135
View File
@@ -1,135 +1,217 @@
/*
* @Descripttion:
* @version:
* @Author: sueRimn
* @Date: 2023-12-12 14:24:01
* @LastEditors: sueRimn
* @LastEditTime: 2023-12-13 10:32:28
*/
/*!
* \file rf_2_4g.c
*
* \brief Target RF 2.4g implementation
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include "xc6xxx_rf_ADV.h"
#include "xc6xxx_rf_2_4g.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
extern int sendchar(int c);
extern uint8_t recv_len ;
extern uint8_t recv_buf[BUFF_LEN];
extern uint8_t recv_adv_buf[ADV_LENGTH];
/*------------------------------------------------------------------------------------
Functions
-------------------------------------------------------------------------------------*/
/**
* @brief RF ADV Initialization
* @param void
*
* @retval void
*/
void rf24g_adv_init(void)
{
/* Rf modem init*/
rf24g_modem_init();
/* Set up 2.4G RF modem*/
rf24g_config();
set_rf_dynpd(XINCX_2_4G_DYNPD);
/* Set PTX address */
set_rf_txaddr(TX_ADDR_L_VAL, TX_ADDR_H_VAL);
/* Set PRX address */
set_rf_pipe0_rxaddr(RX_ADDR_L_VAL, RX_ADDR_H_VAL);
/* Set address width */
set_rf_tx_addr_width(XINCX_RF_TX_ADDR_WIDTH);
/* Set transfer rate */
set_rf_DR(XINCX_RF_TRANS_RATE);
/* Set CRC */
set_rf_crc(XINCX_RF_CRC_ENABLE, XINCX_RF_CRC_BIT);
/* Set data frame format */
set_rf_feature(XINCX_ADV_LONG_PLD, XINCX_ADV_FEC, XINCX_ADV_WHITEN,
XINCX_ADV_DPL, XINCX_ADV_ACK_PAY, XINCX_ADV_DYN_ACK);
/* Set Payload */
set_rf_pipe_rx_payLen(PIPE0_LEN, PIPE1_LEN, PIPE2_LEN, PIPE3_LEN, PIPE4_LEN,
PIPE5_LEN);
/* Set mode */
set_rf_mode(XINCX_ADV_MODE);
/* Set transmission power */
set_rf_power(XINCX_POWER);
/* RC filtering calibration */
rf_rc_calib();
}
/**
* @brief RF ADV packet whiten
* @param uint8_t * - len
* @return uint32_t - blecrc
*/
uint32_t rf_adv_packet_whiten(uint8_t *len)
{
for (int i = 0; i < recv_len; i++)
recv_adv_buf[i] = reverseBits(recv_adv_buf[i]);
ble_whiten(recv_adv_buf, recv_len, bleWhitenStart(XINCX_ADV_CHANNEL));
for (int i = 0; i < recv_len; i++)
recv_adv_buf[i] = reverseBits(recv_adv_buf[i]);
*len = (recv_adv_buf[1] > (ADV_LENGTH - 5)) ? (ADV_LENGTH - 5)
: recv_adv_buf[1];
uint32_t blecrc = (recv_adv_buf[*len + 5 - 1] << 16) +
(recv_adv_buf[*len + 5 - 2] << 8) +
recv_adv_buf[*len + 5 - 3];
recv_adv_buf[*len + 5 - 1] = recv_adv_buf[*len + 5 - 2] =
recv_adv_buf[*len + 5 - 3] = 0x55;
ble_crc(recv_adv_buf, *len + 5 - 3, recv_adv_buf + *len + 5 - 3);
return blecrc;
}
/**
* @brief RF ADV software CRC determination
* @param uint8_t * - adv_buff
* @param uint8_t * - len
* @param uint32_t - blecrc
* @return uint8_t - 0
*/
uint8_t rf_adv_crc(uint8_t *adv_buff, uint8_t *len, uint32_t blecrc)
{
if (blecrc == ((adv_buff[*len + 5 - 1] << 16) +
(adv_buff[*len + 5 - 2] << 8) + adv_buff[*len + 5 - 3]))
return 1;
else
return 0;
}
/*
* @Descripttion:
* @version:
* @Author: sueRimn
* @Date: 2023-12-12 14:24:01
* @LastEditors: sueRimn
* @LastEditTime: 2023-12-13 10:32:28
*/
/*!
* \file rf_2_4g.c
*
* \brief Target RF 2.4g implementation
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include "xc6xxx_rf_ADV.h"
#include "xc6xxx_rf_2_4g.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
extern int sendchar(int c);
extern uint8_t recv_adv_buf[ADV_LENGTH];
/*------------------------------------------------------------------------------------
Functions
-------------------------------------------------------------------------------------*/
/**
* @brief RF ADV Initialization
* @param void
*
* @retval void
*/
void rf24g_adv_init(void)
{
/* Rf modem init*/
rf24g_modem_init();
/* Set up 2.4G RF modem*/
rf24g_config();
set_rf_dynpd(XINCX_2_4G_DYNPD);
/* Set PTX address */
set_rf_txaddr(TX_ADDR_L_VAL, TX_ADDR_H_VAL);
/* Set PRX address */
set_rf_pipe0_rxaddr(RX_ADDR_L_VAL, RX_ADDR_H_VAL);
/* Set address width */
set_rf_tx_addr_width(XINCX_RF_TX_ADDR_WIDTH);
/* Set transfer rate */
set_rf_DR(XINCX_RF_TRANS_RATE);
/* Set retransmission delay and retransmission frequency */
set_rf_retr(XINCX_2_4G_RETRANS_CNT, XINCX_2_4G_RETRANS_DELAY);
/* Set CRC */
set_rf_crc(XINCX_2_4G_CRC_BYTE);
/* Set data frame format */
set_rf_feature(XINCX_ADV_LONG_PLD, XINCX_ADV_FEC, XINCX_ADV_WHITEN, XINCX_ADV_DPL, XINCX_ADV_ACK_PAY,
XINCX_ADV_DYN_ACK);
/* Set Payload */
set_rf_pipe_rx_payLen(PIPE0_LEN, PIPE1_LEN, PIPE2_LEN, PIPE3_LEN, PIPE4_LEN, PIPE5_LEN);
/* Set ack pipe*/
set_rf_en_pipe(XINCX_RF_PIPE_ENABLE);
/* Set transmission power */
set_rf_power(XINCX_POWER);
/* Set mode */
set_rf_mode(XINCX_ADV_MODE);
/* RC filtering calibration */
rf_rc_calib();
}
/**
* @brief RF ADV packet whiten
* @param uint8_t * - len
* @return uint32_t - blecrc
*/
uint32_t rf_adv_packet_whiten(uint8_t *len)
{
for (int i = 0; i < recv_len; i++)
recv_adv_buf[i] = reverseBits(recv_adv_buf[i]);
uint16_t channel = (XC_RF_2_4G->RF_CH & 0x3fff) + 1;
ble_whiten(recv_adv_buf, recv_len, bleWhitenStart(channel));
for (int i = 0; i < recv_len; i++)
recv_adv_buf[i] = reverseBits(recv_adv_buf[i]);
*len = (recv_adv_buf[1] > (ADV_LENGTH - 5)) ? (ADV_LENGTH - 5) : recv_adv_buf[1];
uint32_t blecrc =
(recv_adv_buf[*len + 5 - 1] << 16) + (recv_adv_buf[*len + 5 - 2] << 8) + recv_adv_buf[*len + 5 - 3];
recv_adv_buf[*len + 5 - 1] = recv_adv_buf[*len + 5 - 2] = recv_adv_buf[*len + 5 - 3] = 0x55;
ble_crc(recv_adv_buf, *len + 5 - 3, recv_adv_buf + *len + 5 - 3);
return blecrc;
}
/**
* @brief RF ADV software CRC determination
* @param uint8_t * - adv_buff
* @param uint8_t * - len
* @param uint32_t - blecrc
* @return uint8_t - 0
*/
uint16_t rf_adv_crc(uint8_t *adv_buff, uint8_t *len, uint32_t blecrc)
{
if (blecrc == ((adv_buff[*len + 5 - 1] << 16) + (adv_buff[*len + 5 - 2] << 8) + adv_buff[*len + 5 - 3]))
return 1;
else
return 0;
}
/**
* @brief Reverse bits
* @param uint8_t - input
* @retval uint8_t - temp
*/
uint8_t reverseBits(uint8_t input)
{
uint8_t i = 0, temp = 0;
for (; i < 8; i++) {
temp <<= 1;
temp = ((input >> i) & 0x01) ? (temp | 0x01) : (temp | 0x00);
}
return temp;
}
/**
* @brief Ble whiten channel
* @param uint16_t - fre
* @retval uint8_t - temp | 2
*/
uint8_t bleWhitenStart(uint16_t Fre)
{
uint8_t chan = (Fre == 2426) ? 38 : ((Fre == 2402) ? 37 : 39);
return reverseBits(chan) | 2;
}
/**
* @brief Ble whiten
* @param uint8_t * - data
* @param uint8_t - len
* @param uint8_t - whitenCoeff
* @retval void
*/
void ble_whiten(uint8_t *data, uint8_t len, uint8_t whitenCoeff)
{
uint8_t m;
while (len--) {
for (m = 1; m; m <<= 1) {
if (whitenCoeff & 0x80) {
whitenCoeff ^= 0x11;
(*data) ^= m;
}
whitenCoeff <<= 1;
}
// Flip variables
*data = reverseBits(*data);
data++;
}
}
/**
* @brief
* @param void
* @retval void
*/
void ble_crc(uint8_t *data, uint8_t len, uint8_t *dst)
{
// calculating the CRC based on a LFSR
uint8_t i, temp, tempData;
while (len--) {
tempData = *data++;
for (i = 0; i < 8; i++, tempData >>= 1) {
temp = dst[0] >> 7;
dst[0] <<= 1;
if (dst[1] & 0x80) {
dst[0] |= 1;
}
dst[1] <<= 1;
if (dst[2] & 0x80) {
dst[1] |= 1;
}
dst[2] <<= 1;
if (temp != (tempData & 1)) {
dst[2] ^= 0x5B;
dst[1] ^= 0x06;
}
}
}
dst[2] = reverseBits(dst[2]);
dst[1] = reverseBits(dst[1]);
dst[0] = reverseBits(dst[0]);
}
component/rf24/Drivers/xc6xxx_rf_ADV/xc6xxx_rf_ADV.h
+101 -90
View File
@@ -1,90 +1,101 @@
/*
* @Descripttion:
* @version:
* @Author: sueRimn
* @Date: 2023-12-12 14:24:01
* @LastEditors: sueRimn
* @LastEditTime: 2023-12-13 13:56:02
*/
/*!
* \file rf_2_4g.h
*
* \brief The head file of rf_2_4g.c
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __XC6XXX_RF_ADV_H__
#define __XC6XXX_RF_ADV_H__
#ifdef __cplusplus
extern "C"
{
#endif
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include "rf_adv_config.h"
#include "xc6xxx.h"
#include "xc6xxx_rf_2_4g.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
#define PIPE0_LEN XINCX_ADV_PIPE0_LEN
#define PIPE1_LEN XINCX_ADV_PIPE1_LEN
#define PIPE2_LEN XINCX_ADV_PIPE2_LEN
#define PIPE3_LEN XINCX_ADV_PIPE3_LEN
#define PIPE4_LEN XINCX_ADV_PIPE4_LEN
#define PIPE5_LEN XINCX_ADV_PIPE5_LEN
#define MAC_ADDR_0 XINC_ADV_MAC_ADDR_0
#define MAC_ADDR_1 XINC_ADV_MAC_ADDR_1
#define MAC_ADDR_2 XINC_ADV_MAC_ADDR_2
#define MAC_ADDR_3 XINC_ADV_MAC_ADDR_3
#define MAC_ADDR_4 XINC_ADV_MAC_ADDR_4
#define MAC_ADDR_5 XINC_ADV_MAC_ADDR_5
#define TX_ADDR_L_VAL XINCX_ADV_ADDR_L
#define TX_ADDR_H_VAL XINCX_ADV_ADDR_H
#define RX_ADDR_L_VAL TX_ADDR_L_VAL
#define RX_ADDR_H_VAL TX_ADDR_H_VAL
#define ADV_LENGTH XINCX_ADV_PIPE0_LEN
/*------------------------------------------------------------------------------------
Exported Functions
-------------------------------------------------------------------------------------*/
typedef enum
{
CRC_ERROR = 0,
CRC_OK,
CRC_IDLE
} rf_adv_crc_stat;
void rf24g_adv_init(void);
uint32_t rf_adv_packet_whiten(uint8_t *len);
uint8_t rf_adv_crc(uint8_t *adv_buff, uint8_t *len, uint32_t blecrc);
#ifdef __cplusplus
}
#endif
#endif /* __XC6XXX_RF_ADV_H__ */
/*
* @Descripttion:
* @version:
* @Author: sueRimn
* @Date: 2023-12-12 14:24:01
* @LastEditors: sueRimn
* @LastEditTime: 2023-12-13 13:56:02
*/
/*!
* \file rf_2_4g.h
*
* \brief The head file of rf_2_4g.c
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __XC6XXX_RF_ADV_H__
#define __XC6XXX_RF_ADV_H__
#ifdef __cplusplus
extern "C"
{
#endif
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include "rf_adv_config.h"
#include "xc6xxx.h"
#include "xc6xxx_rf_2_4g.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
#define PIPE0_LEN XINCX_ADV_PIPE0_LEN
#define PIPE1_LEN XINCX_ADV_PIPE1_LEN
#define PIPE2_LEN XINCX_ADV_PIPE2_LEN
#define PIPE3_LEN XINCX_ADV_PIPE3_LEN
#define PIPE4_LEN XINCX_ADV_PIPE4_LEN
#define PIPE5_LEN XINCX_ADV_PIPE5_LEN
#define MAC_ADDR_0 XINC_ADV_MAC_ADDR_0
#define MAC_ADDR_1 XINC_ADV_MAC_ADDR_1
#define MAC_ADDR_2 XINC_ADV_MAC_ADDR_2
#define MAC_ADDR_3 XINC_ADV_MAC_ADDR_3
#define MAC_ADDR_4 XINC_ADV_MAC_ADDR_4
#define MAC_ADDR_5 XINC_ADV_MAC_ADDR_5
#define TX_ADDR_L_VAL XINCX_ADV_ADDR_L
#define TX_ADDR_H_VAL XINCX_ADV_ADDR_H
#define RX_ADDR_L_VAL TX_ADDR_L_VAL
#define RX_ADDR_H_VAL TX_ADDR_H_VAL
#define ADV_LENGTH XINCX_ADV_PIPE0_LEN
#define RF_ADV_BASE 2400U
#define RF_ADV_CHANNEL_37 2
#define RF_ADV_CHANNEL_38 26
#define RF_ADV_CHANNEL_39 80
/*------------------------------------------------------------------------------------
Exported Functions
-------------------------------------------------------------------------------------*/
typedef enum
{
CRC_ERROR = 0,
CRC_OK,
CRC_IDLE
} rf_adv_crc_stat;
void rf24g_adv_init(void);
uint32_t rf_adv_packet_whiten(uint8_t *len);
uint16_t rf_adv_crc(uint8_t *adv_buff, uint8_t *len, uint32_t blecrc);
uint8_t reverseBits(uint8_t input);
uint8_t bleWhitenStart(uint16_t Fre);
void ble_whiten(uint8_t *data, uint8_t len, uint8_t whitenCoeff);
void ble_crc(uint8_t *data, uint8_t len, uint8_t *dst);
#ifdef __cplusplus
}
#endif
#endif /* __XC6XXX_RF_ADV_H__ */