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Stair56E UART project

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吴琪
2026-08-05 19:07:52 +08:00
parent 7ca1af130d
commit f5654b70cc
2500 changed files with 619007 additions and 282610 deletions
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project/example/2.4g/RF24_ACK_Flash/app/src/main.c
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/*!
* \file main.c
*
* \brief Target main implementation
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include "main.h"
#include "xc6xxx_rf_2_4g.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
#if !USE_XIP
uint8_t spi_idx = SPI0_IDX;
#else
uint8_t spi_idx = SPI1_IDX;
#endif
uint8_t rx_flash_buff[BUFF_LEN] = {0};
uint8_t rx_timerout_flag = false;
uint32_t tx_cnt =0;
uint32_t rx_cnt = 0;
uint32_t rx_err_cnt = 0;
uint8_t send_spi_buff[BUFF_LEN] = {0};
uint16_t tx_len = 0;
uint16_t rx_len = 0;
uint8_t tx_buff[256] = {0};
uint8_t rx_buff[256] = {0};
bool rf_send_timer_flag = false;
/*------------------------------------------------------------------------------------
Func Prototype
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Functions
-------------------------------------------------------------------------------------*/
/**
****************************************************************************************
* @brief
*
* @param[in]
* @param[in]
****************************************************************************************
*/
/**
****************************************************************************************
* @brief Clock Initialization
*
* @param[in]
* @param[in]
****************************************************************************************
*/
void clock_init(void)
{
CLOCK_InitCfg_t clock_cfg;
clock_cfg.hfclk_src = CLOCK_HFCLK_SRC_XTAL;
clock_cfg.hfclk_in = CLOCK_HFCLK_IN_32M;
#if (RC_32K)
clock_cb.lfclk_src = CLOCK_LFCLK_SRC_RC;
#endif //(RC_32K)
#if (XTAL_32K)
clock_cb.lfclk_src = CLOCK_LFCLK_SRC_XTAL;
#endif // (XTAL_32K)
#if (XTAL_32768K)
clock_cb.lfclk_src = CLOCK_LFCLK_SRC_XTAL;
#endif // (XTAL_32768K)
#ifdef XC62XX
clock_cb.lfclk_src = CLOCK_LFCLK_SRC_RC;
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32K;
#else
if (clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_XTAL) {
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32768;
} else if (clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_RC) {
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32K;
}
#endif
xc_clock_init_cfg(&clock_cfg);
SysTick_Config(xc_clock_hfclk_in_get() / 100);
SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
}
/**
* @brief Timer0_Callback
* @param void * - context
*
* @retval void
*/
void timer0_callback(void *context)
{
#if !(XINCX_RF_MODE)
rf_send_timer_flag = true;
#else
rx_timerout_flag = true;
#endif //!(XINCX_RF_MODE)
}
/**
* @brief timer init
* @param TIMER_TypeDef * - timer_id
* @param uint32_t - timer_cnt
* @retval void
*/
void timer_init(uint8_t timer_id, uint32_t timer_cnt)
{
Timer_InitCfg_t timer_cfg;
timer_cfg.timer_src_clk = TIMER_CLK_SRC_32M_DIV;
timer_cfg.timer_div_clk = TIMER_DIV_CLK_16MHzOr16K;
timer_cfg.timer_mode = TIMER_MODE_CYCLE;
xc_timer_init(timer_id, &timer_cfg);
#if !(XINCX_RF_MODE)
uint32_t Us = timer_cnt * 1000;
xc_timer_set_value(timer_id, Us);
xc_timer_start(timer_id);
#endif //!(XINCX_RF_MODE)
}
/**
* @brief Rf 2.4g dump log
* @param void
*
* @retval void
*/
#ifdef DEBUG_LOG
void rf_dump_log(void)
{
LOGI("***************** 2.4G Param ******************\n");
LOGI("CFG_TOP: 0x%08x\r\n", XC_RF_2_4G->CFG_TOP);
LOGI("EN_AA: 0x%08x\r\n", XC_RF_2_4G->EN_AA);
LOGI("EN_RXADDR: 0x%08x\r\n", XC_RF_2_4G->EN_RXADDR);
LOGI("SETUP_AW: 0x%08x\r\n", XC_RF_2_4G->SETUP_AW);
LOGI("SETUP_RETR: 0x%08x\r\n", XC_RF_2_4G->SETUP_RETR);
LOGI("RF_CH: 0x%08x\r\n", XC_RF_2_4G->RF_CH);
LOGI("SETUP_RF: 0x%08x\r\n", XC_RF_2_4G->SETUP_RF);
LOGI("STATUS: 0x%08x\r\n", XC_RF_2_4G->STATUS);
LOGI("OBSERVE_TX: 0x%08x\r\n", XC_RF_2_4G->OBSERVE_TX);
LOGI("RSSI: 0x%08x\r\n", XC_RF_2_4G->RSSI);
LOGI("RX_ADDR_P0: 0x%02x %08x\r\n", 0xFF & (XC_RF_2_4G->RX_ADDR_P0_H), XC_RF_2_4G->RX_ADDR_P0_L);
LOGI("RX_ADDR_P1: 0x%02x %08x\r\n", 0xFF & (XC_RF_2_4G->RX_ADDR_P1_H), XC_RF_2_4G->RX_ADDR_P1_L);
LOGI("RX_ADDR_P2TOP5:0x%08x\r\n", XC_RF_2_4G->RX_ADDR_P2TOP5);
LOGI("BER_RESULT: 0x%08x%08x\r\n", XC_RF_2_4G->BER_ERR_CNT, XC_RF_2_4G->BER_RECV_CNT);
LOGI("AGC_SETTING: 0x%08x\r\n", XC_RF_2_4G->AGC_SETTING);
LOGI("PGA_SETTING: 0x%02x %08x\r\n", ((XC_RF_2_4G->TX_ADDR_H) & 0xFF00) >> 8, XC_RF_2_4G->PGA_SETTING);
LOGI("TX_ADDR: 0x%02x %08x\r\n", ((XC_RF_2_4G->TX_ADDR_H) & 0xFF), XC_RF_2_4G->TX_ADDR_L);
LOGI("RX_PW_PX: 0x%04x %08x\r\n", 0xFFFF & (XC_RF_2_4G->RX_PW_Px_H), XC_RF_2_4G->RX_PW_Px_L);
LOGI("STATUS_FIFO: 0x%08x\r\n", XC_RF_2_4G->STATUS_FIFO);
LOGI("RSSIREC: 0x%08x\r\n", XC_RF_2_4G->RSSIREC);
LOGI("TXPROC_CFG: 0x%08x\r\n", XC_RF_2_4G->TXPROC_CFG);
LOGI("RXPROC_CFG: 0x%02x %08x\r\n", 0xFF & (XC_RF_2_4G->RXPROC_CFG_H), XC_RF_2_4G->RXPROC_CFG_L);
LOGI("DYNPD: 0x%08x\r\n", XC_RF_2_4G->DYNPD);
LOGI("FEATURE: 0x%08x\r\n", XC_RF_2_4G->FEATURE);
LOGI("PGA_SETTING_H: 0x%08x\r\n", XC_RF_2_4G->TX_ADDR_H);
#ifdef XC62XX
LOGI("HW_CONFIG: 0x%08x\r\n", XC_RF_2_4G->HW_CONFIG);
LOGI("PBT_CONFIG: 0x%08x\r\n", XC_RF_2_4G->PBT_CONFIG);
LOGI("PBT_TIMER: 0x%08x\r\n", XC_RF_2_4G->PBT_TIMER);
LOGI("PBT_SYNC_TIME: 0x%08x\r\n", XC_RF_2_4G->PBT_SYNC_TIME);
LOGI("PBT_TX_HEAD: 0x%08x\r\n", XC_RF_2_4G->PBT_TX_HEAD);
LOGI("PBT_RX_HEAD: 0x%08x\r\n", XC_RF_2_4G->PBT_RX_HEAD);
LOGI("PBT_AUTO_TRX_TIME: 0x%08x\r\n", XC_RF_2_4G->PBT_AUTO_TRX_TIME);
#endif
LOGI("TX_POWER 0x%08x\r\n", (XC_BT_RF->ana21_reg_l >> 6) & 0x3f);
LOGI("ana11_reg_l: 0x%08x\r\n", XC_BT_RF->ana11_reg_l);
LOGI("***********************************************\n");
LOGI("\r\n");
}
#endif
/**
* @brief RF 2.4g data config
* @param uint8_t * - buff
* uint8 - len
* @retval uint8_t - 0
*/
uint8_t rf_data_config(uint8_t *buff, uint8_t len)
{
if (len == 0) {
return RF_FAIL;
}
for (uint8_t i = 0; i < len; i++) {
buff[i] = i;
}
return RF_SUCCESS;
}
/**
* @brief Spi init
* @param void
* @retval void
*/
void rf_spi_init(void)
{
#if (!USE_XIP)
SPI_InitCfg_t spi_cfg = {0};
if (spi_idx == SPI1_IDX) {
GPIO_InitCfg_t gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux0;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
gpio_cfg.FunSel = SSI1_CLK;
gpio_cfg.Int = NOT_INT;
gpio_cfg.Pull = GPIO_PULLDOWN;
gpio_cfg.Pin = GPIO_14;
xc_gpio_init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_SSN;
gpio_cfg.Pin = GPIO_15;
xc_gpio_init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_TX;
gpio_cfg.Pin = GPIO_16;
xc_gpio_init(&gpio_cfg);
gpio_cfg.FunSel = SSI1_RX;
gpio_cfg.Pin = GPIO_17;
xc_gpio_init(&gpio_cfg);
} else if (spi_idx == SPI2_IDX) {
GPIO_InitCfg_t gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux2;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Int = NOT_INT;
gpio_cfg.Pull = GPIO_PULLDOWN;
gpio_cfg.Pin = GPIO_14; // clk
xc_gpio_init(&gpio_cfg);
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Pin = GPIO_15; // ssn
xc_gpio_init(&gpio_cfg);
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Pin = GPIO_16;
xc_gpio_init(&gpio_cfg); // mosi
gpio_cfg.FunSel = GPIO_Dx;
gpio_cfg.Pin = GPIO_17;
xc_gpio_init(&gpio_cfg); // miso
}
spi_cfg.Mode = SPI_MODE_MASTER;
spi_cfg.DataSize = SSI_CTRL0_DFS_LEN_8BIT;
spi_cfg.Direction = SSI_CTRL0_TMOD_WR;
spi_cfg.BaudRatePrescaler = SSI_BAUD_DIV_2;
spi_cfg.CLKPolarity = SSI_CTRL0_SCPOL_LOW;
spi_cfg.CLKPhase = SSI_CTRL0_SCPHA_LEAD;
spi_cfg.FirstBit = SPI_FirstBit_MSB;
xc_spi_init(spi_idx, &spi_cfg);
xc_spi_flash_wake_up(spi_idx);
uint32_t mid = 0;
xc_spi_flash_rdid(spi_idx, (uint8_t *)&mid);
PRINT("Flash RDID: 0x%08x\n", mid);
uint8_t ruid[16];
xc_spi_flash_read_128bit_uid(spi_idx, ruid);
#else
xc_fmc_spi_init_oprt();
xc_fmc_spi_flash_wake_up();
uint32_t mid = 0;
xc_fmc_spi_flash_rdid((uint8_t *)&mid);
PRINT("Flash RDID: 0x%08x\n", mid);
uint8_t ruid[16];
xc_fmc_spi_flash_ruid(ruid);
#endif //(!USE_XIP)
PRINT("Flash RUID: ");
for (int i = 0; i < 16; i++) {
LOGI("%02x ", ruid[i]);
}
LOGI("\n");
}
/**
* @brief RF 2.4g tx manage
* @param rf_data_typedef_t * - rf_data
* @retval uint8_t - cnt
*/
void rf_tx_manage(void)
{
#ifdef XC_SEND_NUM // Limited number of transmissions
if (rf_data->cnt == XC_SEND_NUM) {
rf_data->cnt += 1;
LOGI("SEND END\r\n");
/* Turn off the send timer */
xc_timer_stop(RF_TX_TIMERx);
}
if ((rf_data->cnt < XC_SEND_NUM) && (rf_send_timer_flag)) {
#else // Timed transmission
if (rf_send_timer_flag) {
#endif // XC_SEND_NUM
rf_send_timer_flag = false;
GLOBAL_INT_DISABLE();
#if (!USE_XIP)
xc_spi_flash_read(spi_idx, RF_SPI_BASR_ADDR, tx_buff, BUFF_LEN);
#else
xc_fmc_spi_flash_read(RF_SPI_BASR_ADDR, tx_buff, BUFF_LEN);
#endif //(!USE_XIP)
GLOBAL_INT_RESTORE();
rf_data_config(tx_buff, BUFF_LEN);
/* Filling in software frame number */
tx_cnt +=1;
tx_buff[0] = tx_cnt;
LOGI("send_cnt:%d\r\n", tx_cnt);
/* Data transmission */
for (uint8_t i = 0; i < 32; i++)
LOGI("%02x ", tx_buff[i]);
LOGI("\r\n");
rf_tx_event(tx_buff, BUFF_LEN);
memcpy(send_spi_buff, tx_buff, BUFF_LEN);
/* Operating Flash*/
GLOBAL_INT_DISABLE();
#if (!USE_XIP)
xc_spi_flash_erase_sector(spi_idx, RF_SPI_BASR_ADDR);
xc_spi_flash_write(spi_idx, RF_SPI_BASR_ADDR, send_spi_buff, sizeof(send_spi_buff));
xc_spi_flash_read(spi_idx, RF_SPI_BASR_ADDR, tx_buff, BUFF_LEN);
#else
xc_fmc_spi_flash_erase_sector(RF_SPI_BASR_ADDR);
xc_fmc_spi_flash_write(RF_SPI_BASR_ADDR, send_spi_buff, sizeof(send_spi_buff));
xc_fmc_spi_flash_read(RF_SPI_BASR_ADDR, tx_buff, BUFF_LEN);
#endif //(!USE_XIP)
GLOBAL_INT_RESTORE();
}
return ;
}
/**
* @brief RF 2.4g rx manage
* @param rf_data_typedef_t * - rf_data
* @retval uint32_t - 0
*/
#if !(XINCX_RF_NVIC_MODE)
void rf_rx_manage(void)
{
static uint32_t conut = 0;
/* Receive event processing */
rx_len = rf_rx_event(rx_buff);
/* Receiving end polling data processing */
if (rx_len != 0) {
/* Receive Count */
CE_CTL_LOW;
/* Receiving data processing */
if (rx_buff[RF_CONFIRMED_VALUE] == RF_CONFIRMED_VALUE) {
PRINT("%d\r\n", rx_cnt);
GLOBAL_INT_DISABLE();
#if (!USE_XIP)
xc_spi_flash_erase_sector(spi_idx, RF_SPI_BASR_ADDR);
xc_spi_flash_write(spi_idx, RF_SPI_BASR_ADDR, rx_buff, rx_len);
xc_spi_flash_read(spi_idx, RF_SPI_BASR_ADDR, rx_flash_buff, rx_len);
#else
xc_fmc_spi_flash_erase_sector(RF_SPI_BASR_ADDR);
xc_fmc_spi_flash_write(RF_SPI_BASR_ADDR, rx_buff, rx_len);
xc_fmc_spi_flash_read(RF_SPI_BASR_ADDR, rx_flash_buff, rx_len);
#endif //(USE_XIP)
GLOBAL_INT_RESTORE();
rx_cnt += 1;
} else {
rx_err_cnt += 1;
}
LOGI("read flash:");
for (uint8_t i = 0; i < rx_len; i++) {
LOGI("%02x ", rx_flash_buff[i]);
}
LOGI("\r\n");
xc_timer_set_value(RF_RX_TIMERx, 1000 * 1000);
xc_timer_start(RF_RX_TIMERx);
/* Receive read data buffer reset */
memset(rx_buff, 0, rx_len);
memset(rx_flash_buff, 0, sizeof(rx_flash_buff));
rx_len = 0;
/* Entering the receiver */
CE_CTL_HIGH;
}
if (rx_timerout_flag) {
rx_timerout_flag = false;
LOGI("rx_cnt:%d,rx_err_cnt:%d\r\n", rx_cnt, rx_err_cnt);
xc_timer_stop(RF_RX_TIMERx);
}
}
#else
void rf_rx_manage(void)
{
static uint32_t conut = 0;
if (rf24g_rx_irq_flag) {
rf24g_rx_irq_flag = false;
uint8_t len = recv_len;
/* Entering standby mode */
CE_CTL_LOW;
if ((len != 0) && (recv_buf[RF_CONFIRMED_VALUE] == RF_CONFIRMED_VALUE)) {
LOGI("%d\r\n", recv_buf[0]);
GLOBAL_INT_DISABLE();
#if (!USE_XIP)
xc_spi_flash_erase_sector(spi_idx, RF_SPI_BASR_ADDR);
xc_spi_flash_write(spi_idx, RF_SPI_BASR_ADDR, recv_buf, sizeof(recv_buf));
xc_spi_flash_read(spi_idx, RF_SPI_BASR_ADDR, rx_flash_buff, sizeof(rx_flash_buff));
#else
xc_fmc_spi_flash_erase_sector(RF_SPI_BASR_ADDR);
xc_fmc_spi_flash_write(RF_SPI_BASR_ADDR, recv_buf, sizeof(recv_buf));
xc_fmc_spi_flash_read(RF_SPI_BASR_ADDR, rx_flash_buff, sizeof(rx_flash_buff));
#endif
GLOBAL_INT_RESTORE();
rx_cnt += 1;
} else {
rx_err_cnt += 1;
}
LOGI("read flash:");
for (uint8_t i = 0; i < len; i++) {
LOGI("%02x ", rx_flash_buff[i]);
}
LOGI("\r\n");
xc_timer_set_value(RF_RX_TIMERx, 1000 * 1000);
xc_timer_start(RF_RX_TIMERx);
/* Receive Count */
conut += 1;
/* Receive read data buffer reset */
memset(recv_buf, 0, len);
memset(rx_flash_buff, 0, sizeof(rx_flash_buff));
/* Entering the receiver */
CE_CTL_HIGH;
}
if (rx_timerout_flag) {
rx_timerout_flag = false;
LOGI("rx_cnt:%d,rx_err_cnt:%d\r\n", rx_cnt, rx_err_cnt);
xc_timer_stop(RF_RX_TIMERx);
}
return ;
}
#endif //!(XINCX_RF_NVIC_MODE)
void app_uart_init(void)
{
GPIO_InitCfg_t gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux0;
gpio_cfg.Pull = GPIO_PULLUP;
gpio_cfg.Int = NOT_INT;
gpio_cfg.FunSel = UART0_TX;
gpio_cfg.Pin = GPIO_18;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
xc_gpio_init(&gpio_cfg);
gpio_cfg.FunSel = UART0_RX;
gpio_cfg.Pin = GPIO_19;
gpio_cfg.Dir = GPIO_DIR_INPUT;
xc_gpio_init(&gpio_cfg);
UART_InitCfg_t uart_cfg = {0};
uart_cfg.Parity = UART_PARITY_DISABLE;
uart_cfg.StopBits = UART_STOP_1_BITS;
uart_cfg.WordLength = UART_DATA_8_BITS;
uart_cfg.BaudRate = UART_BAUDRATE_115200;
uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE;
xc_uart_init(UART0_IDX, &uart_cfg);
}
/**
* @brief main
* @details
* @param[in] void
* @param[out] void
* @retval int - 0
* @retval void
* @par identifier
* reserve
* @par other
* void
* @par change log
* Alex created on 2023-05-31
*/
int main(void)
{
/* Clock initialization */
clock_init();
/* Serial port initialization */
app_uart_init();
/* SPI initialization */
rf_spi_init();
/* rf 2.4g initialization configuration */
rf24g_init();
/* Set testing frequency points */
rf_set_channel(XINCX_2_4G_CHANNEL);
#if (XINCX_RF_TRANS_RATE == DR_2M)
/* Set 2M mode register configuration */
/* Don't move this function interface */
rf_2M_config();
#endif //(XINCX_RF_TRANS_RATE == DR_2M)
#ifdef DEBUG_LOG
/* Register information printing */
rf_dump_log();
#endif
#if XINCX_RF_MODE
#if XINCX_RF_NVIC_MODE
/* Enable RF2.4G interrupts */
NVIC_EnableIRQ(RF24G_IRQn);
/* Configure the RF2.4G interrupt priority */
NVIC_SetPriority(RF24G_IRQn, 0);
#endif
/* Receive timeout setting */
timer_init(RF_RX_TIMERx, RECV_TIMERMS_OUT);
/* Enter receiver mode */
CE_CTL_HIGH;
#else
/* Launch data packaging filling */
rf_data_config(tx_buff, BUFF_LEN);
#if (!USE_XIP)
xc_spi_flash_erase_sector(spi_idx, RF_SPI_BASR_ADDR);
xc_spi_flash_write(spi_idx, RF_SPI_BASR_ADDR, tx_buff, BUFF_LEN);
#else
xc_fmc_spi_flash_erase_sector(RF_SPI_BASR_ADDR);
xc_fmc_spi_flash_write(RF_SPI_BASR_ADDR, tx_buff, BUFF_LEN);
#endif //(!USE_XIP)
/* Set emission interval */
timer_init(RF_TX_TIMERx, SEND_TIMERMS_CNT);
#endif // XINCX_RF_MODE
for (;;) {
#if XINCX_RF_MODE
/* receive */
rf_rx_manage();
#else
/* sending */
rf_tx_manage();
#endif // XINCX_RF_MODE
}
}