Stair56E UART project

This commit is contained in:
2026-08-05 19:07:52 +08:00
parent 7ca1af130d
commit f5654b70cc
2500 changed files with 619007 additions and 282610 deletions
@@ -0,0 +1,123 @@
/*!
* \file main.c
*
* \brief Target main implementation
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include "main.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Func Prototype
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Functions
-------------------------------------------------------------------------------------*/
void clock_init(void)
{
CLOCK_InitCfg_t clock_cfg;
clock_cfg.hfclk_src = CLOCK_HFCLK_SRC_XTAL;
clock_cfg.hfclk_in = CLOCK_HFCLK_IN_32M;
clock_cfg.lfclk_src = CLOCK_LFCLK_SRC_RC;
if(clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_XTAL) {
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32768;
} else if(clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_RC) {
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32K;
}
xc_clock_init_cfg(&clock_cfg);
SysTick_Config(xc_clock_hfclk_in_get( ) / 100);
SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
}
void app_uart_init(void)
{
GPIO_InitCfg_t gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux0;
gpio_cfg.Pull = GPIO_PULLUP;
gpio_cfg.Int = NOT_INT;
gpio_cfg.FunSel = UART0_TX;
gpio_cfg.Pin = GPIO_18;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
xc_gpio_init(&gpio_cfg);
gpio_cfg.FunSel = UART0_RX;
gpio_cfg.Pin = GPIO_19;
gpio_cfg.Dir = GPIO_DIR_INPUT;
xc_gpio_init(&gpio_cfg);
UART_InitCfg_t uart_cfg = {0};
uart_cfg.Parity = UART_PARITY_DISABLE;
uart_cfg.StopBits = UART_STOP_1_BITS;
uart_cfg.WordLength = UART_DATA_8_BITS;
uart_cfg.BaudRate = UART_BAUDRATE_115200;
uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE;
xc_uart_init(UART0_IDX, &uart_cfg);
}
/**
* @brief main
* @details
* @param[in] void
* @param[out] void
* @retval int - 0
* @retval void
* @par identifier
* reserve
* @par other
* void
* @par change log
* Alex created on 2023-05-31
*/
int main(void)
{
// Clock Initialization
clock_init();
app_uart_init();
DEBUG("__START__\n");
/* uart demo */
uart_dma_rx_demo( );
while(1)
{
/* main loop */
;
}
}
@@ -0,0 +1,147 @@
/*!
* \file uart_dma_rx.c
*
* \brief Target uart dma rx implementation
*
* \copyright Revised BSD License, see section \ref LICENSE.
*
* \code
*
* _ __ _ ________ _
* | |/ /(_)___ / ____/ /_ (_)___
* | // / __ \/ / / __ \/ / __ \
* / |/ / / / / /___/ / / / / /_/ /
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
* /_/
* (C) 2022-2025 XinChip
*
* \endcode
*
* \author ( XinChip ) Alex-J
*
* \author ( XinChip )
*/
/*-----------------------------------------------------------------------------------
INCLUDE HEADE FILES
------------------------------------------------------------------------------------*/
#include "uart_dma_rx.h"
#include "xc_drv_uart.h"
/*------------------------------------------------------------------------------------
Macros
-------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------
Global Variables
-------------------------------------------------------------------------------------*/
#define UART0_BUFFER_LEN 128
#define UART1_BUFFER_LEN 128
#define DMA_TRIGGER_THRESHOLD_BYTES 1
uint8_t uart0_dma_rx_buff[4];
uint8_t uart1_dma_rx_buff[4];
ring_buffer_t uart0_ring_buff;
ring_buffer_t uart1_ring_buff;
uint8_t uart1_buff[UART1_BUFFER_LEN];
uint8_t uart0_buff[UART0_BUFFER_LEN];
/*------------------------------------------------------------------------------------
Functions
-------------------------------------------------------------------------------------*/
void uart0_dma_rx_callback(uint8_t eCode)
{
uint8_t errorCode;
ring_buffer_queue(&uart0_ring_buff, uart0_dma_rx_buff[0]);
xc_uart_dma_rx_config(UART0_IDX, DMA_CHANNEL1, DMA_TRIGGER_THRESHOLD_BYTES, uart0_dma_rx_buff);
errorCode = xc_dma_start_transfer(DMA_CHANNEL1, uart0_dma_rx_callback);
if (errorCode != 0) {
DEBUG("\nERROR: Failed Uart DMA_StartTransfer Tx\n");
}
}
void uart1_dma_rx_callback(uint8_t eCode)
{
uint8_t errorCode;
ring_buffer_queue(&uart1_ring_buff, uart1_dma_rx_buff[0]);
xc_uart_dma_rx_config(UART1_IDX, DMA_CHANNEL2, DMA_TRIGGER_THRESHOLD_BYTES, uart1_dma_rx_buff);
errorCode = xc_dma_start_transfer(DMA_CHANNEL2, uart1_dma_rx_callback);
if (errorCode != 0) {
DEBUG("\nERROR: Failed Uart DMA_StartTransfer Tx\n");
}
}
/**
* @brief uart_dma_tx_demo
* @details
* @param void
* @retval void
*/
void uart_dma_rx_demo(void)
{
DEBUG("__UART_DMA_RX_DEMO__\n");
uint8_t uart_handle = UART1_IDX;
if (uart_handle == UART1_IDX) {
GPIO_InitCfg_t gpio_cfg = {0};
gpio_cfg.Mux = GPIO_Mux0;
gpio_cfg.Pull = GPIO_PULLUP;
gpio_cfg.Int = NOT_INT;
gpio_cfg.Pin = GPIO_14;
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
gpio_cfg.FunSel = UART1_TX;
xc_gpio_init( &gpio_cfg );
gpio_cfg.Pin = GPIO_15;
gpio_cfg.Dir = GPIO_DIR_INPUT;
gpio_cfg.FunSel = UART1_RX;
xc_gpio_init( &gpio_cfg );
UART_InitCfg_t uart_cfg={0};
uart_cfg.Parity = UART_PARITY_DISABLE;
uart_cfg.StopBits = UART_TCR_STOP_1BITS;
uart_cfg.WordLength = UART_DATA_8_BITS;
uart_cfg.BaudRate = UART_BAUDRATE_115200;
uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE;
xc_uart_init( uart_handle, &uart_cfg );
}
NVIC_EnableIRQ(DMA_IRQn);
ring_buffer_create(&uart0_ring_buff, uart0_buff, UART0_BUFFER_LEN);
ring_buffer_create(&uart1_ring_buff, uart1_buff, UART1_BUFFER_LEN);
xc_dma_init();
xc_uart_dma_receive(UART0_IDX, DMA_CHANNEL1, DMA_TRIGGER_THRESHOLD_BYTES, uart0_dma_rx_buff);
xc_uart_dma_receive(UART1_IDX, DMA_CHANNEL2, DMA_TRIGGER_THRESHOLD_BYTES, uart1_dma_rx_buff);
while (1) {
if (!ring_buffer_is_empty(&uart0_ring_buff)) {
uint8_t uart0_rx_buff[128];
uint8_t len = ring_buffer_num_items(&uart0_ring_buff);
ring_buffer_dequeue_arr(&uart0_ring_buff, uart0_rx_buff, len);
xc_uart_send_data(UART0_IDX, uart0_rx_buff, len);
}
if (!ring_buffer_is_empty(&uart1_ring_buff)) {
uint8_t uart1_rx_buff[128];
uint8_t len = ring_buffer_num_items(&uart1_ring_buff);
ring_buffer_dequeue_arr(&uart1_ring_buff, uart1_rx_buff, len);
xc_uart_send_data(UART1_IDX, uart1_rx_buff, len);
}
}
}