/*---------------------------------------------------------------------------------------------------- INCLUDE HEADE FILES ----------------------------------------------------------------------------------------------------*/ //#include "Includes.h" #include "xc6xxx.h" #include #include #include #include "BootSecond.h" extern void makeCRC32table(unsigned int table[]); extern unsigned int crc32table[]; void clock_init(void) { CLOCK_InitCfg_t clock_cfg; clock_cfg.hfclk_src = CLOCK_HFCLK_SRC_XTAL; clock_cfg.hfclk_in = CLOCK_HFCLK_IN_32M; clock_cfg.lfclk_src = CLOCK_LFCLK_SRC_RC; if(clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_XTAL) { clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32768; } else if(clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_RC) { clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32K; } xc_clock_init_cfg(&clock_cfg); SysTick_Config(xc_clock_hfclk_in_get( ) / 100); SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk; } void app_uart_init(void) { GPIO_InitCfg_t gpio_cfg = {0}; gpio_cfg.Mux = GPIO_Mux0; gpio_cfg.Pull = GPIO_PULLUP; gpio_cfg.Int = NOT_INT; gpio_cfg.FunSel = UART0_TX; gpio_cfg.Pin = GPIO_18; gpio_cfg.Dir = GPIO_DIR_OUTPUT; xc_gpio_init(&gpio_cfg); gpio_cfg.FunSel = UART0_RX; gpio_cfg.Pin = GPIO_19; gpio_cfg.Dir = GPIO_DIR_INPUT; xc_gpio_init(&gpio_cfg); UART_InitCfg_t uart_cfg = {0}; uart_cfg.Parity = UART_PARITY_DISABLE; uart_cfg.StopBits = UART_STOP_1_BITS; uart_cfg.WordLength = UART_DATA_8_BITS; uart_cfg.BaudRate = UART_BAUDRATE_115200; uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE; xc_uart_init(UART0_IDX, &uart_cfg); } void printf_string(char *strings) { while(*strings != '\0') { xc_uart_send_byte(UART0_IDX, *strings); strings ++; } } void printf_hex(uint32_t input_data) { uint8_t temp[96]; uint8_t i = 0; while(input_data > 0) { if((input_data % 16) > 9) temp[i]=(input_data % 16) - 10 + 'a'; else temp[i]=(input_data % 16) + '0'; input_data = input_data / 16; i ++; } for( ; i>0; i --) { xc_uart_send_byte(UART0_IDX, temp[i-1]); } } int uart_printf(const char *fmt,...) { char chr; int argint; char temp; char *argstr; va_list va; va_start(va,fmt); while((chr= *fmt++) != '\0') { if(chr != '%') { xc_uart_send_byte(UART0_IDX, chr); continue; } if(*fmt != '\0') temp=*fmt++; else temp='\0'; switch(temp) { case '\0': xc_uart_send_byte(UART0_IDX, '%'); break; case 'c': xc_uart_send_byte(UART0_IDX, va_arg(va,int)); break; case 's': argstr = va_arg(va,char *); printf_string(argstr); break; case 'x': case 'X': argint = va_arg(va,int); printf_hex(argint); break; default : xc_uart_send_byte(UART0_IDX, '%'); fmt --; break; } } va_end(va); return 0; } int main(void) { #ifdef WITHOUT_OTA #ifdef QUAD_ENABLE init_xip(QUAD_MODE); #else init_xip(DUAL_MODE); jump_app(); #endif #endif #ifdef BLE_OTA clock_init(); app_uart_init(); uart_printf("boot init\n"); #ifdef USED_DCDC cprao_aon_dcdc_ctr_reg1__dcdc_ctrl__setf(4); cprao_aon_dcdc_ctr_reg0__dcdc_en_soft__setf(1); cprao_aon_dcdc_ctr_reg0__dcdc_bg_en_soft__setf(1); // 0b011, dcdc supply power cprao_aon_reg1__bb_coreldo_dcdc_sw_softsel__setf(1); cprao_aon_reg1__bb_coreldo_dcdc_sw_soft__setf(1); for (volatile uint16_t dly = 0; dly < 600; dly++) ; cprao_aon_reg1__bb_coreldo_dcdc_sw_mux__setf(0); #endif // Init_spi_master(0, SPIM_CLK_16MHZ); flash_init(); // makeCRC32table(crc32table); boot_run_sec(); #endif #ifdef OTA_24G config_2_4g_rf(); Init_spi_master(0, SPIM_CLK_16MHZ); makeCRC32table(crc32table); spi_flash_Release_powerdown(); *((uint32_t volatile *)0x40002450) |= 0x0; //- open rf digital // erase_flash_chip(); printf("erase_flash_chip\n"); rx_24g_ota(); #endif while (1) ; }