#include "Includes.h" void retarget_init(void) { unsigned int val; __read_hw_reg32(CPR_GPIO_FUN_SEL4, val); val &= 0xFFFF; /* GPIO18: TX; GPIO19: RX */ val |= ((1 << 16) | (2 << 24)); __write_hw_reg32(CPR_GPIO_FUN_SEL4, val); /* Reset uart module */ __write_hw_reg32(CPR_RSTCTL_SUBRST_SW, 0x10000); /* Unreset uart module */ __write_hw_reg32(CPR_RSTCTL_SUBRST_SW, 0x10001); /* Enable uart0 pclk */ __write_hw_reg32(CPR_CTLAPBCLKEN_GRCTL, 0x100010); /* Set the first-level division ratio of uart0_clk relative to the 12MHz clock */ __write_hw_reg32(CPR_UART0_CLK_GRCTL, 0x110018); /* Set the secondary frequency division coefficient of uart0_clk relative to the 12MHz clock */ //__write_hw_reg32(CPR_UART0_CLK_CTL, 0x0600271);//57600-OSC12M __write_hw_reg32(CPR_UART0_CLK_CTL, 0x0480271); // 115200-OSC32M //__write_hw_reg32(CPR_UART0_CLK_CTL, 0x1800271);//230400-OSC12M //__write_hw_reg32(CPR_UART0_CLK_CTL, 0x0C00271);//115200-OSC12M /* Enable DLAB */ __write_hw_reg32(UART0_TCR, 0x80); /* Control the baud rate */ __write_hw_reg32(UART0_DLL, 0x01); /* Control the baud rate */ __write_hw_reg32(UART0_DLH, 0x00); /* Set the data bit of the serial port */ __write_hw_reg32(UART0_TCR, 0x03); /* Set the interrupt threshold of transmit FIFO and receive FIFO and Clear the transmit and receive FIFO, Finally enable FIFO */ __write_hw_reg32(UART0_FCR, 0x37); printf("\n SYSTEM BUILD TIME: %s %s \n", __DATE__, __TIME__); } int sendchar(int c) { //return 0; unsigned int status; for (;;) { status = (*((volatile unsigned *)(0x40010000 + 0x14))); status &= 0x20; if (status == 0x20) break; } (*((volatile unsigned *)(0x40010000 + 0x00))) = c; return (1); } struct __FILE { int handle; /* Add whatever you need here */ }; FILE __stdout; int fputc(int ch, FILE *f) { return (sendchar(ch)); } int ferror(FILE *f) { /* Your implementation of ferror */ return EOF; } void _ttywrch(int ch) { sendchar(ch); } void _sys_exit(int return_code) { label: goto label; /* endless loop */ }