594 lines
16 KiB
C
594 lines
16 KiB
C
/*!
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* \file xc6xxx_fmc_spi.c
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*
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* \brief Target xc6xxx hal fmc spi implementation
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*
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* \copyright Revised BSD License, see section \ref LICENSE.
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*
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* \code
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*
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* _ __ _ ________ _
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* | |/ /(_)___ / ____/ /_ (_)___
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* | // / __ \/ / / __ \/ / __ \
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* / |/ / / / / /___/ / / / / /_/ /
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* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
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* /_/
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* (C) 2022-2025 XinChip
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*
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* \endcode
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*
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* \author ( XinChip ) Alex-J
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*
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* \author ( XinChip )
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*/
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/*-----------------------------------------------------------------------------------
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INCLUDE HEADE FILES
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------------------------------------------------------------------------------------*/
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#include "xc6xxx_fmc_spi.h"
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/*------------------------------------------------------------------------------------
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Functions
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-------------------------------------------------------------------------------------*/
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void *ram_memcpy_bytes(void *dst, const void *src, int size)
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{
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if(dst == NULL || src == NULL || size <= 0)
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return NULL;
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char *pdst = (char *)dst;
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char *psrc = (char *)src;
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if(pdst > psrc && pdst < psrc + size) {
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pdst = pdst + size - 1;
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psrc = psrc + size - 1;
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while(size--)
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*pdst-- = *psrc--;
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} else {
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while(size--)
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*pdst++ = *psrc++;
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}
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return dst;
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void FMC_Status_Wait_Idle(void)
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{
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uint32_t reg = 0;
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do {
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__READ_REG32(BLE_COMN_AGC_REG_OUT0, reg);
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} while(!(reg & FMC_IDLE_Msk));
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void FMC_SPI_WriteNByte(uint8_t* txdata, uint16_t len)
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{
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if(len == 0) return;
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uint16_t n;
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uint8_t remain = len % 4;
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uint16_t cnt = len / 4;
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uint32_t mid_data[64+1] = { 0 };
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if(cnt != 0) {
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for(n=0; n<cnt; n++) {
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mid_data[n] = ((txdata[n*4] << 24) | (txdata[n*4+1] << 16) |
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(txdata[n*4+2] << 8) | txdata[n*4+3]);
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}
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}
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if(remain != 0) {
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for(n=0; n<remain; n++) {
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mid_data[cnt] |= (txdata[cnt*4+n] << (24-8*n));
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}
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}
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if(cnt != 0) {
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if(remain != 0)
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cnt = cnt + 1;
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for(n=0; n<cnt; n++)
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__FMC_SPI_SendByte(mid_data[n]);
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} else {
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__FMC_SPI_SendByte(mid_data[0]);
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}
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while(!(*FMC_SSI_STS & FMC_SPI_STS_REG_FLAG_TFE) ||
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(*FMC_SSI_STS & FMC_SSI_STS_BUSY));
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void FMC_SPI_ReadNByte(uint8_t* rxdata, uint16_t len)
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{
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if(len == 0) return;
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uint16_t n;
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uint8_t remain = len % 4;
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uint16_t cnt = len / 4;
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uint32_t mid_data = 0;
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if(cnt != 0) {
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for(n=0; n<cnt; n++) {
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mid_data = __FMC_SPI_RecvByte( );
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// printf("0_rcv: 0x%08x\n", mid_data);
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rxdata[n*4] = mid_data >> 24;
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rxdata[n*4+1] = mid_data >> 16;
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rxdata[n*4+2] = mid_data >> 8;
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rxdata[n*4+3] = mid_data;
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}
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}
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if(remain != 0) {
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mid_data = __FMC_SPI_RecvByte( );
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// printf("1_rcv: 0x%08x\n", mid_data);
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for(n=0; n<remain; n++) {
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rxdata[cnt*4+n] = mid_data >> 24;
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rxdata[cnt*4+1+n] = mid_data >> 16;
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rxdata[cnt*4+2+n] = mid_data >> 8;
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rxdata[cnt*4+3+n] = mid_data;
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}
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}
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while(*FMC_SSI_STS & FMC_SPI_STS_REG_FLAG_RFNE) {
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mid_data = __FMC_SPI_RecvByte( );
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}
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void FMC_SPI_Enable(uint8_t dfs)
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{
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__WRITE_REG32(FMC_SSI_EN, 0);
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if(dfs != 0x1f) {
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uint32_t reg= *FMC_SSI_CTRL0;
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__CLEAR_BIT(reg, (uint32_t)0x1f);
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__SET_BIT(reg, (uint32_t)dfs);
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__WRITE_REG32(FMC_SSI_CTRL0, reg);
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}
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__WRITE_REG32(FMC_SSI_EN, 1);
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void FMC_SPI_Disable(void)
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{
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__WRITE_REG32(FMC_SSI_EN, 0);
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uint32_t reg= *FMC_SSI_CTRL0;
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__CLEAR_BIT(reg, (uint32_t)0x1f);
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__SET_BIT(reg, (uint32_t)0x1f);
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__WRITE_REG32(FMC_SSI_CTRL0, reg);
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__WRITE_REG32(FMC_SSI_EN, 1);
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void FMC_SPI_Init_Oprt(void)
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{
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/* BT_CLK 时钟控制寄存器 */
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__WRITE_REG32(CPR_BT_CLK_CTL, ((1<<4) | ((1<<4)<<16)));
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/* BT_MODEM_CLK 时钟控制寄存器 */
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__WRITE_REG32(CPR_BT_MODEM_CTL, ((1<<4) | ((1<<4)<<16)));
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/* 配置 BT_PCLK_EN 使能 */
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__SET_BIT(*CPR_CTLAPBCLKEN_GRCTL, ((1<<10) | ((1<<10)<<16)));
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__WRITE_REG32(CPR_SSI0_MCLK_CTL, ((1<<16) | ((0<<4) | ((1<<16)<<4))));
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__WRITE_REG32(CPR_RSTCTL_SUBRST_SW, ((0<<2) | ((1<<2)<<16)));
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__WRITE_REG32(CPR_RSTCTL_SUBRST_SW, ((1<<2) | ((1<<2)<<16)));
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FMC_Status_Wait_Idle( );
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__WRITE_REG32(FMC_SSI_EN, 0);
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uint32_t reg= *FMC_SSI_CTRL0;
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__CLEAR_BIT(reg, (uint32_t)0x1f);
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__SET_BIT(reg, (uint32_t)0x1f);
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__WRITE_REG32(FMC_SSI_CTRL0, reg);
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*FMC_SSI_CTRL0 &= ~((uint32_t)0x01 << 14);
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__WRITE_REG32(FMC_SSI_SE, 1);
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__WRITE_REG32(FMC_SSI_IE, 0);
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__WRITE_REG32(FMC_SSI_BAUD, 2);
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__WRITE_REG32(FMC_SSI_TXFTL, 0);
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__WRITE_REG32(FMC_SSI_RXFTL, 0);
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__WRITE_REG32(FMC_SSI_EN, 1);
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void FMC_SPI_Flash_PowerDown(void)
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{
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FMC_Status_Wait_Idle( );
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uint8_t cmd[4];
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cmd[0] = 0;
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cmd[1] = 0;
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cmd[2] = 0;
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cmd[3] = CMD_PWRDWN;
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FMC_SPI_Enable(0x07);
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FMC_SPI_WriteNByte(cmd, sizeof(cmd));
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FMC_SPI_Disable( );
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void FMC_SPI_Flash_WakeUp(void)
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{
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FMC_Status_Wait_Idle( );
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uint8_t cmd[4];
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cmd[0] = 0;
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cmd[1] = 0;
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cmd[2] = 0;
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cmd[3] = CMD_RELEASE_PWRDWN;
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FMC_SPI_Enable(0x07);
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FMC_SPI_WriteNByte(cmd, sizeof(cmd));
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FMC_SPI_Disable( );
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE uint8_t FMC_SPI_Flash_Status(void)
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{
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FMC_Status_Wait_Idle( );
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uint8_t cmd[2] = { 0 };
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uint8_t sta[4] = { 0xff, 0xff, 0xff, 0xff };
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cmd[0] = CMD_READ_STATUS;
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cmd[1] = 0xff;
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FMC_SPI_Enable(0x1f);
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FMC_SPI_WriteNByte(cmd, sizeof(cmd));
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FMC_SPI_ReadNByte(sta, sizeof(sta));
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FMC_SPI_Disable( );
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return sta[1];
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void FMC_SPI_Flash_Wait_Busy(void)
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{
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while(( FMC_SPI_Flash_Status( ) & 0x01 ));
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void FMC_SPI_Flash_Write_Enable(void)
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{
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FMC_Status_Wait_Idle( );
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uint8_t cmd[4] = { 0 };
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cmd[0] = 0;
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cmd[1] = 0;
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cmd[2] = 0;
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cmd[3] = CMD_WRITE_ENABLE;
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FMC_SPI_Enable(0x07);
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FMC_SPI_WriteNByte(cmd, sizeof(cmd));
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FMC_SPI_Disable( );
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void FMC_SPI_Flash_Erase_Sector(uint32_t Dst_Addr)
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{
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// FMC_Status_Wait_Idle( );
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FMC_SPI_Flash_Wait_Busy( );
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FMC_SPI_Flash_Write_Enable( );
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FMC_SPI_Flash_Wait_Busy( );
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uint8_t cmd[4] = { 0 };
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cmd[0] = CMD_SECTOR_ERASE;
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cmd[1] = Dst_Addr>>16;
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cmd[2] = Dst_Addr>>8;
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cmd[3] = Dst_Addr;
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FMC_SPI_Enable(0x1f);
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FMC_SPI_WriteNByte(cmd, sizeof(cmd));
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FMC_SPI_Disable( );
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FMC_SPI_Flash_Wait_Busy( );
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void FMC_SPI_Flash_WritePage(uint32_t WriteAddr, uint8_t *data, uint16_t size)
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{
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if(size > FLASH_PAGE_SIZE)
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return;
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uint32_t addr = WriteAddr;
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uint8_t cmd[16+4] = { 0 };
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for(uint8_t i=0; i<16; i++) {
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FMC_SPI_Flash_Wait_Busy( );
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FMC_SPI_Flash_Write_Enable( );
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FMC_SPI_Flash_Wait_Busy( );
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cmd[0] = CMD_PAGE_PROGRAM;
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cmd[1] = addr >> 16;
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cmd[2] = addr >> 8;
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cmd[3] = addr;
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ram_memcpy_bytes(&cmd[4], data+i*16, 16);
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FMC_Status_Wait_Idle( );
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FMC_SPI_Enable(0x1f);
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FMC_SPI_WriteNByte(cmd, sizeof(cmd));
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addr += 16;
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}
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FMC_SPI_Flash_Wait_Busy( );
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FMC_SPI_Disable( );
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE void FMC_SPI_Flash_ReadPage(uint32_t ReadAddr, uint8_t *data, uint16_t size)
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{
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if(size > FLASH_PAGE_SIZE)
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return;
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FMC_Status_Wait_Idle( );
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uint8_t cmd[16+4] = { 0 };
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uint8_t mid[16+4] = { 0 };
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uint16_t rx_idx = 0;
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uint32_t addr = ReadAddr;
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for(uint8_t i=0; i<16; i++) {
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cmd[0] = CMD_READ_DATA;
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cmd[1] = addr >> 16;
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cmd[2] = addr >> 8;
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cmd[3] = addr;
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FMC_SPI_Enable(0x1f);
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FMC_SPI_WriteNByte(cmd, 20); //sizeof(cmd)
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FMC_SPI_ReadNByte(mid, 20); //sizeof(mid)
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ram_memcpy_bytes(&data[rx_idx], mid+4, 16);
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addr += 16;
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rx_idx += 16;
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}
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FMC_SPI_Disable( );
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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__RAM_CODE uint8_t FMC_SPI_FlashWrite(uint32_t writeAddr, uint8_t *buff, uint16_t len)
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{
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uint32_t cur_addr = writeAddr;
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uint32_t end_addr = writeAddr + len;
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uint16_t wt_len = 0;
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uint16_t CurPageNum = 0; //本次数据存储所占用的当前页号
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uint32_t CurStartPsr = 0; //本次地址在 当前页所占的位置
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uint8_t temp_buff[FLASH_PAGE_SIZE] = { 0 };
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while (cur_addr != end_addr) {
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/* code */
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CurPageNum = CUR_PAGE_NUM(cur_addr);
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CurStartPsr = CUR_START_PSR(cur_addr);
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FMC_SPI_Flash_ReadPage(CurPageNum*FLASH_PAGE_SIZE, temp_buff, FLASH_PAGE_SIZE);
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if(CurStartPsr) {
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ram_memcpy_bytes(&temp_buff[CurStartPsr], buff+wt_len, (256-CurStartPsr)>len-wt_len? len-wt_len:(256-CurStartPsr));
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wt_len += wt_len + ((256-CurStartPsr)>len-wt_len? len-wt_len:(256-CurStartPsr));
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cur_addr += wt_len;
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} else {
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ram_memcpy_bytes(temp_buff, buff+wt_len, len-wt_len>256? 256:len-wt_len);
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cur_addr += (len-wt_len>256? 256:len-wt_len);
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wt_len += (len-wt_len>256? 256:len-wt_len);
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}
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FMC_SPI_Flash_WritePage(CurPageNum*FLASH_PAGE_SIZE, temp_buff, FLASH_PAGE_SIZE);
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}
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return 0;
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}
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/**
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****************************************************************************************
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* @brief
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*
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* @param[in]
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* @param[in]
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* @return[out]
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*
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****************************************************************************************
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*/
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__RAM_CODE uint8_t FMC_SPI_FlashRead(uint32_t readAddr, uint8_t *buff, uint16_t len)
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{
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uint32_t cur_addr = readAddr;
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uint32_t end_addr = readAddr + len;
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uint16_t rd_len = 0;
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uint16_t CurPageNum = 0; //本次数据存储所占用的当前页号
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uint32_t CurStartPsr = 0; //本次地址在 当前页所占的位置
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uint8_t temp_buff[FLASH_PAGE_SIZE] = { 0 };
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while (cur_addr != end_addr) {
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CurPageNum = CUR_PAGE_NUM(cur_addr);
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CurStartPsr = CUR_START_PSR(cur_addr);
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FMC_SPI_Flash_ReadPage(CurPageNum*FLASH_PAGE_SIZE, temp_buff, FLASH_PAGE_SIZE);
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if(CurStartPsr) {
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ram_memcpy_bytes(buff, &temp_buff[CurStartPsr], (256-CurStartPsr)>len-rd_len? len-rd_len:(256-CurStartPsr));
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rd_len += rd_len + ((256-CurStartPsr)>len-rd_len? len-rd_len:(256-CurStartPsr));
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cur_addr += rd_len;
|
|
} else {
|
|
ram_memcpy_bytes(buff+rd_len, temp_buff, len-rd_len>256? 256:len-rd_len);
|
|
cur_addr += (len-rd_len>256? 256:len-rd_len);
|
|
rd_len += (len-rd_len>256? 256:len-rd_len);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
****************************************************************************************
|
|
* @brief
|
|
*
|
|
* @param[in]
|
|
* @param[in]
|
|
****************************************************************************************
|
|
*/
|
|
__RAM_CODE void FMC_SPI_Flash_RUID(uint8_t *ruid)
|
|
{
|
|
FMC_Status_Wait_Idle( );
|
|
FMC_SPI_Flash_Wait_Busy( );
|
|
|
|
uint8_t cmd[21] = { 0 };
|
|
uint8_t id[21] = { 0 };
|
|
|
|
cmd[0] = CMD_RUID;
|
|
cmd[1] = 0xff;
|
|
cmd[2] = 0xff;
|
|
cmd[3] = 0xff;
|
|
cmd[4] = 0xff;
|
|
|
|
FMC_SPI_Enable(0x1f);
|
|
FMC_SPI_WriteNByte(cmd, sizeof(cmd));
|
|
|
|
FMC_SPI_ReadNByte(id, sizeof(id));
|
|
FMC_SPI_Disable( );
|
|
|
|
ram_memcpy_bytes(ruid, &id[5], 16);
|
|
}
|
|
|
|
/**
|
|
****************************************************************************************
|
|
* @brief
|
|
*
|
|
* @param[in]
|
|
* @param[in]
|
|
****************************************************************************************
|
|
*/
|
|
__RAM_CODE void FMC_SPI_Flash_RDID(uint8_t *rdid)
|
|
{
|
|
FMC_Status_Wait_Idle( );
|
|
FMC_SPI_Flash_Wait_Busy( );
|
|
|
|
uint8_t cmd[4] = { 0 };
|
|
uint8_t id[4] = { 0 };
|
|
|
|
cmd[0] = CMD_RDID;
|
|
cmd[1] = 0xff;
|
|
cmd[2] = 0xff;
|
|
cmd[3] = 0xff;
|
|
|
|
FMC_SPI_Enable(0x1f);
|
|
FMC_SPI_WriteNByte(cmd, sizeof(cmd));
|
|
|
|
FMC_SPI_ReadNByte(id, sizeof(id));
|
|
FMC_SPI_Disable( );
|
|
|
|
ram_memcpy_bytes(rdid, &id[1], 3);
|
|
}
|