80 lines
2.2 KiB
C
80 lines
2.2 KiB
C
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#include "Includes.h"
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void retarget_init(void)
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{
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unsigned int val;
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__read_hw_reg32(CPR_GPIO_FUN_SEL4, val);
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val &= 0xFFFF;
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/* GPIO18: TX; GPIO19: RX */
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val |= ((1 << 16) | (2 << 24));
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__write_hw_reg32(CPR_GPIO_FUN_SEL4, val);
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/* Reset uart module */
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__write_hw_reg32(CPR_RSTCTL_SUBRST_SW, 0x10000);
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/* Unreset uart module */
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__write_hw_reg32(CPR_RSTCTL_SUBRST_SW, 0x10001);
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/* Enable uart0 pclk */
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__write_hw_reg32(CPR_CTLAPBCLKEN_GRCTL, 0x100010);
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/* Set the first-level division ratio of uart0_clk relative to the 12MHz clock */
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__write_hw_reg32(CPR_UART0_CLK_GRCTL, 0x110018);
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/* Set the secondary frequency division coefficient of uart0_clk relative to the 12MHz clock */
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//__write_hw_reg32(CPR_UART0_CLK_CTL, 0x0600271);//57600-OSC12M
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__write_hw_reg32(CPR_UART0_CLK_CTL, 0x0480271); // 115200-OSC32M
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//__write_hw_reg32(CPR_UART0_CLK_CTL, 0x1800271);//230400-OSC12M
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//__write_hw_reg32(CPR_UART0_CLK_CTL, 0x0C00271);//115200-OSC12M
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/* Enable DLAB */
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__write_hw_reg32(UART0_TCR, 0x80);
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/* Control the baud rate */
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__write_hw_reg32(UART0_DLL, 0x01);
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/* Control the baud rate */
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__write_hw_reg32(UART0_DLH, 0x00);
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/* Set the data bit of the serial port */
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__write_hw_reg32(UART0_TCR, 0x03);
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/* Set the interrupt threshold of transmit FIFO and receive FIFO and Clear the transmit and receive FIFO, Finally enable FIFO */
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__write_hw_reg32(UART0_FCR, 0x37);
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printf("\n SYSTEM BUILD TIME: %s %s \n", __DATE__, __TIME__);
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}
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int sendchar(int c)
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{
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//return 0;
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unsigned int status;
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for (;;)
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{
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status = (*((volatile unsigned *)(0x40010000 + 0x14)));
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status &= 0x20;
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if (status == 0x20)
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break;
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}
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(*((volatile unsigned *)(0x40010000 + 0x00))) = c;
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return (1);
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}
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struct __FILE
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{
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int handle; /* Add whatever you need here */
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};
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FILE __stdout;
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int fputc(int ch, FILE *f)
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{
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return (sendchar(ch));
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}
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int ferror(FILE *f)
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{
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/* Your implementation of ferror */
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return EOF;
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}
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void _ttywrch(int ch)
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{
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sendchar(ch);
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}
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void _sys_exit(int return_code)
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{
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label:
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goto label; /* endless loop */
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}
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