766 lines
51 KiB
C
766 lines
51 KiB
C
#ifndef __XINC_H
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#define __XINC_H
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/*******************************************************************************
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Modules` base address on XINC
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********************************************************************************/
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#define ROM_BASE 0x00000000
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#define M0_RAM_BASE 0x10000000
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#define SHRAM0_BASE 0x20000000
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#define SHRAM1_BASE 0x20020000
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#define DMAS_BASE 0x50001000
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#define CPR_BASE 0x40000000
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#define GPIO_BASE 0x40001000
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#define RTC_BASE 0x40002000
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#define TIMER_BASE 0x40003000
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#define WDT_BASE 0x40004000
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#define I2C_BASE 0x40006000
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#define UART0_BASE 0x40010000
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#define UART1_BASE 0x40011000
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#define SIM_BASE 0x40012000
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#define SPI0_BASE 0x40013000 //0x40013000
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#define SPI1_BASE 0x40014000
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#define SPI2_BASE 0x40014800
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#define KBS_BASE 0x40015000
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#define QDEC_BASE 0x40016000
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#define PWM_BASE 0x40017000
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#define GPADC_BASE 0x40018000
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#define CPR_AO_BASE 0x40002400
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#define AES_BASE 0x20020000
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#define GPIO_PORT_DR0 ((volatile unsigned *)(GPIO_BASE + 0x00))
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#define GPIO_PORT_DR1 ((volatile unsigned *)(GPIO_BASE + 0x04))
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#define GPIO_PORT_DR2 ((volatile unsigned *)(GPIO_BASE + 0x08))
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#define GPIO_PORT_DDR0 ((volatile unsigned *)(GPIO_BASE + 0x20))
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#define GPIO_PORT_DDR1 ((volatile unsigned *)(GPIO_BASE + 0x24))
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#define GPIO_PORT_DDR2 ((volatile unsigned *)(GPIO_BASE + 0x28))
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#define GPIO_EXT_PORT0 ((volatile unsigned *)(GPIO_BASE + 0x40))
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#define GPIO_EXT_PORT1 ((volatile unsigned *)(GPIO_BASE + 0x44))
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#define GPIO_INTR_CTRL0 ((volatile unsigned *)(GPIO_BASE + 0x100))
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#define GPIO_INTR_CTRL1 ((volatile unsigned *)(GPIO_BASE + 0x104))
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#define GPIO_INTR_CTRL2 ((volatile unsigned *)(GPIO_BASE + 0x108))
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#define GPIO_INTR_CTRL3 ((volatile unsigned *)(GPIO_BASE + 0x10c))
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#define GPIO_INTR_CTRL4 ((volatile unsigned *)(GPIO_BASE + 0x110))
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#define GPIO_INTR_CTRL5 ((volatile unsigned *)(GPIO_BASE + 0x114))
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#define GPIO_INTR_CTRL6 ((volatile unsigned *)(GPIO_BASE + 0x118))
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#define GPIO_INTR_CTRL7 ((volatile unsigned *)(GPIO_BASE + 0x11c))
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#define GPIO_INTR_CTRL8 ((volatile unsigned *)(GPIO_BASE + 0x120))
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#define GPIO_INTR_CTRL9 ((volatile unsigned *)(GPIO_BASE + 0x124))
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#define GPIO_DEBOUNCE0 ((volatile unsigned *)(GPIO_BASE + 0x180))
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#define GPIO_DEBOUNCE1 ((volatile unsigned *)(GPIO_BASE + 0x184))
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#define GPIO_DEBOUNCE2 ((volatile unsigned *)(GPIO_BASE + 0x188))
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#define GPIO_INTR_RAW0 ((volatile unsigned *)(GPIO_BASE + 0x1a0))
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#define GPIO_INTR_RAW1 ((volatile unsigned *)(GPIO_BASE + 0x1a4))
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#define GPIO_INTR_CLR0 ((volatile unsigned *)(GPIO_BASE + 0x1b0))
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#define GPIO_INTR_CLR1 ((volatile unsigned *)(GPIO_BASE + 0x1b4))
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#define GPIO_INTR_MASK_C00 ((volatile unsigned *)(GPIO_BASE + 0x200))
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#define GPIO_INTR_MASK_C01 ((volatile unsigned *)(GPIO_BASE + 0x204))
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#define GPIO_INTR_MASK_C02 ((volatile unsigned *)(GPIO_BASE + 0x208))
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#define GPIO_INTR_STATUS_C00 ((volatile unsigned *)(GPIO_BASE + 0x220))
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#define GPIO_INTR_STATUS_C01 ((volatile unsigned *)(GPIO_BASE + 0x224))
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#define GPIO_INTR_MASK_C10 ((volatile unsigned *)(GPIO_BASE + 0x240))
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#define GPIO_INTR_MASK_C11 ((volatile unsigned *)(GPIO_BASE + 0x244))
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#define GPIO_INTR_MASK_C12 ((volatile unsigned *)(GPIO_BASE + 0x248))
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#define GPIO_INTR_STATUS_C10 ((volatile unsigned *)(GPIO_BASE + 0x260))
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#define GPIO_INTR_STATUS_C11 ((volatile unsigned *)(GPIO_BASE + 0x264))
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#define RTC_CCVR ((volatile unsigned *)(RTC_BASE + 0x00))
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#define RTC_CLR ((volatile unsigned *)(RTC_BASE + 0x04))
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#define RTC_CMR_ONE ((volatile unsigned *)(RTC_BASE + 0x08))
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#define RTC_CMR_TWO ((volatile unsigned *)(RTC_BASE + 0x0C))
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#define RTC_CMR_THREE ((volatile unsigned *)(RTC_BASE + 0x10))
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#define RTC_ICR ((volatile unsigned *)(RTC_BASE + 0x14))
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#define RTC_ISR ((volatile unsigned *)(RTC_BASE + 0x18))
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#define RTC_EOI ((volatile unsigned *)(RTC_BASE + 0x18))
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#define RTC_WVR ((volatile unsigned *)(RTC_BASE + 0x1C))
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#define RTC_WLR ((volatile unsigned *)(RTC_BASE + 0x20))
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#define RTC_RAW_LIMIT ((volatile unsigned *)(RTC_BASE + 0x24))
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#define RTC_SECOND_LIMIT ((volatile unsigned *)(RTC_BASE + 0x28))
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#define RTC_MINUTE_LIMIT ((volatile unsigned *)(RTC_BASE + 0x2C))
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#define RTC_HOUR_LIMIT ((volatile unsigned *)(RTC_BASE + 0x30))
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#define RTC_ISR_RAW ((volatile unsigned *)(RTC_BASE + 0x34))
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#define RTC_RVR ((volatile unsigned *)(RTC_BASE + 0x38))
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#define AO_TIMER_CTL ((volatile unsigned *)(RTC_BASE + 0x0040))
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#define AO_GPIO_MODE ((volatile unsigned *)(RTC_BASE + 0x0044))
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#define AO_GPIO_CTL ((volatile unsigned *)(RTC_BASE + 0x0048))
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#define AO_ALL_INTR ((volatile unsigned *)(RTC_BASE + 0x004C))
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#define FREQ_TIMER_VAL ((volatile unsigned *)(RTC_BASE + 0x0050))
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#define TIMER0_TLC ((volatile unsigned *)(TIMER_BASE + 0x00))
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#define TIMER0_TCV ((volatile unsigned *)(TIMER_BASE + 0x04))
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#define TIMER0_TCR ((volatile unsigned *)(TIMER_BASE + 0x08))
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#define TIMER0_TIC ((volatile unsigned *)(TIMER_BASE + 0x0c))
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#define TIMER0_TIS ((volatile unsigned *)(TIMER_BASE + 0x10))
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#define TIMER1_TLC ((volatile unsigned *)(TIMER_BASE + 0x14))
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#define TIMER1_TCV ((volatile unsigned *)(TIMER_BASE + 0x18))
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#define TIMER1_TCR ((volatile unsigned *)(TIMER_BASE + 0x1C))
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#define TIMER1_TIC ((volatile unsigned *)(TIMER_BASE + 0x20))
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#define TIMER1_TIS ((volatile unsigned *)(TIMER_BASE + 0x24))
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#define TIMER2_TLC ((volatile unsigned *)(TIMER_BASE + 0x28))
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#define TIMER2_TCV ((volatile unsigned *)(TIMER_BASE + 0x2C))
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#define TIMER2_TCR ((volatile unsigned *)(TIMER_BASE + 0x30))
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#define TIMER2_TIC ((volatile unsigned *)(TIMER_BASE + 0x34))
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#define TIMER2_TIS ((volatile unsigned *)(TIMER_BASE + 0x38))
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#define TIMER3_TLC ((volatile unsigned *)(TIMER_BASE + 0x3C))
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#define TIMER3_TCV ((volatile unsigned *)(TIMER_BASE + 0x40))
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#define TIMER3_TCR ((volatile unsigned *)(TIMER_BASE + 0x44))
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#define TIMER3_TIC ((volatile unsigned *)(TIMER_BASE + 0x48))
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#define TIMER3_TIS ((volatile unsigned *)(TIMER_BASE + 0x4C))
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#define TIMER_TIS ((volatile unsigned *)(TIMER_BASE + 0xA0))
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#define TIMER_TIC ((volatile unsigned *)(TIMER_BASE + 0xA4))
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#define TIMER_RTIS ((volatile unsigned *)(TIMER_BASE + 0xA8))
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#define WDT_CR ((volatile unsigned *)(WDT_BASE + 0x00))
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#define WDT_TORR ((volatile unsigned *)(WDT_BASE + 0x04))
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#define WDT_CCVR ((volatile unsigned *)(WDT_BASE + 0x08))
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#define WDT_CRR ((volatile unsigned *)(WDT_BASE + 0x0C))
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#define WDT_STAT ((volatile unsigned *)(WDT_BASE + 0x10))
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#define WDT_ICR ((volatile unsigned *)(WDT_BASE + 0x14))
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#define NVIC_ISER0 ((volatile unsigned *)0xE000E100)
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#define NVIC_ISER1 ((volatile unsigned *)0xE000E104)
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#define NVIC_ISER2 ((volatile unsigned *)0xE000E108)
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#define NVIC_ISER3 ((volatile unsigned *)0xE000E10C)
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#define NVIC_ISER4 ((volatile unsigned *)0xE000E110)
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#define NVIC_ISER5 ((volatile unsigned *)0xE000E114)
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#define NVIC_ISER6 ((volatile unsigned *)0xE000E118)
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#define NVIC_ISER7 ((volatile unsigned *)0xE000E11C)
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#define I2C_CON ((volatile unsigned *)(I2C_BASE + 0x00))
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#define I2C_TAR ((volatile unsigned *)(I2C_BASE + 0x04))
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#define I2C_DATA_CMD ((volatile unsigned *)(I2C_BASE + 0x10))
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#define I2C_SS_SCL_HCNT ((volatile unsigned *)(I2C_BASE + 0x14))
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#define I2C_SS_SCL_LCNT ((volatile unsigned *)(I2C_BASE + 0x18))
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#define I2C_FS_SCL_HCNT ((volatile unsigned *)(I2C_BASE + 0x1c))
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#define I2C_FS_SCL_LCNT ((volatile unsigned *)(I2C_BASE + 0x20))
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#define I2C_INTR_STAT ((volatile unsigned *)(I2C_BASE + 0x2c))
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#define I2C_INTR_EN ((volatile unsigned *)(I2C_BASE + 0x30))
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#define I2C_RAW_INTR_STAT ((volatile unsigned *)(I2C_BASE + 0x34))
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#define I2C_RX_TL ((volatile unsigned *)(I2C_BASE + 0x38))
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#define I2C_TX_TL ((volatile unsigned *)(I2C_BASE + 0x3c))
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#define I2C_CLR_INTR ((volatile unsigned *)(I2C_BASE + 0x40))
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#define I2C_CLR_RX_UNDER ((volatile unsigned *)(I2C_BASE + 0x44))
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#define I2C_CLR_RX_OVER ((volatile unsigned *)(I2C_BASE + 0x48))
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#define I2C_CLR_TX_OVER ((volatile unsigned *)(I2C_BASE + 0x4c))
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#define I2C_CLR_TX_ABRT ((volatile unsigned *)(I2C_BASE + 0x54))
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#define I2C_CLR_ACTIVITY ((volatile unsigned *)(I2C_BASE + 0x5c))
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#define I2C_CLR_STOP_DET ((volatile unsigned *)(I2C_BASE + 0x60))
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#define I2C_CLR_START_DET ((volatile unsigned *)(I2C_BASE + 0x64))
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#define I2C_CLR_GEN_CALL ((volatile unsigned *)(I2C_BASE + 0x68))
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#define I2C_ENABLE ((volatile unsigned *)(I2C_BASE + 0x6c))
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#define I2C_STATUS ((volatile unsigned *)(I2C_BASE + 0x70))
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#define I2C_TXFLR ((volatile unsigned *)(I2C_BASE + 0x74))
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#define I2C_RXFLR ((volatile unsigned *)(I2C_BASE + 0x78))
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#define I2C_SDA_HOLD ((volatile unsigned *)(I2C_BASE + 0x7c))
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#define I2C_TX_ABRT_SOURCE ((volatile unsigned *)(I2C_BASE + 0x80))
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#define IC_SLV_DATA_NACK_ONLY ((volatile unsigned *)(I2C_BASE + 0x84))
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#define I2C_SAR ((volatile unsigned *)(I2C_BASE + 0x08))
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#define IC_ACK_GENERAL_CALL ((volatile unsigned *)(I2C_BASE + 0x98))
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#define IC_CLR_RD_REQ ((volatile unsigned *)(I2C_BASE + 0x50))
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#define UART0_RBR ((volatile unsigned *)(UART0_BASE + 0x00))
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#define UART0_THR ((volatile unsigned *)(UART0_BASE + 0x00))
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#define UART0_DLL ((volatile unsigned *)(UART0_BASE + 0x00))
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#define UART0_IER ((volatile unsigned *)(UART0_BASE + 0x04))
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#define UART0_DLH ((volatile unsigned *)(UART0_BASE + 0x04))
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#define UART0_IIR ((volatile unsigned *)(UART0_BASE + 0x08))
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#define UART0_FCR ((volatile unsigned *)(UART0_BASE + 0x08))
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#define UART0_TCR ((volatile unsigned *)(UART0_BASE + 0x0c))
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#define UART0_MCR ((volatile unsigned *)(UART0_BASE + 0x10))
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#define UART0_TSR ((volatile unsigned *)(UART0_BASE + 0x14))
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#define UART0_MSR ((volatile unsigned *)(UART0_BASE + 0x18))
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#define UART0_USR ((volatile unsigned *)(UART0_BASE + 0x7c))
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#define UART1_RBR ((volatile unsigned *)(UART1_BASE + 0x00))
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#define UART1_THR ((volatile unsigned *)(UART1_BASE + 0x00))
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#define UART1_DLL ((volatile unsigned *)(UART1_BASE + 0x00))
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#define UART1_IER ((volatile unsigned *)(UART1_BASE + 0x04))
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#define UART1_DLH ((volatile unsigned *)(UART1_BASE + 0x04))
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#define UART1_IIR ((volatile unsigned *)(UART1_BASE + 0x08))
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#define UART1_FCR ((volatile unsigned *)(UART1_BASE + 0x08))
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#define UART1_TCR ((volatile unsigned *)(UART1_BASE + 0x0c))
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#define UART1_MCR ((volatile unsigned *)(UART1_BASE + 0x10))
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#define UART1_TSR ((volatile unsigned *)(UART1_BASE + 0x14))
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#define UART1_MSR ((volatile unsigned *)(UART1_BASE + 0x18))
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#define UART1_USR ((volatile unsigned *)(UART1_BASE + 0x7c))
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#define DMAS_EN ((volatile unsigned *)(DMAS_BASE + 0x00))
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#define DMAS_CLR ((volatile unsigned *)(DMAS_BASE + 0x04))
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#define DMAS_STA ((volatile unsigned *)(DMAS_BASE + 0x08))
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#define DMAS_INT_RAW ((volatile unsigned *)(DMAS_BASE + 0x0C))
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#define DMAS_INT_EN0 ((volatile unsigned *)(DMAS_BASE + 0x10))
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#define DMAS_INT_EN1 ((volatile unsigned *)(DMAS_BASE + 0x14))
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#define DMAS_INT0 ((volatile unsigned *)(DMAS_BASE + 0x1C))
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#define DMAS_INT1 ((volatile unsigned *)(DMAS_BASE + 0x20))
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#define DMAS_INT_CLR ((volatile unsigned *)(DMAS_BASE + 0x28))
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#define DMAS_INTV_UNIT ((volatile unsigned *)(DMAS_BASE + 0x2C))
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#define DMAS_CH0_SAR ((volatile unsigned *)(DMAS_BASE + 0x40))
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#define DMAS_CH0_DAR ((volatile unsigned *)(DMAS_BASE + 0x44))
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#define DMAS_CH0_CTL0 ((volatile unsigned *)(DMAS_BASE + 0x48))
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#define DMAS_CH0_CTL1 ((volatile unsigned *)(DMAS_BASE + 0x4C))
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#define DMAS_CH0_CA ((volatile unsigned *)(DMAS_BASE + 0x50))
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#define DMAS_CH1_SAR ((volatile unsigned *)(DMAS_BASE + 0x60))
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#define DMAS_CH1_DAR ((volatile unsigned *)(DMAS_BASE + 0x64))
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#define DMAS_CH1_CTL0 ((volatile unsigned *)(DMAS_BASE + 0x68))
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#define DMAS_CH1_CTL1 ((volatile unsigned *)(DMAS_BASE + 0x6C))
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#define DMAS_CH1_CA ((volatile unsigned *)(DMAS_BASE + 0x70))
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#define DMAS_CH2_SAR ((volatile unsigned *)(DMAS_BASE + 0x80))
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#define DMAS_CH2_DAR ((volatile unsigned *)(DMAS_BASE + 0x84))
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#define DMAS_CH2_CTL0 ((volatile unsigned *)(DMAS_BASE + 0x88))
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#define DMAS_CH2_CTL1 ((volatile unsigned *)(DMAS_BASE + 0x8C))
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#define DMAS_CH2_CA ((volatile unsigned *)(DMAS_BASE + 0x90))
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#define DMAS_CH3_SAR ((volatile unsigned *)(DMAS_BASE + 0xA0))
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#define DMAS_CH3_DAR ((volatile unsigned *)(DMAS_BASE + 0xA4))
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#define DMAS_CH3_CTL0 ((volatile unsigned *)(DMAS_BASE + 0xA8))
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#define DMAS_CH3_CTL1 ((volatile unsigned *)(DMAS_BASE + 0xAC))
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#define DMAS_CH3_CA ((volatile unsigned *)(DMAS_BASE + 0xB0))
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#define DMAS_CH8_SAR ((volatile unsigned *)(DMAS_BASE + 0x140))
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#define DMAS_CH8_DAR ((volatile unsigned *)(DMAS_BASE + 0x144))
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#define DMAS_CH8_CTL0 ((volatile unsigned *)(DMAS_BASE + 0x148))
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#define DMAS_CH8_CTL1 ((volatile unsigned *)(DMAS_BASE + 0x14C))
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#define DMAS_CH8_CA ((volatile unsigned *)(DMAS_BASE + 0x150))
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#define DMAS_CH9_SAR ((volatile unsigned *)(DMAS_BASE + 0x160))
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#define DMAS_CH9_DAR ((volatile unsigned *)(DMAS_BASE + 0x164))
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#define DMAS_CH9_CTL0 ((volatile unsigned *)(DMAS_BASE + 0x168))
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#define DMAS_CH9_CTL1 ((volatile unsigned *)(DMAS_BASE + 0x16C))
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#define DMAS_CH9_CA ((volatile unsigned *)(DMAS_BASE + 0x170))
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#define DMAS_CH10_SAR ((volatile unsigned *)(DMAS_BASE + 0x180))
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#define DMAS_CH10_DAR ((volatile unsigned *)(DMAS_BASE + 0x184))
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#define DMAS_CH10_CTL0 ((volatile unsigned *)(DMAS_BASE + 0x188))
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#define DMAS_CH10_CTL1 ((volatile unsigned *)(DMAS_BASE + 0x18C))
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#define DMAS_CH10_CA ((volatile unsigned *)(DMAS_BASE + 0x190))
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#define DMAS_CH11_SAR ((volatile unsigned *)(DMAS_BASE + 0x1A0))
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#define DMAS_CH11_DAR ((volatile unsigned *)(DMAS_BASE + 0x1A4))
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#define DMAS_CH11_CTL0 ((volatile unsigned *)(DMAS_BASE + 0x1A8))
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#define DMAS_CH11_CTL1 ((volatile unsigned *)(DMAS_BASE + 0x1AC))
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#define DMAS_CH11_CA ((volatile unsigned *)(DMAS_BASE + 0x1B0))
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#define DMAS_CH0_WD ((volatile unsigned *)(DMAS_BASE + 0x240))
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#define DMAS_CH1_WD ((volatile unsigned *)(DMAS_BASE + 0x244))
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#define DMAS_CH2_WD ((volatile unsigned *)(DMAS_BASE + 0x248))
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#define DMAS_CH3_WD ((volatile unsigned *)(DMAS_BASE + 0x24C))
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#define DMAS_LP_CTL ((volatile unsigned *)(DMAS_BASE + 0x3FC))
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#define CPR_SLP_SRC_MASK ((volatile unsigned *)(CPR_BASE + 0x000))
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//#define CPR_SLP_CTL ((volatile unsigned *)(CPR_BASE + 0x004))
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//#define CPR_SLPCTL_INT_MASK ((volatile unsigned *)(CPR_BASE + 0x008))
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//#define CPR_SLP_PD_MASK ((volatile unsigned *)(CPR_BASE + 0x00c))
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#define CPR_SLP_CNT_LIMIT ((volatile unsigned *)(CPR_BASE + 0x010))
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#define CPR_SLP_ST ((volatile unsigned *)(CPR_BASE + 0x014))
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#define CPR_SLP_FSM_STATE ((volatile unsigned *)(CPR_BASE + 0x018))
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//#define CPR_SYSST_TIME ((volatile unsigned *)(CPR_BASE + 0x01c))
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#define CPR_M0_FCLK_GRCTL ((volatile unsigned *)(CPR_BASE + 0x020))
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#define CPR_CTL_PCLK_GRCTL ((volatile unsigned *)(CPR_BASE + 0x024))
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#define CPR_SIM_CLK_GRCTL ((volatile unsigned *)(CPR_BASE + 0x028))
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#define CPR_SIM_CLK_CTL ((volatile unsigned *)(CPR_BASE + 0x02c))
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#define CPR_UART0_CLK_GRCTL ((volatile unsigned *)(CPR_BASE + 0x030))
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#define CPR_UART0_CLK_CTL ((volatile unsigned *)(CPR_BASE + 0x034))
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#define CPR_UART1_CLK_GRCTL ((volatile unsigned *)(CPR_BASE + 0x038))
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#define CPR_UART1_CLK_CTL ((volatile unsigned *)(CPR_BASE + 0x03c))
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#define CPR_BT_CLK_CTL ((volatile unsigned *)(CPR_BASE + 0x040))
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#define CPR_BTRF_CLK_CTL ((volatile unsigned *)(CPR_BASE + 0x044))
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#define CPR_BT_MODEM_CLK_CTL ((volatile unsigned *)(CPR_BASE + 0x048))
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#define CPR_QDEC_CLK_CTL ((volatile unsigned *)(CPR_BASE + 0x04c))
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#define CPR_SPI0_MCLK_CTL ((volatile unsigned *)(CPR_BASE + 0x050))
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#define CPR_SPI1_MCLK_CTL ((volatile unsigned *)(CPR_BASE + 0x054))
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#define CPR_TIMER0_CLK_CTL ((volatile unsigned *)(CPR_BASE + 0x058))
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#define CPR_TIMER1_CLK_CTL ((volatile unsigned *)(CPR_BASE + 0x05c))
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#define CPR_TIMER2_CLK_CTL ((volatile unsigned *)(CPR_BASE + 0x060))
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#define CPR_TIMER3_CLK_CTL ((volatile unsigned *)(CPR_BASE + 0x064))
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#define CPR_PWM_CLK_CTL ((volatile unsigned *)(CPR_BASE + 0x068))
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#define CPR_AHBCLKEN_GRCTL ((volatile unsigned *)(CPR_BASE + 0x06c))
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#define CPR_CTLAPBCLKEN_GRCTL ((volatile unsigned *)(CPR_BASE + 0x070))
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#define CPR_OTHERCLKEN_GRCTL ((volatile unsigned *)(CPR_BASE + 0x074))
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#define CPR_I2C_CLK_CTL ((volatile unsigned *)(CPR_BASE + 0x078))
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#define CPR_INT ((volatile unsigned *)(CPR_BASE + 0x0a0))
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#define CPR_INT_EN ((volatile unsigned *)(CPR_BASE + 0x0a4))
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#define CPR_INT_RAW ((volatile unsigned *)(CPR_BASE + 0x0a8))
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#if 0
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#define CPR_PD_FLAG ((volatile unsigned *)(CPR_BASE + 0x0ac))
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#define CPR_ROM_PD_CTL ((volatile unsigned *)(CPR_BASE + 0x0b0))
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#define CPR_ROM_PD_CNT1 ((volatile unsigned *)(CPR_BASE + 0x0b4))
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#define CPR_ROM_PD_CNT2 ((volatile unsigned *)(CPR_BASE + 0x0b8))
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#define CPR_ROM_PD_CNT3 ((volatile unsigned *)(CPR_BASE + 0x0bc))
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#define CPR_BTRF_PD_CTL ((volatile unsigned *)(CPR_BASE + 0x0c0))
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#define CPR_BTRF_PD_CNT1 ((volatile unsigned *)(CPR_BASE + 0x0c4))
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#define CPR_BTRF_PD_CNT2 ((volatile unsigned *)(CPR_BASE + 0x0c8))
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#define CPR_BTRF_PD_CNT3 ((volatile unsigned *)(CPR_BASE + 0x0cc))
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#define CPR_M0RAM_PD_CTL ((volatile unsigned *)(CPR_BASE + 0x0d0))
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#define CPR_M0RAM_PD_CNT1 ((volatile unsigned *)(CPR_BASE + 0x0d4))
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#define CPR_M0RAM_PD_CNT2 ((volatile unsigned *)(CPR_BASE + 0x0d8))
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#define CPR_M0RAM_PD_CNT3 ((volatile unsigned *)(CPR_BASE + 0x0dc))
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#define CPR_SHRAM0_PD_CTL ((volatile unsigned *)(CPR_BASE + 0x0e0))
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#define CPR_SHRAM0_PD_CNT1 ((volatile unsigned *)(CPR_BASE + 0x0e4))
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#define CPR_SHRAM0_PD_CNT2 ((volatile unsigned *)(CPR_BASE + 0x0e8))
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#define CPR_SHRAM0_PD_CNT3 ((volatile unsigned *)(CPR_BASE + 0x0ec))
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#define CPR_SHRAM1_PD_CTL ((volatile unsigned *)(CPR_BASE + 0x0f0))
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#define CPR_SHRAM1_PD_CNT1 ((volatile unsigned *)(CPR_BASE + 0x0f4))
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#define CPR_SHRAM1_PD_CNT2 ((volatile unsigned *)(CPR_BASE + 0x0f8))
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#define CPR_SHRAM1_PD_CNT3 ((volatile unsigned *)(CPR_BASE + 0x0fc))
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#else
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#define CPR_GPIO_FUN_SEL0 ((volatile unsigned *)(CPR_BASE + 0x0c0))
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#define CPR_GPIO_FUN_SEL1 ((volatile unsigned *)(CPR_BASE + 0x0c4))
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#define CPR_GPIO_FUN_SEL2 ((volatile unsigned *)(CPR_BASE + 0x0c8))
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#define CPR_GPIO_FUN_SEL3 ((volatile unsigned *)(CPR_BASE + 0x0cc))
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#define CPR_GPIO_FUN_SEL4 ((volatile unsigned *)(CPR_BASE + 0x0d0))
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#define CPR_GPIO_FUN_SEL5 ((volatile unsigned *)(CPR_BASE + 0x0d4))
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#define CPR_GPIO_FUN_SEL6 ((volatile unsigned *)(CPR_BASE + 0x0d8))
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#define CPR_GPIO_FUN_SEL7 ((volatile unsigned *)(CPR_BASE + 0x0dc))
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#endif
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#define CPR_RSTCTL_CTLAPB_SW ((volatile unsigned *)(CPR_BASE + 0x100))
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#define CPR_RSTCTL_SUBRST_SW ((volatile unsigned *)(CPR_BASE + 0x104))
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#define CPR_RSTCTL_M0RST_SW ((volatile unsigned *)(CPR_BASE + 0x108))
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#define CPR_RSTCTL_M0RST_MASK ((volatile unsigned *)(CPR_BASE + 0x10c))
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#define CPR_RSTCTL_LOCKUP_STATE ((volatile unsigned *)(CPR_BASE + 0x110))
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#define CPR_RSTCTL_WDTRST_MASK ((volatile unsigned *)(CPR_BASE + 0x114))
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#define CPR_LP_CTL ((volatile unsigned *)(CPR_BASE + 0x118))
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#define CPR_RAM_RET1N ((volatile unsigned *)(CPR_BASE + 0x11c))
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#define CPR_CTL_M0_RAM_ICM_PRI ((volatile unsigned *)(CPR_BASE + 0x120))
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#define CPR_CTL_CTLAPB_ICM_PRI ((volatile unsigned *)(CPR_BASE + 0x124))
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#define CPR_CTL_MUXCTL1 ((volatile unsigned *)(CPR_BASE + 0x128))
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#define CPR_CTL_MUXCTL2 ((volatile unsigned *)(CPR_BASE + 0x12c))
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#define CPR_CTL_MUXCTL3 ((volatile unsigned *)(CPR_BASE + 0x19c))
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#define CPR_CTL_PECTL1 ((volatile unsigned *)(CPR_BASE + 0x130))
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#define CPR_CTL_PECTL2 ((volatile unsigned *)(CPR_BASE + 0x134))
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#define CPR_CTL_RAM_EMA ((volatile unsigned *)(CPR_BASE + 0x138))
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#define CPR_REMAP_CTRL ((volatile unsigned *)(CPR_BASE + 0x13c))
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#define CPR_CTL_BOOTCTL ((volatile unsigned *)(CPR_BASE + 0x140))
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#define CPR_CTL_M0_STCALIB ((volatile unsigned *)(CPR_BASE + 0x144))
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#define CPR_CTL_M0_IRQLATENCY ((volatile unsigned *)(CPR_BASE + 0x148))
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//#define CPR_CTL_CLK32K ((volatile unsigned *)(CPR_BASE + 0x14c))
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//#define CPR_AO_SYNC ((volatile unsigned *)(CPR_BASE + 0x150))
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//#define CPR_AO_REG0 ((volatile unsigned *)(CPR_BASE + 0x154))
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//#define CPR_AO_REG1 ((volatile unsigned *)(CPR_BASE + 0x158))
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//#define CPR_AO_CTRL ((volatile unsigned *)(CPR_BASE + 0x15c))
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#define CPR_SSI_CTRL ((volatile unsigned *)(CPR_BASE + 0x160))
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#define CPR_PMU_LDO ((volatile unsigned *)(CPR_BASE + 0x164))
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#define CPR_PMU_BOOST ((volatile unsigned *)(CPR_BASE + 0x168))
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#define CPR_PMU_BUCK ((volatile unsigned *)(CPR_BASE + 0x16c))
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#define CPR_TEST_CTRL0 ((volatile unsigned *)(CPR_BASE + 0x170))
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#define CPR_TEST_CTRL1 ((volatile unsigned *)(CPR_BASE + 0x174))
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#define CPR_TEST_CTRL2 ((volatile unsigned *)(CPR_BASE + 0x178))
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#define CPR_TEST_CTRL3 ((volatile unsigned *)(CPR_BASE + 0x17c))
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#define CPR_TEST_CTRL4 ((volatile unsigned *)(CPR_BASE + 0x180))
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#define CPR_TEST_CTRL5 ((volatile unsigned *)(CPR_BASE + 0x184))
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#define CPR_TEST_CTRL6 ((volatile unsigned *)(CPR_BASE + 0x188))
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#define CPR_TEST_CTRL7 ((volatile unsigned *)(CPR_BASE + 0x19c))
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#define CPR_TEST_CTRL8 ((volatile unsigned *)(CPR_BASE + 0x190))
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#define CPR_TEST_CTRL9 ((volatile unsigned *)(CPR_BASE + 0x194))
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//#define CPR_SIM_CARD ((volatile unsigned *)(CPR_BASE + 0x198))
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//- CPR_AO
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#define CPR_SLP_CTL ((volatile unsigned *)(CPR_AO_BASE + 0x4))
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#define CPR_SLPCTL_INT_MASK ((volatile unsigned *)(CPR_AO_BASE + 0x8))
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#define CPR_SLP_PD_MASK ((volatile unsigned *)(CPR_AO_BASE + 0xC))
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#define CPR_MCLK_DIV_CLK_CTL ((volatile unsigned *)(CPR_AO_BASE + 0x10))
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#define CPR_RFPMU_SPI_CTL ((volatile unsigned *)(CPR_AO_BASE + 0x14))
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#define CPR_SYS_TIME ((volatile unsigned *)(CPR_AO_BASE + 0x1C))
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#define CPR_AOCLKEN_GRCTL ((volatile unsigned *)(CPR_AO_BASE + 0x7C))
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#define CPR_CTL_CLK32K ((volatile unsigned *)(CPR_AO_BASE + 0x14C))
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#define CPR_AO_REG0 ((volatile unsigned *)(CPR_AO_BASE + 0x154))
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#define CPR_AO_REG1 ((volatile unsigned *)(CPR_AO_BASE + 0x158))
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#define CPR_AO_CTRL ((volatile unsigned *)(CPR_AO_BASE + 0x15C))
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#define BT_BASE 0x40020000
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#define BT_LC_BASE BT_BASE+0x6000
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#define BT_DSP_BASE BT_BASE+0x8000
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#define BT_PTA_BASE BT_BASE+0x9000
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#define BT_PHY_BASE BT_BASE+0xC000
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#define LE_BASE BT_BASE+0xa000
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//lc reg
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#define BT_BD_ADDR_LOW ((volatile unsigned *)(BT_LC_BASE+0x0))
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#define BT_BD_ADDR_HIGH ((volatile unsigned *)(BT_LC_BASE+0x4))
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#define BT_SYNCWORD_LOW ((volatile unsigned *)(BT_LC_BASE+0x8))
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#define BT_SYNCWORD_HIGH ((volatile unsigned *)(BT_LC_BASE+0xC))
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#define BT_INTRASLOT_OFFSET ((volatile unsigned *)(BT_LC_BASE+0x10))
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#define BT_CLK_UPDATE_INTRASLOT_VALUE ((volatile unsigned *)(BT_LC_BASE+0x14))
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#define BT_CLK_OFFSET ((volatile unsigned *)(BT_LC_BASE+0x18))
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#define BT_NATIVE_CLK ((volatile unsigned *)(BT_LC_BASE+0x1C))
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#define BT_COMMON_CTRL0 ((volatile unsigned *)(BT_LC_BASE+0x20))
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#define BT_COMMON_CTRL1 ((volatile unsigned *)(BT_LC_BASE+0x24))
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#define BT_INTR_CTRL ((volatile unsigned *)(BT_LC_BASE+0x28))
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#define BT_COMMON_STAT ((volatile unsigned *)(BT_LC_BASE+0x2C))
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#define BT_TX_CTRL ((volatile unsigned *)(BT_LC_BASE+0x30))
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#define BT_TX_CTRL_EDR ((volatile unsigned *)(BT_LC_BASE+0x710))
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#define BT_ESCO_CTRL ((volatile unsigned *)(BT_LC_BASE+0x34))
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#define BT_ESCO_CTRL_EDR ((volatile unsigned *)(BT_LC_BASE+0x720))
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#define BT_NATIVE_CNT ((volatile unsigned *)(BT_LC_BASE+0x38))
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#define BT_CODEC_TYPE ((volatile unsigned *)(BT_LC_BASE+0x3C))
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#define BT_TX_STAT ((volatile unsigned *)(BT_LC_BASE+0x40))
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#define BT_RX_CTRL ((volatile unsigned *)(BT_LC_BASE+0x48))
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#define BT_RX_STAT0_EDR ((volatile unsigned *)(BT_LC_BASE+0x730))
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#define BT_RX_STAT0 ((volatile unsigned *)(BT_LC_BASE+0x50))
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#define BT_RX_STAT1 ((volatile unsigned *)(BT_LC_BASE+0x54))
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#define BT_RX_STAT2 ((volatile unsigned *)(BT_LC_BASE+0x58))
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#define BT_RX_STAT3 ((volatile unsigned *)(BT_LC_BASE+0x5C))
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#define BT_SER_CFG ((volatile unsigned *)(BT_LC_BASE+0x64))
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#define BT_SER_READ_DATA ((volatile unsigned *)(BT_LC_BASE+0x6c))
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#define BT_RX_VOL_CTRL ((volatile unsigned *)(BT_LC_BASE+0x9C))
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#define BT_AUX_TIMER ((volatile unsigned *)(BT_LC_BASE+0xA0))
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#define BT_PATH_DELAY ((volatile unsigned *)(BT_LC_BASE+0xB0))
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#define BT_ENCRYP_KEY_LENGTH ((volatile unsigned *)(BT_LC_BASE+0xB8))
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#define BT_ENCRYP_KEY0 ((volatile unsigned *)(BT_LC_BASE+0xC0))
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#define BT_ENCRYP_KEY1 ((volatile unsigned *)(BT_LC_BASE+0xC4))
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#define BT_ENCRYP_KEY2 ((volatile unsigned *)(BT_LC_BASE+0xC8))
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#define BT_ENCRYP_KEY3 ((volatile unsigned *)(BT_LC_BASE+0xCC))
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#define BT_HSE0 ((volatile unsigned *)(BT_LC_BASE+0xD0))
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#define BT_HSE1 ((volatile unsigned *)(BT_LC_BASE+0xD4))
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#define BT_HSE2 ((volatile unsigned *)(BT_LC_BASE+0xD8))
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#define BT_HSE3 ((volatile unsigned *)(BT_LC_BASE+0xDC))
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#define BT_CLK_CTRL ((volatile unsigned *)(BT_LC_BASE+0xF0))
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#define BT_MEM_CFG ((volatile unsigned *)(BT_LC_BASE+0xF4))
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#define BT_REV_CODE ((volatile unsigned *)(BT_LC_BASE+0xF8))
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#define BT_RESET_CTRL ((volatile unsigned *)(BT_LC_BASE+0xFC))
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#define BT_WR_RX_HPF_FILTER ((volatile unsigned *)(BT_LC_BASE+0x110))
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#define BT_WR_RX_PF1_FILTER_A ((volatile unsigned *)(BT_LC_BASE+0x114))
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#define BT_WR_RX_PF1_FILTER_B ((volatile unsigned *)(BT_LC_BASE+0x118))
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#define BT_WR_RX_PF2_FILTER ((volatile unsigned *)(BT_LC_BASE+0x11C))
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#define BT_WR_RX_PF3_FILTER ((volatile unsigned *)(BT_LC_BASE+0x120))
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#define BT_WR_RX_CVSD_FILTER_A ((volatile unsigned *)(BT_LC_BASE+0x124))
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#define BT_WR_RX_CVSD_FILTER_B ((volatile unsigned *)(BT_LC_BASE+0x128))
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#define BT_WR_TX_HPF_FILTER ((volatile unsigned *)(BT_LC_BASE+0x130))
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#define BT_WR_TX_PF1_FILTER_A ((volatile unsigned *)(BT_LC_BASE+0x134))
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#define BT_WR_TX_PF1_FILTER_B ((volatile unsigned *)(BT_LC_BASE+0x138))
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#define BT_WR_TX_PF2_FILTER ((volatile unsigned *)(BT_LC_BASE+0x13C))
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#define BT_WR_TX_PF3_FILTER ((volatile unsigned *)(BT_LC_BASE+0x140))
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#define BT_WR_TX_CVSD_FILTER_A ((volatile unsigned *)(BT_LC_BASE+0x144))
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#define BT_WR_TX_CVSD_FILTER_B ((volatile unsigned *)(BT_LC_BASE+0x148))
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#define BT_TX_HPF_FILTER ((volatile unsigned *)(BT_LC_BASE+0x150))
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#define BT_TX_PF1_FILTER_A ((volatile unsigned *)(BT_LC_BASE+0x154))
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#define BT_TX_PF1_FILTER_B ((volatile unsigned *)(BT_LC_BASE+0x158))
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#define BT_TX_PF2_FILTER ((volatile unsigned *)(BT_LC_BASE+0x15C))
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#define BT_TX_PF3_FILTER ((volatile unsigned *)(BT_LC_BASE+0x160))
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#define BT_TX_CVSD_FILTER_A ((volatile unsigned *)(BT_LC_BASE+0x164))
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#define BT_TX_CVSD_FILTER_B ((volatile unsigned *)(BT_LC_BASE+0x168))
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#define BT_RX_HPF_FILTER ((volatile unsigned *)(BT_LC_BASE+0x170))
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#define BT_RX_PF1_FILTER_A ((volatile unsigned *)(BT_LC_BASE+0x174))
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#define BT_RX_PF1_FILTER_B ((volatile unsigned *)(BT_LC_BASE+0x178))
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#define BT_RX_PF2_FILTER ((volatile unsigned *)(BT_LC_BASE+0x17C))
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#define BT_RX_PF3_FILTER ((volatile unsigned *)(BT_LC_BASE+0x180))
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#define BT_RX_CVSD_FILTER_A ((volatile unsigned *)(BT_LC_BASE+0x184))
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#define BT_RX_CVSD_FILTER_B ((volatile unsigned *)(BT_LC_BASE+0x188))
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#define BT_SCO_FIFO_CTRL ((volatile unsigned *)(BT_LC_BASE+0x1A0))
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#define BT_SCO_FIFO_TX_DATA ((volatile unsigned *)(BT_LC_BASE+0x1A4))
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#define BT_SCO_FIFO_RX_DATA ((volatile unsigned *)(BT_LC_BASE+0x1A4))
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#define BT_TX_ACL ((volatile unsigned *)(BT_LC_BASE+0x200))
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#define BT_RX_ACL ((volatile unsigned *)(BT_LC_BASE+0x400))
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#define BT_TX_ACL_EDR ((volatile unsigned *)(BT_LC_BASE+0x740))
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#define BT_RX_ACL_EDR ((volatile unsigned *)(BT_LC_BASE+0xB80))
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#define BT_SER_DATA16_0 ((volatile unsigned *)(BT_LC_BASE+0x600))
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#define BT_SER_DATA16_1 ((volatile unsigned *)(BT_LC_BASE+0x604))
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#define BT_SER_DATA16_2 ((volatile unsigned *)(BT_LC_BASE+0x608))
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#define BT_SER_DATA16_3 ((volatile unsigned *)(BT_LC_BASE+0x60C))
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#define BT_SER_DATA16_4 ((volatile unsigned *)(BT_LC_BASE+0x610))
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#define BT_SER_DATA16_5 ((volatile unsigned *)(BT_LC_BASE+0x614))
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#define BT_SER_DATA16_6 ((volatile unsigned *)(BT_LC_BASE+0x618))
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#define BT_SER_DATA16_7 ((volatile unsigned *)(BT_LC_BASE+0x61C))
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#define BT_SER_DATA16_8 ((volatile unsigned *)(BT_LC_BASE+0x620))
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#define BT_SER_DATA16_9 ((volatile unsigned *)(BT_LC_BASE+0x624))
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#define BT_SER_DATA16_10 ((volatile unsigned *)(BT_LC_BASE+0x628))
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#define BT_SER_DATA16_11 ((volatile unsigned *)(BT_LC_BASE+0x62C))
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#define BT_SER_DATA16_12 ((volatile unsigned *)(BT_LC_BASE+0x630))
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#define BT_SER_DATA16_13 ((volatile unsigned *)(BT_LC_BASE+0x634))
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#define BT_SER_DATA16_14 ((volatile unsigned *)(BT_LC_BASE+0x638))
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#define BT_SER_DATA16_15 ((volatile unsigned *)(BT_LC_BASE+0x63C))
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#define BT_EDR_CTRL ((volatile unsigned *)(BT_LC_BASE+0x700))
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#define BT_SPI_CFG ((volatile unsigned *)(BT_LC_BASE+0x60))
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#define BT_SER_CTRL ((volatile unsigned *)(BT_LC_BASE+0x64))
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#define BT_SPI_RD_DATA ((volatile unsigned *)(BT_LC_BASE+0x6C))
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#define BT_SPI_DATA0 ((volatile unsigned *)(BT_LC_BASE+0x70))
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#define BT_SPI_DATA1 ((volatile unsigned *)(BT_LC_BASE+0x74))
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#define BT_SPI_DATA2 ((volatile unsigned *)(BT_LC_BASE+0x78))
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#define BT_SPI_DATA3 ((volatile unsigned *)(BT_LC_BASE+0x7C))
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//dsp reg
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#define BT_DSP_RX_CTRL ((volatile unsigned *)(BT_DSP_BASE+0x8))
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#define BT_DSP_INTR_CTRL0 ((volatile unsigned *)(BT_DSP_BASE+0x20))
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#define BT_DSP_INTR_CTRL1 ((volatile unsigned *)(BT_DSP_BASE+0x24))
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#define BT_PHY_CFG ((volatile unsigned *)(BT_DSP_BASE+0x28))
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#define BT_DSP_STAT ((volatile unsigned *)(BT_DSP_BASE+0x2C))
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#define BT_GIO_HIGH_CTRL_01 ((volatile unsigned *)(BT_DSP_BASE+0x30))
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#define BT_GIO_HIGH_CTRL_23 ((volatile unsigned *)(BT_DSP_BASE+0x34))
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#define BT_GIO_HIGH_CTRL_45 ((volatile unsigned *)(BT_DSP_BASE+0x38))
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#define BT_GIO_HIGH_CTRL_67 ((volatile unsigned *)(BT_DSP_BASE+0x3C))
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#define BT_GIO_HIGH_CTRL_89 ((volatile unsigned *)(BT_DSP_BASE+0x40))
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#define BT_GIO_HIGH_CTRL_1011 ((volatile unsigned *)(BT_DSP_BASE+0x44))
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#define BT_GIO_LOW_CTRL_01 ((volatile unsigned *)(BT_DSP_BASE+0x48))
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#define BT_GIO_LOW_CTRL_23 ((volatile unsigned *)(BT_DSP_BASE+0x4C))
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#define BT_GIO_LOW_CTRL_45 ((volatile unsigned *)(BT_DSP_BASE+0x50))
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#define BT_GIO_LOW_CTRL_67 ((volatile unsigned *)(BT_DSP_BASE+0x54))
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#define BT_GIO_LOW_CTRL_89 ((volatile unsigned *)(BT_DSP_BASE+0x58))
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#define BT_GIO_LOW_CTRL_1011 ((volatile unsigned *)(BT_DSP_BASE+0x5C))
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#define BT_GIO_COMB_0123 ((volatile unsigned *)(BT_DSP_BASE+0x60))
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#define BT_GIO_COMB_4567 ((volatile unsigned *)(BT_DSP_BASE+0x64))
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#define BT_GIO_COMB_891011 ((volatile unsigned *)(BT_DSP_BASE+0x68))
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#define BT_GIO_WIN_EXT_HIGH_011 ((volatile unsigned *)(BT_DSP_BASE+0x80))
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#define BT_GIO_WIN_EXT_LOW_011 ((volatile unsigned *)(BT_DSP_BASE+0x84))
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|
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|
//PTA
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#define BT_GIO_HIGH_CTRL_1213 ((volatile unsigned *)(BT_PTA_BASE+0xB0))
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#define BT_GIO_HIGH_CTRL_1415 ((volatile unsigned *)(BT_PTA_BASE+0xB4))
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#define BT_GIO_HIGH_CTRL_1617 ((volatile unsigned *)(BT_PTA_BASE+0xB8))
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#define BT_GIO_HIGH_CTRL_1819 ((volatile unsigned *)(BT_PTA_BASE+0xBC))
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#define BT_GIO_HIGH_CTRL_2021 ((volatile unsigned *)(BT_PTA_BASE+0xC0))
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#define BT_GIO_HIGH_CTRL_2223 ((volatile unsigned *)(BT_PTA_BASE+0xC4))
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|
#define BT_GIO_LOW_CTRL_1213 ((volatile unsigned *)(BT_PTA_BASE+0xC8))
|
|
#define BT_GIO_LOW_CTRL_1415 ((volatile unsigned *)(BT_PTA_BASE+0xCC))
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|
#define BT_GIO_LOW_CTRL_1617 ((volatile unsigned *)(BT_PTA_BASE+0xD0))
|
|
#define BT_GIO_LOW_CTRL_1819 ((volatile unsigned *)(BT_PTA_BASE+0xD4))
|
|
#define BT_GIO_LOW_CTRL_2021 ((volatile unsigned *)(BT_PTA_BASE+0xD8))
|
|
#define BT_GIO_LOW_CTRL_2223 ((volatile unsigned *)(BT_PTA_BASE+0xDC))
|
|
#define BT_GIO_COMB_12131415 ((volatile unsigned *)(BT_PTA_BASE+0xE0))
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|
#define BT_GIO_COMB_16171819 ((volatile unsigned *)(BT_PTA_BASE+0xE4))
|
|
#define BT_GIO_COMB_20212223 ((volatile unsigned *)(BT_PTA_BASE+0xE8))
|
|
#define BT_GIO_WIN_EXT_HIGH_1223 ((volatile unsigned *)(BT_PTA_BASE+0xF0))
|
|
#define BT_GIO_WIN_EXT_LOW_1223 ((volatile unsigned *)(BT_PTA_BASE+0xF4))
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|
|
|
//phy reg
|
|
#define BTPHY_CTL0 ((volatile unsigned *)(BT_PHY_BASE+0x240))
|
|
#define BTPHY_CTL1 ((volatile unsigned *)(BT_PHY_BASE+0x244))
|
|
#define BTPHY_SYNCWORD ((volatile unsigned *)(BT_PHY_BASE+0x248))
|
|
#define BTPHY_MODEM_PARAM0 ((volatile unsigned *)(BT_PHY_BASE+0x250))
|
|
#define BTPHY_MODEM_PARAM1 ((volatile unsigned *)(BT_PHY_BASE+0x258))
|
|
#define BTPHY_MODEM_PARAM2 ((volatile unsigned *)(BT_PHY_BASE+0x25c))
|
|
#define BTPHY_MODEM_PARAM3 ((volatile unsigned *)(BT_PHY_BASE+0x260))
|
|
#define BTPHY_AGC_CTL0 ((volatile unsigned *)(BT_PHY_BASE+0x264))
|
|
#define BTPHY_AGC_CTL1 ((volatile unsigned *)(BT_PHY_BASE+0x268))
|
|
#define BTPHY_AGC_CTL2 ((volatile unsigned *)(BT_PHY_BASE+0x26c))
|
|
#define BTPHY_DC_NOTCH_CTL ((volatile unsigned *)(BT_PHY_BASE+0x270))
|
|
#define BTPHY_DATAPATH_CTL ((volatile unsigned *)(BT_PHY_BASE+0x274))
|
|
#define BTPHY_TXRX_CTL ((volatile unsigned *)(BT_PHY_BASE+0x278))
|
|
#define BTPHY_TXDELAY_CTL0 ((volatile unsigned *)(BT_PHY_BASE+0x27c))
|
|
#define BTPHY_TXDELAY_CTL1 ((volatile unsigned *)(BT_PHY_BASE+0x280))
|
|
#define BTPHY_TXDELAY_CTL2 ((volatile unsigned *)(BT_PHY_BASE+0x284))
|
|
#define BTPHY_RXDELAY_CTL0 ((volatile unsigned *)(BT_PHY_BASE+0x288))
|
|
#define BTPHY_RXDELAY_CTL1 ((volatile unsigned *)(BT_PHY_BASE+0x28c))
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#define BTPHY_RXDELAY_CTL2 ((volatile unsigned *)(BT_PHY_BASE+0x290))
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#define BTPHY_SOFTGAIN_CTL ((volatile unsigned *)(BT_PHY_BASE+0x294))
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#define BTPHY_AGCCFG_CTL0 ((volatile unsigned *)(BT_PHY_BASE+0x298))
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#define BTPHY_AGCCFG_CTL1 ((volatile unsigned *)(BT_PHY_BASE+0x29c))
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#define BTPHY_AGCCFG_CTL2 ((volatile unsigned *)(BT_PHY_BASE+0x2a0))
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#define BTPHY_AGCCFG_CTL3 ((volatile unsigned *)(BT_PHY_BASE+0x2a4))
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#define BTPHY_AGCCFG_CTL4 ((volatile unsigned *)(BT_PHY_BASE+0x2a8))
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#define BTPHY_AGCCFG_CTL5 ((volatile unsigned *)(BT_PHY_BASE+0x2ac))
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#define BTPHY_AGCCFG_CTL6 ((volatile unsigned *)(BT_PHY_BASE+0x2b0))
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#define BTPHY_AGCCFG_CTL7 ((volatile unsigned *)(BT_PHY_BASE+0x2b4))
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#define BTPHY_AGCCFG_CTL8 ((volatile unsigned *)(BT_PHY_BASE+0x2b8))
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#define BTPHY_AGCCFG_CTL9 ((volatile unsigned *)(BT_PHY_BASE+0x2bc))
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#define BTPHY_AGCCFG_CTL10 ((volatile unsigned *)(BT_PHY_BASE+0x2c0))
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#define BTPHY_AGCCFG_CTL11 ((volatile unsigned *)(BT_PHY_BASE+0x2c4))
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#define BTPHY_AGCCFG_CTL12 ((volatile unsigned *)(BT_PHY_BASE+0x2c8))
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#define BTPHY_AGCCFG_CTL13 ((volatile unsigned *)(BT_PHY_BASE+0x2cc))
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#define BTPHY_AGCCFG_CTL14 ((volatile unsigned *)(BT_PHY_BASE+0x2d0))
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#define BTPHY_AGCCFG_CTL15 ((volatile unsigned *)(BT_PHY_BASE+0x2d4))
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#define BTPHY_AGCCMP_CTL0 ((volatile unsigned *)(BT_PHY_BASE+0x2d8))
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#define BTPHY_AGCCMP_CTL1 ((volatile unsigned *)(BT_PHY_BASE+0x2dc))
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#define BTPHY_AGCCMP_CTL2 ((volatile unsigned *)(BT_PHY_BASE+0x2e0))
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#define BTPHY_AGCCMP_CTL3 ((volatile unsigned *)(BT_PHY_BASE+0x2e4))
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#define BTPHY_AGCCMP_CTL4 ((volatile unsigned *)(BT_PHY_BASE+0x2e8))
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#define BTPHY_AGCCMP_CTL5 ((volatile unsigned *)(BT_PHY_BASE+0x2ec))
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#define BTPHY_AGCCMP_CTL6 ((volatile unsigned *)(BT_PHY_BASE+0x2f0))
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#define BTPHY_AGCCMP_CTL7 ((volatile unsigned *)(BT_PHY_BASE+0x2f4))
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#define BTPHY_RSSI_STAT ((volatile unsigned *)(BT_PHY_BASE+0x300))
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#define BTPHY_INITAGC_STAT ((volatile unsigned *)(BT_PHY_BASE+0x304))
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#define BTPHY_FINEAGC_STAT ((volatile unsigned *)(BT_PHY_BASE+0x308))
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#define BTPHY_RXPWR_STAT ((volatile unsigned *)(BT_PHY_BASE+0x30c))
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#define BTPHY_CFO_STAT ((volatile unsigned *)(BT_PHY_BASE+0x310))
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#define BTPHY_TIMINGERR_STAT ((volatile unsigned *)(BT_PHY_BASE+0x314))
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#define BTPHY_XCORR_STAT ((volatile unsigned *)(BT_PHY_BASE+0x318))
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#define BTPHY_DC_STAT ((volatile unsigned *)(BT_PHY_BASE+0x310))
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//le reg
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#define LE_COMM_CTRL ((volatile unsigned *)(LE_BASE+0x0))
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#define LE_PD_ADDR_LOW ((volatile unsigned *)(LE_BASE+0x4))
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#define LE_PD_ADDR_HIGH ((volatile unsigned *)(LE_BASE+0x8))
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#define LE_RD_ADDR_LOW ((volatile unsigned *)(LE_BASE+0xC))
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#define LE_RD_ADDR_HIGH ((volatile unsigned *)(LE_BASE+0x10))
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#define LE_ACC_ADDR ((volatile unsigned *)(LE_BASE+0x14))
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#define LE_READ_ONLY_REG ((volatile unsigned *)(LE_BASE+0x18))
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#define LE_CRC_INIT ((volatile unsigned *)(LE_BASE+0x1C))
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#define LE_AES_KEY0 ((volatile unsigned *)(LE_BASE+0x20))
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#define LE_AES_KEY1 ((volatile unsigned *)(LE_BASE+0x24))
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#define LE_AES_KEY2 ((volatile unsigned *)(LE_BASE+0x28))
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#define LE_AES_KEY3 ((volatile unsigned *)(LE_BASE+0x2C))
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#define LE_AES_IV_LOW ((volatile unsigned *)(LE_BASE+0x30))
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#define LE_AES_IV_HIGH ((volatile unsigned *)(LE_BASE+0x34))
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#define LE_AES_PKT0 ((volatile unsigned *)(LE_BASE+0x38))
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#define LE_AES_PKT1 ((volatile unsigned *)(LE_BASE+0x3C))
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#define LE_TX_HEADER ((volatile unsigned *)(LE_BASE+0x40))
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#define LE_RX_HEADER ((volatile unsigned *)(LE_BASE+0x44))
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#define LE_AUX_LE_TIMER1 ((volatile unsigned *)(LE_BASE+0x48))
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#define LE_AUX_LE_TIMER2 ((volatile unsigned *)(LE_BASE+0x4C))
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#define LE_COMM_STATUS ((volatile unsigned *)(LE_BASE+0x50))
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#define LE_AES_MIC ((volatile unsigned *)(LE_BASE+0x200))
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#define LE_AES_DATA0 ((volatile unsigned *)(LE_BASE+0x204))
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#define LE_AES_DATA1 ((volatile unsigned *)(LE_BASE+0x208))
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#define LE_AES_DATA2 ((volatile unsigned *)(LE_BASE+0x20C))
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#define LE_AES_DATA3 ((volatile unsigned *)(LE_BASE+0x210))
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#define LE_AES_DATA4 ((volatile unsigned *)(LE_BASE+0x214))
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#define LE_AES_DATA5 ((volatile unsigned *)(LE_BASE+0x218))
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#define LE_AES_DATA6 ((volatile unsigned *)(LE_BASE+0x21C))
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#define LE_DELAY_CTRL ((volatile unsigned *)(LE_BASE+0xA0))
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#define LE_FILTER_CTRL ((volatile unsigned *)(LE_BASE+0x58))
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#define LE_WHITE_LIST_LOW0 ((volatile unsigned *)(LE_BASE+0x60))
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#define LE_WHITE_LIST_HIGH0 ((volatile unsigned *)(LE_BASE+0x64))
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#define LE_WHITE_LIST_LOW1 ((volatile unsigned *)(LE_BASE+0x68))
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#define LE_WHITE_LIST_HIGH1 ((volatile unsigned *)(LE_BASE+0x6C))
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#define LE_WHITE_LIST_LOW2 ((volatile unsigned *)(LE_BASE+0x70))
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#define LE_WHITE_LIST_HIGH2 ((volatile unsigned *)(LE_BASE+0x74))
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#define LE_WHITE_LIST_LOW3 ((volatile unsigned *)(LE_BASE+0x78))
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#define LE_WHITE_LIST_HIGH3 ((volatile unsigned *)(LE_BASE+0x7C))
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#define LE_WHITE_LIST_LOW4 ((volatile unsigned *)(LE_BASE+0x80))
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#define LE_WHITE_LIST_HIGH4 ((volatile unsigned *)(LE_BASE+0x84))
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#define LE_WHITE_LIST_LOW5 ((volatile unsigned *)(LE_BASE+0x88))
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#define LE_WHITE_LIST_HIGH5 ((volatile unsigned *)(LE_BASE+0x8C))
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#define LE_DIRECT_ADDR_LOW ((volatile unsigned *)(LE_BASE+0x90))
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#define LE_DIRECT_ADDR_HIGH ((volatile unsigned *)(LE_BASE+0x94))
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#define LE_LOCAL_ADDR_LOW ((volatile unsigned *)(LE_BASE+0x98))
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#define LE_LOCAL_ADDR_HIGH ((volatile unsigned *)(LE_BASE+0x9C))
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#define SSI0_CTRL0 ((volatile unsigned *)(SPI0_BASE + 0x00))
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#define SSI0_EN ((volatile unsigned *)(SPI0_BASE + 0x08))
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#define SSI0_SE ((volatile unsigned *)(SPI0_BASE + 0x10))
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#define SSI0_BAUD ((volatile unsigned *)(SPI0_BASE + 0x14))
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#define SSI0_TXFTL ((volatile unsigned *)(SPI0_BASE + 0x18))
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#define SSI0_RXFTL ((volatile unsigned *)(SPI0_BASE + 0x1c))
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#define SSI0_TXFL ((volatile unsigned *)(SPI0_BASE + 0x20))
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#define SSI0_RXFL ((volatile unsigned *)(SPI0_BASE + 0x24))
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#define SSI0_STS ((volatile unsigned *)(SPI0_BASE + 0x28))
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#define SSI0_IE ((volatile unsigned *)(SPI0_BASE + 0x2c))
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#define SSI0_IS ((volatile unsigned *)(SPI0_BASE + 0x30))
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#define SSI0_RIS ((volatile unsigned *)(SPI0_BASE + 0x34))
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#define SSI0_TXOIC ((volatile unsigned *)(SPI0_BASE + 0x38))
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#define SSI0_RXOIC ((volatile unsigned *)(SPI0_BASE + 0x3c))
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#define SSI0_RXUIC ((volatile unsigned *)(SPI0_BASE + 0x40))
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#define SSI0_IC ((volatile unsigned *)(SPI0_BASE + 0x48))
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#define SSI0_DMAS ((volatile unsigned *)(SPI0_BASE + 0x4c))
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#define SSI0_DMATDL ((volatile unsigned *)(SPI0_BASE + 0x50))
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#define SSI0_DMARDL ((volatile unsigned *)(SPI0_BASE + 0x54))
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#define SSI0_DATA ((volatile unsigned *)(SPI0_BASE + 0x60))
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#define SSI0_CTRLR0 ((volatile unsigned *)(SPI0_BASE + 0xF4))
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#define SSI1_CTRL0 ((volatile unsigned *)(SPI1_BASE + 0x00))
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#define SSI1_EN ((volatile unsigned *)(SPI1_BASE + 0x08))
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#define SSI1_SE ((volatile unsigned *)(SPI1_BASE + 0x10))
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#define SSI1_BAUD ((volatile unsigned *)(SPI1_BASE + 0x14))
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#define SSI1_TXFTL ((volatile unsigned *)(SPI1_BASE + 0x18))
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#define SSI1_RXFTL ((volatile unsigned *)(SPI1_BASE + 0x1c))
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#define SSI1_TXFL ((volatile unsigned *)(SPI1_BASE + 0x20))
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#define SSI1_RXFL ((volatile unsigned *)(SPI1_BASE + 0x24))
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#define SSI1_STS ((volatile unsigned *)(SPI1_BASE + 0x28))
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#define SSI1_IE ((volatile unsigned *)(SPI1_BASE + 0x2c))
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#define SSI1_IS ((volatile unsigned *)(SPI1_BASE + 0x30))
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#define SSI1_RIS ((volatile unsigned *)(SPI1_BASE + 0x34))
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#define SSI1_TXOIC ((volatile unsigned *)(SPI1_BASE + 0x38))
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#define SSI1_RXOIC ((volatile unsigned *)(SPI1_BASE + 0x3c))
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#define SSI1_RXUIC ((volatile unsigned *)(SPI1_BASE + 0x40))
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#define SSI1_IC ((volatile unsigned *)(SPI1_BASE + 0x48))
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#define SSI1_DMAS ((volatile unsigned *)(SPI1_BASE + 0x4c))
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#define SSI1_DMATDL ((volatile unsigned *)(SPI1_BASE + 0x50))
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#define SSI1_DMARDL ((volatile unsigned *)(SPI1_BASE + 0x54))
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#define SSI1_DATA ((volatile unsigned *)(SPI1_BASE + 0x60))
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#define SIM_PORT ((volatile unsigned *)(SIM_BASE + 0x0000))
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#define SIM_CNTL ((volatile unsigned *)(SIM_BASE + 0x0004))
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#define SIM_ENABLE ((volatile unsigned *)(SIM_BASE + 0x000c))
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#define SIM_INT_STAT ((volatile unsigned *)(SIM_BASE + 0x0010))
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#define SIM_INT_RAW_STAT ((volatile unsigned *)(SIM_BASE + 0x0014))
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#define SIM_INT_ENABLE ((volatile unsigned *)(SIM_BASE + 0x0018))
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#define SIM_XMT_BUF ((volatile unsigned *)(SIM_BASE + 0x001c))
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#define SIM_RCV_BUF ((volatile unsigned *)(SIM_BASE + 0x0020))
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#define SIM_XMT_TH ((volatile unsigned *)(SIM_BASE + 0x0024))
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#define SIM_GUARD ((volatile unsigned *)(SIM_BASE + 0x0028))
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#define SIM_SRES ((volatile unsigned *)(SIM_BASE + 0x002c))
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#define SIM_CH_WAIT ((volatile unsigned *)(SIM_BASE + 0x0030))
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#define SIM_GPCNT ((volatile unsigned *)(SIM_BASE + 0x0034))
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#define SIM_DIVISOR ((volatile unsigned *)(SIM_BASE + 0x0038))
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#define KBS_CTL ((volatile unsigned *)(KBS_BASE + 0x0000))
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#define KBS_MASK ((volatile unsigned *)(KBS_BASE + 0x0004))
|
|
#define KBS_DETECT_INTVAL ((volatile unsigned *)(KBS_BASE + 0x0008))
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|
#define KBS_DBC_INTVAL ((volatile unsigned *)(KBS_BASE + 0x000C))
|
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#define KBS_LPRS_INTVAL ((volatile unsigned *)(KBS_BASE + 0x0010))
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|
#define KBS_MTXKEY_MANUAL_ROWOUT ((volatile unsigned *)(KBS_BASE + 0x0014))
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#define KBS_MTXKEY_MANUAL_COLIN ((volatile unsigned *)(KBS_BASE + 0x0018))
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|
#define KBS_MTXKEY_FIFO ((volatile unsigned *)(KBS_BASE + 0x001C))
|
|
#define KBS_MTXKEY_ASREG0 ((volatile unsigned *)(KBS_BASE + 0x0020))
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|
#define KBS_MTXKEY_ASREG1 ((volatile unsigned *)(KBS_BASE + 0x0024))
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|
#define KBS_MTXKEY_INT ((volatile unsigned *)(KBS_BASE + 0x0028))
|
|
#define KBS_MTXKEY_INT_RAW ((volatile unsigned *)(KBS_BASE + 0x002C))
|
|
#define KBS_MTXKEY_INT_EN ((volatile unsigned *)(KBS_BASE + 0x0030))
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|
|
|
#define QDEC_CTL ((volatile unsigned *)(QDEC_BASE + 0x0000))
|
|
#define QDEC_INT ((volatile unsigned *)(QDEC_BASE + 0x0004))
|
|
#define QDEC_INT_RAW ((volatile unsigned *)(QDEC_BASE + 0x0008))
|
|
#define QDEC_INT_EN ((volatile unsigned *)(QDEC_BASE + 0x000c))
|
|
#define QDEC_XCNT ((volatile unsigned *)(QDEC_BASE + 0x0010))
|
|
#define QDEC_YCNT ((volatile unsigned *)(QDEC_BASE + 0x0014))
|
|
#define QDEC_ZCNT ((volatile unsigned *)(QDEC_BASE + 0x0018))
|
|
#define QDEC_SAMPLE ((volatile unsigned *)(QDEC_BASE + 0x001c))
|
|
#define QDEC_FIFO_CFG ((volatile unsigned *)(QDEC_BASE + 0x0020))
|
|
#define QDEC_FIFO_NUM ((volatile unsigned *)(QDEC_BASE + 0x0024))
|
|
|
|
#define PWM0_EN ((volatile unsigned *)(PWM_BASE + 0x0000))
|
|
#define PWM0_UP ((volatile unsigned *)(PWM_BASE + 0x0004))
|
|
#define PWM0_RST ((volatile unsigned *)(PWM_BASE + 0x0008))
|
|
#define PWM0_P ((volatile unsigned *)(PWM_BASE + 0x000c))
|
|
#define PWM0_OCPY ((volatile unsigned *)(PWM_BASE + 0x0010))
|
|
#define PWM1_EN ((volatile unsigned *)(PWM_BASE + 0x0040))
|
|
#define PWM1_UP ((volatile unsigned *)(PWM_BASE + 0x0044))
|
|
#define PWM1_RST ((volatile unsigned *)(PWM_BASE + 0x0048))
|
|
#define PWM1_P ((volatile unsigned *)(PWM_BASE + 0x004c))
|
|
#define PWM1_OCPY ((volatile unsigned *)(PWM_BASE + 0x0050))
|
|
|
|
#define GPADC_MAIN_CTL ((volatile unsigned *)(GPADC_BASE + 0x0000))
|
|
#define GPADC_CHAN_CTL ((volatile unsigned *)(GPADC_BASE + 0x0004))
|
|
#define GPADC_FIFO_CTL ((volatile unsigned *)(GPADC_BASE + 0x0008))
|
|
#define GPADC_TIMER0 ((volatile unsigned *)(GPADC_BASE + 0x000c))
|
|
#define GPADC_TIMER1 ((volatile unsigned *)(GPADC_BASE + 0x0010))
|
|
#define GPADC_INT ((volatile unsigned *)(GPADC_BASE + 0x0014))
|
|
#define GPADC_INT_RAW ((volatile unsigned *)(GPADC_BASE + 0x0018))
|
|
#define GPADC_INT_EN ((volatile unsigned *)(GPADC_BASE + 0x001c))
|
|
#define GPADC_FIFO ((volatile unsigned *)(GPADC_BASE + 0x0020))
|
|
#define GPADC_RF_CTL ((volatile unsigned *)(GPADC_BASE + 0x0024))
|
|
|
|
#define AES_START ((volatile unsigned *)(AES_BASE + 0x0000))
|
|
#define AES_CTL ((volatile unsigned *)(AES_BASE + 0x0004))
|
|
#define AES_INTR ((volatile unsigned *)(AES_BASE + 0x0008))
|
|
#define AES_INTE ((volatile unsigned *)(AES_BASE + 0x000c))
|
|
#define AES_INTS ((volatile unsigned *)(AES_BASE + 0x0010))
|
|
#define AES_KEY_LEN ((volatile unsigned *)(AES_BASE + 0x0014))
|
|
#define AES_KEY_UPDATE ((volatile unsigned *)(AES_BASE + 0x0018))
|
|
#define AES_BLK_NUM ((volatile unsigned *)(AES_BASE + 0x001c))
|
|
#define AES_IN0 ((volatile unsigned *)(AES_BASE + 0x0040))
|
|
#define AES_IN1 ((volatile unsigned *)(AES_BASE + 0x0044))
|
|
#define AES_IN2 ((volatile unsigned *)(AES_BASE + 0x0048))
|
|
#define AES_IN3 ((volatile unsigned *)(AES_BASE + 0x004c))
|
|
#define AES_OUT0 ((volatile unsigned *)(AES_BASE + 0x0050))
|
|
#define AES_OUT1 ((volatile unsigned *)(AES_BASE + 0x0054))
|
|
#define AES_OUT2 ((volatile unsigned *)(AES_BASE + 0x0058))
|
|
#define AES_OUT3 ((volatile unsigned *)(AES_BASE + 0x005c))
|
|
#define AES_KEY0 ((volatile unsigned *)(AES_BASE + 0x0060))
|
|
#define AES_KEY1 ((volatile unsigned *)(AES_BASE + 0x0064))
|
|
#define AES_KEY2 ((volatile unsigned *)(AES_BASE + 0x0068))
|
|
#define AES_KEY3 ((volatile unsigned *)(AES_BASE + 0x006c))
|
|
#define AES_KEY4 ((volatile unsigned *)(AES_BASE + 0x0070))
|
|
#define AES_KEY5 ((volatile unsigned *)(AES_BASE + 0x0074))
|
|
#define AES_KEY6 ((volatile unsigned *)(AES_BASE + 0x0078))
|
|
#define AES_KEY7 ((volatile unsigned *)(AES_BASE + 0x007c))
|
|
|
|
|
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|
|
#endif
|