193 lines
6.2 KiB
C
193 lines
6.2 KiB
C
/*!
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* \file main.c
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*
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* \brief Target main implementation
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*
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* \copyright Revised BSD License, see section \ref LICENSE.
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*
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* \code
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*
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* _ __ _ ________ _
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* | |/ /(_)___ / ____/ /_ (_)___
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* | // / __ \/ / / __ \/ / __ \
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* / |/ / / / / /___/ / / / / /_/ /
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* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
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* /_/
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* (C) 2022-2025 XinChip
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*
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* \endcode
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*
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* \author ( XinChip ) Alex-J
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*
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* \author ( XinChip )
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*/
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/*-----------------------------------------------------------------------------------
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INCLUDE HEADE FILES
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------------------------------------------------------------------------------------*/
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#include "main.h"
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#include "xc6xxx_rf_single.h"
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/*------------------------------------------------------------------------------------
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Macros
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-------------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------------
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Global Variables
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-------------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------------
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Func Prototype
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-------------------------------------------------------------------------------------*/
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/**
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* @brief clock_init
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* @details
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* @param void
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* @retval void
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*/
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void clock_init(void)
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{
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CLOCK_InitCfg_t clock_cfg;
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clock_cfg.hfclk_src = CLOCK_HFCLK_SRC_XTAL;
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clock_cfg.hfclk_in = CLOCK_HFCLK_IN_32M;
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#if (RC_32K)
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clock_cb.lfclk_src = CLOCK_LFCLK_SRC_RC;
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#endif //(RC_32K)
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#if (XTAL_32K)
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clock_cb.lfclk_src = CLOCK_LFCLK_SRC_XTAL;
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#endif // (XTAL_32K)
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#if (XTAL_32768K)
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clock_cb.lfclk_src = CLOCK_LFCLK_SRC_XTAL;
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#endif // (XTAL_32768K)
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if (clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_XTAL) {
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clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32768;
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} else if (clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_RC) {
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clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32K;
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}
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xc_clock_init_cfg(&clock_cfg);
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SysTick_Config(xc_clock_hfclk_in_get() / 100);
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SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
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}
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void app_uart_init(void)
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{
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GPIO_InitCfg_t gpio_cfg = {0};
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gpio_cfg.Mux = GPIO_Mux0;
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gpio_cfg.Pull = GPIO_PULLUP;
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gpio_cfg.Int = NOT_INT;
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gpio_cfg.FunSel = UART0_TX;
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gpio_cfg.Pin = GPIO_18;
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gpio_cfg.Dir = GPIO_DIR_OUTPUT;
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xc_gpio_init(&gpio_cfg);
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gpio_cfg.FunSel = UART0_RX;
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gpio_cfg.Pin = GPIO_19;
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gpio_cfg.Dir = GPIO_DIR_INPUT;
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xc_gpio_init(&gpio_cfg);
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UART_InitCfg_t uart_cfg = {0};
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uart_cfg.Parity = UART_PARITY_DISABLE;
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uart_cfg.StopBits = UART_STOP_1_BITS;
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uart_cfg.WordLength = UART_DATA_8_BITS;
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uart_cfg.BaudRate = UART_BAUDRATE_115200;
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uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE;
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xc_uart_init(UART0_IDX, &uart_cfg);
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}
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#ifdef DEBUG_LOG
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/**
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* @brief Rf 2.4g dump log
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* @param void
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*
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* @retval void
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*/
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void rf_2_4g_dump_log(void)
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{
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LOGI("***********************************************\n");
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LOGI("CFG_TOP: 0x%08x\r\n", XC_RF_2_4G->CFG_TOP);
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LOGI("EN_AA: 0x%08x\r\n", XC_RF_2_4G->EN_AA);
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LOGI("EN_RXADDR: 0x%08x\r\n", XC_RF_2_4G->EN_RXADDR);
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LOGI("SETUP_AW: 0x%08x\r\n", XC_RF_2_4G->SETUP_AW);
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LOGI("SETUP_RETR: 0x%08x\r\n", XC_RF_2_4G->SETUP_RETR);
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LOGI("RF_CH: 0x%08x\r\n", XC_RF_2_4G->RF_CH);
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LOGI("SETUP_RF: 0x%08x\r\n", XC_RF_2_4G->SETUP_RF);
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LOGI("STATUS: 0x%08x\r\n", XC_RF_2_4G->STATUS);
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LOGI("OBSERVE_TX: 0x%08x\r\n", XC_RF_2_4G->OBSERVE_TX);
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LOGI("RSSI: 0x%08x\r\n", XC_RF_2_4G->RSSI);
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LOGI("RX_ADDR_P0: 0x%02x %08x\r\n", 0xFF & (XC_RF_2_4G->RX_ADDR_P0_H), XC_RF_2_4G->RX_ADDR_P0_L);
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LOGI("RX_ADDR_P1: 0x%02x %08x\r\n", 0xFF & (XC_RF_2_4G->RX_ADDR_P1_H), XC_RF_2_4G->RX_ADDR_P1_L);
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LOGI("RX_ADDR_P2TOP5:0x%08x\r\n", XC_RF_2_4G->RX_ADDR_P2TOP5);
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LOGI("BER_RESULT: 0x%08x%08x\r\n", XC_RF_2_4G->BER_ERR_CNT, XC_RF_2_4G->BER_RECV_CNT);
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LOGI("AGC_SETTING: 0x%08x\r\n", XC_RF_2_4G->AGC_SETTING);
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LOGI("PGA_SETTING: 0x%02x %08x\r\n", ((XC_RF_2_4G->TX_ADDR_H) & 0xFF00) >> 8, XC_RF_2_4G->PGA_SETTING);
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LOGI("TX_ADDR: 0x%02x %08x\r\n", ((XC_RF_2_4G->TX_ADDR_H) & 0xFF), XC_RF_2_4G->TX_ADDR_L);
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LOGI("RX_PW_PX: 0x%04x %08x\r\n", 0xFFFF & (XC_RF_2_4G->RX_PW_Px_H), XC_RF_2_4G->RX_PW_Px_L);
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LOGI("STATUS_FIFO: 0x%08x\r\n", XC_RF_2_4G->STATUS_FIFO);
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LOGI("RSSIREC: 0x%08x\r\n", XC_RF_2_4G->RSSIREC);
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LOGI("TXPROC_CFG: 0x%08x\r\n", XC_RF_2_4G->TXPROC_CFG);
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LOGI("RXPROC_CFG: 0x%02x %08x\r\n", 0xFF & (XC_RF_2_4G->RXPROC_CFG_H), XC_RF_2_4G->RXPROC_CFG_L);
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LOGI("DYNPD: 0x%08x\r\n", XC_RF_2_4G->DYNPD);
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LOGI("FEATURE: 0x%08x\r\n", XC_RF_2_4G->FEATURE);
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LOGI("PGA_SETTING_H: 0x%08x\r\n", XC_RF_2_4G->TX_ADDR_H);
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LOGI("\r\n");
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LOGI("************** Single wave Param **************\n");
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}
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#endif
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/*------------------------------------------------------------------------------------
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Functions
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-------------------------------------------------------------------------------------*/
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/**
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* @brief main
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* @details
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* @param[in] void
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* @param[out] void
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* @retval int - 0
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* @retval void
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* @par identifier
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* reserve
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* @par other
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* void
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* @par change log
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* Alex created on 2023-05-31
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*/
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int main(void)
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{
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/* Clock initialization */
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clock_init();
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/* Serial port initialization */
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app_uart_init();
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LOGI("__START__\n");
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/* Single carrier initialization */
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rf_single_init();
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/* Set testing frequency points */
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rf_set_channel(XINCX_2_4G_CHANNEL);
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#ifdef DEBUG_LOG
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/* Register information printing */
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rf_2_4g_dump_log();
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#endif
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uint16_t channel = RF_SINGLE_MIN;
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for (;;) {
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delay_ms(100);
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rf_set_channel(channel);
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channel += 1;
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if (channel >= RF_SINGLE_MAX)
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channel = RF_SINGLE_MIN;
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}
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}
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