xushaoxiang
108 lines
4.3 KiB
C
108 lines
4.3 KiB
C
/*!
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* \file xc_drv_flash.h
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*
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* \brief The header of flash operation
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*
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* \copyright Revised BSD License, see section \ref LICENSE.
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*
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* \code
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*
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* _ __ _ ________ _
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* | |/ /(_)___ / ____/ /_ (_)___
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* | // / __ \/ / / __ \/ / __ \
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* / |/ / / / / /___/ / / / / /_/ /
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* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
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* /_/
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* (C) 2022-2025 XinChip
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*
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* \endcode
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*
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* \author ( XinChip ) Alex-J
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*
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* \author ( XinChip )
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*/
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#ifndef _XC_DRV_FLASH_H_
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#define _XC_DRV_FLASH_H_
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/*-----------------------------------------------------------------------------------
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INCLUDE HEADE FILES
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------------------------------------------------------------------------------------*/
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#include <stdbool.h>
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#include <stdint.h>
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/*------------------------------------------------------------------------------------
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Macros
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-------------------------------------------------------------------------------------*/
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#define CMD_READ_DATA (uint8_t)0x03
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#define CMD_READ_STATUS (uint8_t)0x05
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#define CMD_CHIP_ERASE (uint8_t)0xc7
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#define CMD_WRITE_ENABLE (uint8_t)0x06
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#define CMD_WRITE_DISABLE (uint8_t)0x04
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#define CMD_PAGE_PROGRAM (uint8_t)0x02
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#define CMD_BLOCK_ERASE (uint8_t)0xD8
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#define CMD_SECTOR_ERASE (uint8_t)0x20
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#define CMD_PAGE_ERASE (uint8_t)0x81
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#define CMD_RELEASE_PWRDWN (uint8_t)0xAB
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#define CMD_PWRDWN (uint8_t)0xB9
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#define CMD_RUID (uint8_t)0x4B
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#define CMD_RDID (uint8_t)0x9F
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#define CMD_QREMS (uint8_t)0x94
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#define CMD_WRITE_STATUS_REG (uint8_t)0x01
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#define FLASH_PAGE_SIZE 256
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#define FLASH_SECTOR_SIZE 4096
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#define PUYA_FLASH_STATUS_WIP_SET (0x01UL)
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#define PUYA_FLASH_STATUS_WIP_RESET (0x00UL)
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#define CUR_PAGE_NUM(addr) (addr / FLASH_PAGE_SIZE)
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#define CUR_START_PSR(addr) (addr % FLASH_PAGE_SIZE)
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#define CUR_SECTOR_NUM(addr) (addr / FLASH_SECTOR_SIZE)
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#define CUR_SECTOR_PSR(addr) (addr % FLASH_SECTOR_SIZE)
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#define CUR_SECTOR_PAGE_ADDR(SECTOR_IDX, PAGE_IDX) (((SECTOR_IDX) << 12) + ((PAGE_IDX) << 8))
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#define CMD_ERASE_SECURITY_REG (uint8_t)0x44
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#define CMD_READ_SECURITY_REG (uint8_t)0x48
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#define CMD_PROGRAM_SECURITY_REG (uint8_t)0x42
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#define OTP_PROGRAM_PAGE_0 (uint8_t)0x0
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#define OTP_PROGRAM_PAGE_1 (uint8_t)0x10
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#define OTP_PROGRAM_PAGE_2 (uint8_t)0x20
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#define OTP_PROGRAM_PAGE_3 (uint8_t)0x30
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#define FLASH_2M_FLAG 0x15
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#define FLASH_1M_FLAG 0x14
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#define FLASH_512K_FLAG 0x13
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#define FLASH_256K_FLAG 0x12
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#define FLASH_128K_FLAG 0x11
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#define FLASH_2M_SIZE 1024 * 2048
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#define FLASH_1M_SIZE 1024 * 1024
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#define FLASH_512K_SIZE 1024 * 512
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#define FLASH_256K_SIZE 1024 * 256
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#define FLASH_128K_SIZE 1024 * 128
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#define YOUCUN_FLASH 0x60B3
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#define PURAN_128K_FLASH 0x4485
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#define GD25WD40_512K_FLASH 0x64C8
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#define FLASH_PAGE_SIZE 256
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#define FLASH_SECTOR_SIZE 4096
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typedef struct board_c
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{
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uint32_t adc2v4_cail;
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uint32_t adc2v4_reverse_verif;
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uint32_t flash_id;
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uint32_t flash_id_reverse_verif;
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uint32_t ft_rest;
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uint32_t ft_rest_reverse_verif;
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uint32_t chip_cnt;
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uint32_t chip_cnt_reverse_verif;
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uint32_t rc_cail;
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uint32_t rc_cail_reverse_verif;
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} board_card_t;
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#endif /* _XC_DRV_DMA_H_ */
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