xc_drv_pwm.h

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#ifndef _XC_DRV_PWM_H_
#define _XC_DRV_PWM_H_
 
/*-----------------------------------------------------------------------------------
                                       INCLUDE HEADE FILES
 ------------------------------------------------------------------------------------*/
#include <stdbool.h>
#include <stdio.h>
 
#include "xc6xxx.h"
/*------------------------------------------------------------------------------------
                                             Macros
 -------------------------------------------------------------------------------------*/
#define PWM_CLK_DIV_CAL(div) (2 * (div + 1))
#define PWM_FREQ_MAX_CAL(pwm_clk, dutycycle_acc)                               \
    (pwm_clk / (dutycycle_acc * (0 + 1)) / 2)
#define PWM_FREQ_CAL(pwm_clk, dutycycle_acc, period)                           \
    (pwm_clk / (dutycycle_acc * (period + 1)) / 2)
 
#define PWM_UP_UPDATE_ENABLE               (1UL)
#define PWM_UP_UPDATE_DISABLE              (0UL)
 
#define PWM_EN_ENABLE                      (0x01UL)
#define PWM_EN_DISABLE                     (0x00UL)
#define PWM_EN_ALL_ENABLE                  (0x01UL)
#define PWM_EN_ALL_DISABLE                 (0x00UL)
#define PWM_EN_SLEEP_EN_ENABLE             (0x01UL)
#define PWM_EN_SLEEP_EN_DISABLE            (0x00UL)
 
#define PWM_EN_MODE_ACC_65535              (0x02UL)
 
#define PWM_COMP_TIME_PWMCOMPTIME_Pos      (0x00UL)
#define PWM_COMP_TIME_PWMCOMPTIME_Msk      (0xFFUL)
#define PWM_COMP_TIME_PWMCOMPTIME_VAL_1CLK (0x00UL)
#define PWM_COMP_TIME_PWMCOMPTIME_VAL_2CLK (0x01UL)
#define PWM_COMP_TIME_PWMCOMPTIME_VAL_3CLK (0x02UL)
#define PWM_COMP_TIME_PWMCOMPTIME_VAL_4CLK (0x03UL)
#define PWM_COMP_TIME_PWMCOMPTIME_VAL_5CLK (0x04UL)
#define PWM_COMP_TIME_PWMCOMPTIME_VAL_6CLK (0x05UL)
#define PWM_COMP_TIME_PWMCOMPTIME_VAL_7CLK (0x06UL)
#define PWM_COMP_TIME_PWMCOMPTIME_VAL_8CLK (0x07UL)
 
#define PWM_BRK_BRK_CLEAR_EXIT             (0x01UL)
 
#define PWM_BRK_DBC_EN_ENABLE              (0x01UL)
#define PWM_BRK_DBC_EN_DISABLE             (0x00UL)
 
#define PWM_BRK_DBC_STEP1                  (0x01UL)
#define PWM_BRK_DBC_STEP2                  (0x02UL)
#define PWM_BRK_DBC_STEP3                  (0x03UL)
#define PWM_BRK_DBC_STEP4                  (0x04UL)
#define PWM_BRK_DBC_STEP5                  (0x05UL)
#define PWM_BRK_DBC_STEP6                  (0x06UL)
#define PWM_BRK_DBC_STEP7                  (0x07UL)
#define PWM_BRK_DBC_STEP8                  (0x08UL)
#define PWM_BRK_DBC_STEP9                  (0x09UL)
#define PWM_BRK_DBC_STEP10                 (0x0AUL)
 
#define PWM_BRK0_INV_ENABLE                (0x01UL)
#define PWM_BRK0_INV_DISABLE               (0x00UL)
#define PWM_BRK1_INV_ENABLE                (0x02UL)
#define PWM_BRK1_INV_DISABLE               (0x00UL)
#define PWM_BRK2_INV_ENABLE                (0x04UL)
#define PWM_BRK2_INV_DISABLE               (0x00UL)
 
#define PWM_BRK0_MASK_ENABLE               (0x01UL)
#define PWM_BRK0_MASK_DISABLE              (0x00UL)
#define PWM_BRK1_MASK_ENABLE               (0x02UL)
#define PWM_BRK1_MASK_DISABLE              (0x00UL)
#define PWM_BRK2_MASK_ENABLE               (0x04UL)
#define PWM_BRK2_MASK_DISABLE              (0x00UL)
 
#define PWM_BRK0_ENABLE_ENABLE             (0x01UL)
#define PWM_BRK0_ENABLE_DISABLE            (0x00UL)
#define PWM_BRK1_ENABLE_ENABLE             (0x02UL)
#define PWM_BRK1_ENABLE_DISABLE            (0x00UL)
#define PWM_BRK2_ENABLE_ENABLE             (0x04UL)
#define PWM_BRK2_ENABLE_DISABLE            (0x00UL)
 
#define PWM_CAPTURE_UPD0_EN_ENABLE         (0x01UL)
#define PWM_CAPTURE_UPD1_EN_ENABLE         (0x02UL)
#define PWM_CAPTURE_UPD2_EN_ENABLE         (0x04UL)
 
#define PWM_CAPTURE_PSC_1                  (0x00UL)
#define PWM_CAPTURE_PSC_2                  (0x01UL)
#define PWM_CAPTURE_PSC_3                  (0x02UL)
 
#define PWM_CAPTURE_MODE_RISE              (0x00UL)
#define PWM_CAPTURE_MODE_FALL              (0x01UL)
#define PWM_CAPTURE_MODE_BOTH              (0x02UL)
 
#define PWM_CAPTURE_DBC_STEP0              (0x00UL)
#define PWM_CAPTURE_DBC_STEP1              (0x01UL)
#define PWM_CAPTURE_DBC_STEP2              (0x02UL)
#define PWM_CAPTURE_DBC_STEP3              (0x03UL)
#define PWM_CAPTURE_DBC_STEP4              (0x04UL)
#define PWM_CAPTURE_DBC_STEP5              (0x05UL)
#define PWM_CAPTURE_DBC_STEP6              (0x06UL)
#define PWM_CAPTURE_DBC_STEP7              (0x07UL)
#define PWM_CAPTURE_DBC_STEP8              (0x08UL)
#define PWM_CAPTURE_DBC_STEP9              (0x09UL)
#define PWM_CAPTURE_DBC_STEP10             (0x0AUL)
#define PWM_CAPTURE_DBC_STEP11             (0x0BUL)
#define PWM_CAPTURE_DBC_STEP12             (0x0CUL)
 
#define PWM_CAPTURE_SIG_SEL_PWM_CAPTURE0   (0x00UL)
#define PWM_CAPTURE_SIG_SEL_PWM_CAPTURE1   (0x01UL)
#define PWM_CAPTURE_SIG_SEL_PWM_CAPTURE2   (0x02UL)
#define PWM_CAPTURE_SIG_SEL_PWM_BRK0       (0x03UL)
#define PWM_CAPTURE_SIG_SEL_PWM_BRK1       (0x04UL)
#define PWM_CAPTURE_SIG_SEL_PWM_BRK2       (0x05UL)
 
#define PWM_CAPTURE_CLK_DIV_VAL_0          (0x00UL)
#define PWM_CAPTURE_CLK_DIV_VAL_2          (0x01UL)
#define PWM_CAPTURE_CLK_DIV_VAL_3          (0x02UL)
#define PWM_CAPTURE_CLK_DIV_VAL_4          (0x03UL)
#define PWM_CAPTURE_CLK_DIV_VAL_5          (0x04UL)
#define PWM_CAPTURE_CLK_DIV_VAL_6          (0x05UL)
#define PWM_CAPTURE_CLK_DIV_VAL_7          (0x06UL)
#define PWM_CAPTURE_CLK_DIV_VAL_8          (0x07UL)
#define PWM_CAPTURE_CLK_DIV_VAL_9          (0x08UL)
#define PWM_CAPTURE_CLK_DIV_VAL_10         (0x09UL)
#define PWM_CAPTURE_CLK_DIV_VAL_11         (0x0AUL)
#define PWM_CAPTURE_CLK_DIV_VAL_12         (0x0BUL)
#define PWM_CAPTURE_CLK_DIV_VAL_13         (0x0CUL)
 
#define PWM_CAPTURE_ENABLE                 (0x01UL)
#define PWM_CAPTURE_DISABLE                (0x00UL)
 
#define PWM_CAPTURE_DBC_ENABLE             (0x01UL)
#define PWM_CAPTURE_DBC_DISABLE            (0x00UL)
 
#define PWM_CAPTURE_COMMON_CNT_ENABLE      (0x01UL)
#define PWM_CAPTURE_COMMON_CNT_DISABLE     (0x00UL)
 
#define PWM_CAPTURE_UPD_EN_ENABLE          (0x01UL)
#define PWM_CAPTURE_UPD_EN_DISABLE         (0x00UL)
 
#define PWM_SIGNAL_CAPTURE0_GPIO3          GPIO_3
#define PWM_SIGNAL_CAPTURE1_GPIO8          GPIO_8
#define PWM_SIGNAL_CAPTURE2_GPIO9          GPIO_9
#define PWM_SIGNAL_BRK0_GPIO4              GPIO_4
#define PWM_SIGNAL_BRK1_GPIO5              GPIO_5
#define PWM_SIGNAL_BRK2_GPIO6              GPIO_6
 
#define PWM_IC_CH0                         0
#define PWM_IC_CH1                         1
#define PWM_IC_CH2                         2
 
#define PWM_BRK_SYNC_VALID                 1
#define PWM_BRK_SYNC_INVALID               0
 
#define PWM_BRK0_HIGH_LEVEL                PWM_BRK0_INV_DISABLE
#define PWM_BRK0_LOW_LEVEL                 PWM_BRK0_INV_ENABLE
#define PWM_BRK1_HIGH_LEVEL                PWM_BRK1_INV_DISABLE
#define PWM_BRK1_LOW_LEVEL                 PWM_BRK1_INV_ENABLE
#define PWM_BRK2_HIGH_LEVEL                PWM_BRK2_INV_DISABLE
#define PWM_BRK2_LOW_LEVEL                 PWM_BRK2_INV_ENABLE
 
#define PWM_ICSIG_CAPTURE0                 PWM_CAPTURE_SIG_SEL_PWM_CAPTURE0
#define PWM_ICSIG_CAPTURE1                 PWM_CAPTURE_SIG_SEL_PWM_CAPTURE1
#define PWM_ICSIG_CAPTURE2                 PWM_CAPTURE_SIG_SEL_PWM_CAPTURE2
 
#define PWM_ALL_ENABLE                     PWM_EN_ALL_ENABLE
#define PWM_ALL_DISABLE                    PWM_EN_ALL_DISABLE
 
#define PWM_SLEEP_COUNT_DIRECTION_UP       (0x01UL)
#define PWM_SLEEP_COUNT_DIRECTION_DOWN     (0x00UL)
 
#define PWM_SLEEP_ENABLE                   PWM_SLEEP_EN_ENABLE
#define PWM_SLEEP_DISABLE                  PWM_SLEEP_EN_DISABLE
 
#define PWM_EN_SEL_SELF                    (0x00UL)
#define PWM_EN_SEL_ALL                     (0x01UL)
 
#define PWM_BRK_MODE_HARDWARE              (0x00UL)
#define PWM_BRK_MODE_SOFTWARE              (0x01UL)
 
#define PWM_TIMER_MODE_USER_DEFINED        (0x01UL)
#define PWM_TIMER_MODE_FREE_RUNNING        (0x00UL)
/*------------------------------------------------------------------------------------
                                            TypeDef
 -------------------------------------------------------------------------------------*/
typedef enum
{
    PWM_CLK_SRC_32M_DIV = 0, /*PWM CLK SRC 32MHz div.*/
    PWM_CLK_SRC_32K_DIV = 1, /*PWM CLK SRC 32kHz div.*/
    PWM_CLK_SRC_32K     = 4, /*PWM CLK SRC 32kHz.*/
} PWM_ClkSrc_TypeDef;
 
typedef enum
{
    PWM_CLK_DIV0   = 0UL,   /*PWM CLK 16 MHz or 16KHz*/
    PWM_CLK_DIV1   = 1UL,   /*PWM CLK 8 MHz or 8KHz*/
    PWM_CLK_DIV3   = 3UL,   /*PWM CLK 4 MHz or 4KHz.*/
    PWM_CLK_DIV7   = 7UL,   /*PWM CLK 2 MHz or 2KHz.*/
    PWM_CLK_DIV15  = 15UL,  /*PWM CLK 1 MHz or 1KHz.*/
    PWM_CLK_DIV31  = 31UL,  /*PWM CLK 500 kHz or 500Hz.*/
    PWM_CLK_DIV63  = 63UL,  /*PWM CLK 250 kHz or 250Hz.*/
    PWM_CLK_DIV127 = 127UL, /*PWM CLK 125 kHz or 125Hz.*/
    PWM_CLK_DIV255 = 255UL, /*PWM CLK 62500 Hz or 62.5Hz.*/
} PWM_ClkDiv_TypeDef;
 
typedef enum pwm_timer_number
{
    PWM_NO_TIMER  = 0x00,
    PWM_TIMER_1   = 0x01,
    PWM_TIMER_2   = 0x02,
    PWM_TIMER_3   = 0x04,
    PWM_TIMER_4   = 0x08,
    PWM_TIMER_5   = 0x10,
    PWM_TIMER_6   = 0x20,
    PWM_ALL_TIMER = 0x3F,
} ePWM_Timer_Num;
 
typedef struct
{
    PWM_ClkSrc_TypeDef SrcClk;
    uint32_t DutyCycleAcc;
    uint32_t DutyCycle;
    uint8_t SrcEnable;
    uint8_t Period;
    uint8_t DivClk;
    uint8_t OutputPin;
    uint8_t OutputInvertPin;
    uint8_t InvertDelay;
    bool InvertEnable;
 
} PWM_InitCfg_t;
 
typedef struct
{
    PWM_ClkSrc_TypeDef src_clk;
    PWM_ClkDiv_TypeDef clk_div;
    uint8_t timer_0to100_pwm_en;
    uint8_t timer_pwm_en;
    uint8_t timer_int_mask_en;
    uint8_t timer_mode; /* 0x0 FREE_RUNNING; 0x1 USER_DEFINED */
} PWM_Timer_InitCfg_t;
 
/*------------------------------------------------------------------------------------
                                         Global Variables
 -------------------------------------------------------------------------------------*/
typedef uint8_t (*pwm_handler_callback)(void *context);
 
/*------------------------------------------------------------------------------------
                                        Exported Functions
 -------------------------------------------------------------------------------------*/
void xc_pwm_init(uint8_t reg_idx, PWM_InitCfg_t *pwm_cfg);
void xc_pwm_start(uint8_t reg_idx);
void xc_pwm_stop(uint8_t reg_idx);
void xc_pwm_start_all(void);
void xc_pwm_stop_all(void);
void pwm_pin_set(uint8_t reg_idx, PWM_InitCfg_t *pwm_cfg);
void xc_pwm_dutycycle_set(uint8_t reg_idx, uint32_t dutycycle_acc, uint32_t dutycycle);
void xc_pwm_lowpower_enable(uint8_t reg_idx);
void xc_pwm_lowpower_disable(uint8_t reg_idx);
void xc_pwm_lowpower_countdirection_set(uint8_t reg_idx, uint32_t direction);
void xc_pwm_brake_enable(uint8_t reg_idx);
void xc_pwm_brake_disable(uint8_t reg_idx);
uint8_t xc_pwm_brake_signal_valid_get(void);
void xc_pwm_brake_signal_mask_set(uint32_t mask);
void xc_pwm_brake_signal_trigger_level_set(uint32_t invert);
void xc_pwm_brake_recovery_mode_set(uint32_t mode);
uint8_t xc_pwm_brake_recovery_mode_get(void);
void xc_pwm_brake_debounce_set(uint32_t debounce, uint32_t step);
void xc_pwm_brake_clear(void);
void xc_pwm_capture_enable(uint8_t ch);
void xc_pwm_capture_disable(uint8_t ch);
void xc_pwm_capture_enable_it(uint8_t ch);
void xc_pwm_capture_disable_it(uint8_t ch);
void xc_pwm_capture_signal_set(uint8_t ch, uint32_t signal);
void xc_pwm_capture_debounce_enable(uint8_t ch, uint32_t step);
void xc_pwm_capture_debounce_disable(uint8_t ch, uint32_t step);
void xc_pwm_capture_edge_set(uint8_t ch, uint32_t edge);
void xc_pwm_capture_psc_set(uint8_t ch, uint32_t psc);
void xc_pwm_capture_counter_enable(uint8_t ch);
void xc_pwm_capture_counter_disable(uint8_t ch);
uint16_t xc_pwm_capture_val_get(uint8_t ch);
 
void xc_pwm_timer_init(uint8_t reg_idx, PWM_Timer_InitCfg_t *init_cfg);
void xc_pwm_timer_deinit(uint8_t reg_idx);
void xc_pwm_timer_set_freq(uint8_t reg_idx, uint32_t freq);
void xc_pwm_timer_set_dutycycle(uint8_t reg_idx, double dutycycle);
void xc_pwm_timer_start(uint8_t reg_idx);
void xc_pwm_timer_stop(uint8_t reg_idx);
void xc_pwm_timer_set_high_cnt(uint8_t reg_idx, uint16_t high_cnt);
void xc_pwm_timer_set_low_cnt(uint8_t reg_idx, uint16_t high_cnt);
 
uint8_t pwm_capture_ch0_callback(void *context);
uint8_t pwm_capture_ch1_callback(void *context);
uint8_t pwm_capture_ch2_callback(void *context);
#endif // _XC_DRV_PWM_H_