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xc_drv_pwr.c
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1
25/*-----------------------------------------------------------------------------------
26 INCLUDE HEADE FILES
27 ------------------------------------------------------------------------------------*/
28#include "xc_drv_pwr.h"
29#if (USE_ROM_FLASH)
30#include "xc6xxx_fmc_spi.h"
31#endif // (USE_ROM_FLASH)
32/*------------------------------------------------------------------------------------
33 Functions
34 -------------------------------------------------------------------------------------*/
35
36void xc_pwr_vol_set(void)
37{
38 uint32_t hf_clk = xc_clock_hfclk_in_get();
39
40 switch (hf_clk) {
41 case CLOCK_HFCLK_IN_16M: {
42 cprao_aon_bbldo_adj_set(0x3C);
43 cprao_aon_lpoldo_adj_set(4);
44// XC_CPR_AO->BBLDO_ADJ = 0x3C; // 0x4a;
45// XC_CPR_AO->LPOLDO_ADJ = 4; // 1;
46 } break;
47
48 case CLOCK_HFCLK_IN_32M: {
49 // if use usb driver, bbldo is at least 0x4E.
50// cprao_aon_bbldo_adj_set(0x4E);
51 cprao_aon_bbldo_adj_set(0x2a);
52 cprao_aon_lpoldo_adj_set(7);
53// XC_CPR_AO->BBLDO_ADJ = 0x9E; // 0x2C;
54// XC_CPR_AO->LPOLDO_ADJ = 7;
55 } break;
56
57 case CLOCK_HFCLK_IN_48M: {
58 cprao_aon_bbldo_adj_set(0x3C);
59 cprao_aon_lpoldo_adj_set(4);
60// XC_CPR_AO->BBLDO_ADJ = 0x9C;
61// XC_CPR_AO->LPOLDO_ADJ = 4;
62 } break;
63
64 case CLOCK_HFCLK_IN_64M: {
65 cprao_aon_bbldo_adj_set(0x9C);
66 cprao_aon_lpoldo_adj_set(4);
67// XC_CPR_AO->BBLDO_ADJ = 0x9C;
68// XC_CPR_AO->LPOLDO_ADJ = 4;
69 } break;
70
71 case CLOCK_HFCLK_IN_96M: {
72 cprao_aon_bbldo_adj_set(0x9C);
73 cprao_aon_lpoldo_adj_set(7);
74// XC_CPR_AO->BBLDO_ADJ = 0x9e;
75// XC_CPR_AO->LPOLDO_ADJ = 7;
76 } break;
77
78 default: {
79 cprao_aon_bbldo_adj_set(0x9C);
80 cprao_aon_lpoldo_adj_set(4);
81// XC_CPR_AO->BBLDO_ADJ = 0x9C;
82// XC_CPR_AO->LPOLDO_ADJ = 4;
83 } break;
84 }
85}
86
87
88
97void xc_adc_powerdown(void)
98{
99 adc_rf_ctl__pd_adc__setf(ADC_RF_CTL_PD_GADC_POWERDOWN);
100}
101
102
103
112void xc_adc_wakeup(void)
113{
114 adc_rf_ctl__pd_adc__setf(ADC_RF_CTL_PD_GADC_WAKWUP);
115}
116
117__RAM_CODE void xc_pwr_ao_timer_pclk32k_set(void)
118{
119 uint32_t val;
120
121 cprao_aon_reg1__timer_ao_sleep_clksw__setf(1);
122
123 val = cprao_aon_reg1__timer_ao_sleep_clksw__getf();
124
125 while ((val & 0x01) != 1) {
126 __NOP();
127 __NOP();
128 val = cprao_aon_reg1__timer_ao_sleep_clksw__getf();
129 }
130}
131
132void xc_pwr_ao_timer_pclk32m_Set()
133{
134 cprao_aon_reg1__timer_ao_sleep_clksw__setf(0);
135}
136
137void xc_pwr_sleep_init(PWR_InitCfg_t *pwr_cfg)
138{
139
140 cprao_aon_sys_time_set((RST_READY_TIME << 12) | (OSC32_STABLE_TIME));
141
142 if (pwr_cfg->pwr_sleep_mode == LIGHT_SLEEP_MODE) {
143 xc_pwr_pd_lightsleep_set();
144 xc_pwr_sleepsrc_mask_set(0x1e001e);
145 } else if (pwr_cfg->pwr_sleep_mode == DEEP_SLEEP_MODE) {
146 xc_pwr_pd_deepsleep_set();
147 delay_us(100);
148 xc_pwr_sleepsrc_mask_set(0x1e001e);
149 }
150
151 xc_pwr_osc_off();
152
153 xc_pwr_wake_it_set(pwr_cfg->pwr_wake_it_src);
154}
155
156// __RAM_CODE void xc_sleep_init()
157// {
158// xc_adc_powerdown();
159// xc_pwr_usb_off();
160// xc_pwr_rc16m_off();
161
162// xc_pwr_rc32k_calib_off();
163
164// // xc_pwr_rom_off();
165// xc_pwr_opa_tempsensor_off();
166// xc_pwr_opa_volr_off();
167// xc_pwr_revddldo_off();
168
169// xc_pwr_dcdc_close();
170// xc_pwr_rfdigital_off();
171
172// xc_pwr_modem_off();
173// xc_pwr_pd_lightsleep_set();
174// }
175
176__RAM_CODE void xc_pwr_ble_sleep_enter(void)
177{
178#if (USE_XIP == 1)
179
180#if (USE_ROM_FLASH)
181 FMC_SPI_Flash_PowerDown();
182#else // (USE_ROM_FLASH)
183 xc_fmc_spi_flash_power_down();
184#endif // USE_ROM_FLASH
185
186 __NOP();
187 __NOP();
188 __NOP();
189 __NOP();
190 __NOP();
191 __NOP();
192 __NOP();
193 __NOP();
194 __NOP();
195 __NOP();
196 __NOP();
197 __NOP();
198 cpr_fmc_ctl_set(0x3000 | (1 << 9)); // close fmc
199
200 for (int i = 0; i < 10; i++) {
201 __NOP();
202 __NOP();
203 __NOP();
204 }
205#endif // USE_XIP
206
207 __disable_irq();
208 __NOP();
209 __NOP();
210 __NOP();
211 __NOP();
212 __NOP();
213 __NOP();
214
215 __WFI();
216
217 __NOP();
218 __NOP();
219 __NOP();
220 __NOP();
221 __NOP();
222 __NOP();
223 __NOP();
224 __NOP();
225 __NOP();
226 __NOP();
227 __NOP();
228 __NOP();
229
230#if (USE_XIP == 1)
231 cpr_fmc_ctl_set(0x3503); // open FMC
232
233 __NOP();
234 __NOP();
235 __NOP();
236 __NOP();
237 __NOP();
238 __NOP();
239 __NOP();
240 __NOP();
241 __NOP();
242 __NOP();
243 __NOP();
244 __NOP();
245
246 xc_pwr_rom_on();
247
248#if (USE_ROM_FLASH)
249 FMC_SPI_Flash_WakeUp();
250#else // (USE_ROM_FLASH)
251 xc_fmc_spi_flash_wake_up();
252#endif // (USE_ROM_FLASH)
253
254 __NOP();
255 __NOP();
256 __NOP();
257 __NOP();
258 __NOP();
259 __NOP();
260 __NOP();
261 __NOP();
262 __NOP();
263 __NOP();
264 __NOP();
265 __NOP();
266
267#endif
268
269 xc_pwr_ao_timer_pclk32m_Set();
270
271// xc_pwr_rom_on();
272
273 __enable_irq();
274
275#ifdef USED_DCDC
276 xc_pwr_dcdc_open();
277#endif
278
279 xc_pwr_modem_on();
280
281 xc_pwr_rfdigital_on();
282
283 xc_adc_wakeup();
284}
285
286__RAM_CODE void xc_sleep(void)
287{
288 xc_adc_powerdown();
289 xc_pwr_usb_off();
290 xc_pwr_rc16m_off();
291
292// xc_pwr_rom_off();
293 xc_pwr_modem_off();
294 xc_pwr_opa_tempsensor_off();
295 xc_pwr_opa_volr_off();
296 xc_pwr_revddldo_off();
297 cprao_aon_reg4__bb_coreldo_normal_sw_mux__setf(1);
298 xc_pwr_bor_off();
299
300 xc_pwr_dcdc_close();
301 xc_pwr_rfdigital_off();
302 xc_pwr_rc32k_calib_off();
303 rtc_rccal_en_set(0x00);
304
305 xc_pwr_pd_lightsleep_set();
306
307#if (USE_XIP == 1)
308
309#if (USE_ROM_FLASH)
310 FMC_SPI_Flash_PowerDown();
311#else // (USE_ROM_FLASH)
312 xc_fmc_spi_flash_power_down();
313#endif // (USE_ROM_FLASH)
314
315 xc_pwr_rom_off();
316
317 __NOP();
318 __NOP();
319 __NOP();
320 __NOP();
321 __NOP();
322 __NOP();
323 __NOP();
324 __NOP();
325 __NOP();
326 __NOP();
327 __NOP();
328 __NOP();
329
330 cpr_fmc_ctl_set(0x3000 | (1 << 9)); // close fmc
331
332 for (int i = 0; i < 10; i++) {
333 __NOP();
334 __NOP();
335 __NOP();
336 }
337#endif
338
339 __disable_irq();
340 __NOP();
341 __NOP();
342 __NOP();
343 __NOP();
344 __NOP();
345 __NOP();
346
347 __WFI();
348
349 __NOP();
350 __NOP();
351 __NOP();
352 __NOP();
353 __NOP();
354 __NOP();
355 __NOP();
356 __NOP();
357 __NOP();
358 __NOP();
359 __NOP();
360 __NOP();
361
362#if (USE_XIP == 1)
363
364 cpr_fmc_ctl_set(0x3503); // open FMC
365
366 __NOP();
367 __NOP();
368 __NOP();
369 __NOP();
370 __NOP();
371 __NOP();
372 __NOP();
373 __NOP();
374 __NOP();
375 __NOP();
376 __NOP();
377 __NOP();
378
379 xc_pwr_rom_on();
380
381#if (USE_ROM_FLASH)
382 FMC_SPI_Flash_WakeUp();
383#else // (USE_ROM_FLASH)
384 xc_fmc_spi_flash_wake_up();
385#endif // (USE_ROM_FLASH)
386
387 __NOP();
388 __NOP();
389 __NOP();
390 __NOP();
391 __NOP();
392 __NOP();
393 __NOP();
394 __NOP();
395 __NOP();
396 __NOP();
397 __NOP();
398 __NOP();
399
400#endif
401
402 xc_pwr_ao_timer_pclk32m_Set();
403
404// xc_pwr_rom_on();
405
406 __enable_irq();
407
408#ifdef USED_DCDC
409 xc_pwr_dcdc_open();
410#endif
411
412 xc_pwr_modem_on();
413
414 xc_pwr_rfdigital_on();
415
416 xc_adc_wakeup();
417}
418
419__RAM_CODE void xc_deep_sleep()
420{
421
422 xc_pwr_ao_timer_pclk32k_set();
423 adc_rf_ctl__pd_adc__setf(ADC_RF_CTL_PD_GADC_POWERDOWN);
424 xc_pwr_usb_off();
425 xc_pwr_rc16m_off();
426 xc_pwr_rfdigital_off();
427 xc_pwr_modem_off();
428 xc_pwr_pd_deepsleep_set();
429 xc_pwr_rom_on();
430 xc_pwr_dcdc_close();
431
432#if (USE_XIP == 1)
433
434#if (USE_ROM_FLASH)
435 FMC_SPI_Flash_PowerDown();
436#else // (USE_ROM_FLASH)
437 xc_fmc_spi_flash_power_down();
438#endif // (USE_ROM_FLASH)
439
440 __NOP();
441 __NOP();
442 __NOP();
443 __NOP();
444 __NOP();
445 __NOP();
446 __NOP();
447 __NOP();
448 __NOP();
449 __NOP();
450 __NOP();
451 __NOP();
452 cpr_fmc_ctl_set(0x3000 | (1 << 9)); // close FMC
453
454 for (int i = 0; i < 10; i++) {
455 __NOP();
456 __NOP();
457 __NOP();
458 }
459#endif
460
461 __disable_irq();
462 __NOP();
463 __NOP();
464 __NOP();
465 __NOP();
466 __NOP();
467 __NOP();
468
469 __WFI();
470
471 __NOP();
472 __NOP();
473 __NOP();
474 __NOP();
475 __NOP();
476 __NOP();
477 __NOP();
478 __NOP();
479 __NOP();
480 __NOP();
481 __NOP();
482 __NOP();
483
484#if (USE_XIP == 1)
485 cpr_fmc_ctl_set(0x3503);
486
487 __NOP();
488 __NOP();
489 __NOP();
490 __NOP();
491 __NOP();
492 __NOP();
493 __NOP();
494 __NOP();
495 __NOP();
496 __NOP();
497 __NOP();
498 __NOP();
499
500 xc_pwr_rom_on();
501
502#if (USE_ROM_FLASH)
503 FMC_SPI_Flash_WakeUp();
504#else // (USE_ROM_FLASH)
505 xc_fmc_spi_flash_wake_up();
506#endif // (USE_ROM_FLASH)
507
508 __NOP();
509 __NOP();
510 __NOP();
511 __NOP();
512 __NOP();
513 __NOP();
514 __NOP();
515 __NOP();
516 __NOP();
517 __NOP();
518 __NOP();
519 __NOP();
520
521#endif
522
523 xc_pwr_ao_timer_pclk32m_Set();
524
525// xc_pwr_rom_on();
526
527 __enable_irq();
528
529#ifdef USED_DCDC
530 xc_pwr_dcdc_open();
531#endif
532
533 xc_pwr_modem_on();
534
535 xc_pwr_rfdigital_on();
536
537 xc_adc_wakeup();
538}
539
540__RAM_CODE void xc_pwr_cpu_sleep_enter(void)
541{
542 xc_pwr_ao_timer_pclk32k_set();
543
544 xc_adc_powerdown();
545
546 xc_pwr_usb_off();
547
548 xc_pwr_rc16m_off();
549
550 xc_pwr_rfdigital_off();
551
552 xc_pwr_modem_off();
553
554 xc_pwr_pd_lightsleep_set(); // auto switch core ldo voltage 1.17v to 0.89v
555 xc_pwr_opa_tempsensor_off();
556 xc_pwr_opa_volr_off();
557
558 xc_pwr_dcdc_close();
559
560#if (USE_XIP == 1)
561#if (USE_ROM_FLASH)
562 FMC_SPI_Flash_PowerDown();
563#else // (USE_ROM_FLASH)
564 xc_fmc_spi_flash_power_down();
565#endif // (USE_ROM_FLASH)
566 cpr_fmc_ctl_set(0x3000 | (1 << 11) | (1 << 9)); // close FMC
567#endif // USE_XIP
568 xc_pwr_rom_off();
569
570 __disable_irq();
571
572 __NOP();
573 __NOP();
574 __NOP();
575 __NOP();
576 __NOP();
577 __NOP();
578
579 __WFI(); // waiting to wake up
580
581 __NOP();
582 __NOP();
583 __NOP();
584 __NOP();
585 __NOP();
586 __NOP();
587 __NOP();
588 __NOP();
589 __NOP();
590 __NOP();
591 __NOP();
592 __NOP();
593
594#if (USE_XIP == 1)
595 cpr_fmc_ctl_set(0x3503); // open FMC
596 __NOP();
597 __NOP();
598 __NOP();
599 __NOP();
600 __NOP();
601 __NOP();
602 __NOP();
603 __NOP();
604 __NOP();
605 __NOP();
606 __NOP();
607 __NOP();
608
609 xc_pwr_rom_on();
610
611#if (USE_ROM_FLASH)
612 FMC_SPI_Flash_WakeUp();
613#else // (USE_ROM_FLASH)
614 xc_fmc_spi_flash_wake_up();
615#endif // (USE_ROM_FLASH)
616#endif // USE_XIP
617
618 xc_pwr_ao_timer_pclk32m_Set();
619
620// xc_pwr_rom_on();
621
622 __enable_irq();
623
624#ifdef USED_DCDC
625 xc_pwr_dcdc_open();
626#endif
627
628 xc_pwr_modem_on();
629
630 xc_pwr_rfdigital_on();
631
632 xc_adc_wakeup();
633}
634
635void xc_pwr_gpio_sleep_config(void)
636{
637#if (USE_XIP == 1)
638 /* puctrl1= 0xf ,clk,cs,d0,d1 must pulldown */
639// cprao_aon_puctrl1_set(0xf);
640 cprao_aon_puctrl1_set(0x5555F);
641#else
642
643 // if (sleep_mode == LIGHT_SLEEP_MODE) {
644 // XC_CPR_AO->PU_CTRLx[0] = 0x4;
645 // } else if (sleep_mode == DEEP_SLEEP_MODE) {
646 // XC_CPR_AO->PU_CTRLx[0] = 0xf;
647 // }
648
649#endif
650
651 NVIC_DisableIRQ(GPIO_IRQn);
652
653 GPIO_InitCfg_t gpio_cfg = {0};
654
655 gpio_cfg.Mux = GPIO_Mux0;
656 gpio_cfg.Dir = GPIO_DIR_INPUT;
657 gpio_cfg.FunSel = GPIO_Dx;
658 gpio_cfg.Int = NOT_INT;
659 gpio_cfg.Pull = GPIO_PULLDOWN;
660
661 // The gpio scripts used cannot be configured. gpio36-39 cannot be
662 // configured.
663 for (int i = 0; i < GPIO_36; i++) {
664 gpio_cfg.Pin = i;
665
666 if (i == 18 || i == 19 ) // Default for uart0
667 {
668
669 } else if (i == 33 || i == 34) {
670 gpio_cfg.Pull = GPIO_PULLDOWN;
671 xc_gpio_init(&gpio_cfg);
672
673 }
674 else if (i == 35) {
675 gpio_cfg.Pull = GPIO_PULLDOWN;
676 xc_gpio_init(&gpio_cfg);
677 } else if (i == 20 || i == 21) {
678 // Pins required when using an external 32k crystal
679 if (xc_clock_lfclk_src_get() != CLOCK_LFCLK_SRC_XTAL) {
680 xc_gpio_init(&gpio_cfg);
681 }
682 } else {
683 xc_gpio_init(&gpio_cfg);
684 }
685 }
686}
687
688// void xc_gpio_sleep_config(void)
689// {
690// #if (USE_XIP == 1)
691// cprao_aon_puctrl1_set(0xf);
692// // XC_CPR_AO->PU_CTRLx[0] = 0xf; /* puctrl1= 0xf ,clk,cs,d0,d1 must pulldown */
693// #endif
694
695// NVIC_DisableIRQ(GPIO_IRQn);
696
697// GPIO_InitCfg_t gpio_cfg = {0};
698
699// gpio_cfg.Mux = GPIO_Mux0;
700// gpio_cfg.Dir = GPIO_DIR_INPUT;
701// gpio_cfg.FunSel = GPIO_Dx;
702// gpio_cfg.Int = NOT_INT;
703// gpio_cfg.Pull = GPIO_PULLDOWN;
704
705// for (int i = 0; i < GPIO_MAX; i++) {
706// gpio_cfg.Pin = i;
707
708// if (i == 18 || i == 19) // Default for uart0
709// {
710
711// } else if (i == 33 || i == 34) {
712// xc_gpio_pull_config(i, GPIO_PULLDOWN);
713// } else if (i == 35) {
714// gpio_cfg.Pull = GPIO_PULLDOWN;
715// xc_gpio_init(&gpio_cfg);
716// } else if (i == 20 || i == 21) {
717// // Pins required when using an external 32k crystal
718// if (xc_clock_lfclk_src_get() != CLOCK_LFCLK_SRC_XTAL) {
719// xc_gpio_init(&gpio_cfg);
720// }
721// } else {
722// xc_gpio_init(&gpio_cfg);
723// }
724// }
725// }
726
727void xc_pwr_gpio_lightsleep_wake_config(uint8_t pin, uint8_t edge_it)
728{
729 GPIO_InitCfg_t gpio_cfg = {0};
730
731 gpio_cfg.Mux = GPIO_Mux0;
732 gpio_cfg.Dir = GPIO_DIR_INPUT;
733 gpio_cfg.FunSel = GPIO_Dx;
734
735 if (edge_it == RIS_EDGE_INT) {
736 gpio_cfg.Int = RIS_EDGE_INT;
737 gpio_cfg.Pull = GPIO_PULLDOWN;
738 } else if (edge_it == FAIL_EDGE_INT) {
739 gpio_cfg.Int = FAIL_EDGE_INT;
740 gpio_cfg.Pull = GPIO_PULLUP;
741 }
742
743 gpio_cfg.Pin = pin;
744 xc_gpio_init(&gpio_cfg);
745
746 NVIC_EnableIRQ(GPIO_IRQn);
747}
748
749void xc_pwr_pwrkey_init(void)
750{
751 cpr_ctlapbclken_grctl__rtc_pclk_en__setf(ENABLE);
752 cprao_aon_clken_grctl__rtc_clk_en__setf(ENABLE);
753
754 rtc_pwrkey_ctrl0_set(0);
755 rtc_pwrkey_ctrl1_set(0);
756 rtc_pwrkey_ctrl2_set(0);
757}
758
759void xc_pwr_pwrkey_deepsleep_wake_config(uint8_t pin, uint8_t level)
760{
761 GPIO_InitCfg_t gpio_cfg = {0};
762 uint32_t val;
763 uint32_t val_ctl;
764
765 gpio_cfg.Mux = GPIO_Mux0;
766 gpio_cfg.Dir = GPIO_DIR_INPUT;
767 gpio_cfg.FunSel = GPIO_Dx;
768 gpio_cfg.Int = NOT_INT;
769
770 if (level == DEEP_SLEEP_GPIO_WAKE_HIGH_LEVEL) {
771 gpio_cfg.Pull = GPIO_PULLDOWN;
772
773 val = rtc_pwrkey_ctrl0__powkey_edge__getf();
774 val &= ~(1 << pin);
775 rtc_pwrkey_ctrl0__powkey_edge__setf(val);
776
777 } else if (level == DEEP_SLEEP_GPIO_WAKE_LOW_LEVEL) {
778 gpio_cfg.Pull = GPIO_PULLUP;
779
780 val = rtc_pwrkey_ctrl0__powkey_edge__getf();
781 val |= (1 << pin);
782 rtc_pwrkey_ctrl0__powkey_edge__setf(val);
783 }
784
785 gpio_cfg.Pin = pin;
786 xc_gpio_init(&gpio_cfg);
787
788 val_ctl =rtc_pwrkey_ctrl1_get();
789 rtc_pwrkey_ctrl1__powkey_en__setf((1 << pin)|val_ctl);
790
791 rtc_pwrkey_ctrl2__powkey_inten__setf(ENABLE);
792
793 NVIC_EnableIRQ(RTC_IRQn);
794}
795
796void xc_pwr_pwrkey_write_pin(uint8_t pin, uint8_t level)
797{
798 uint32_t val;
799
800 if(cpr_ctlapbclken_grctl__rtc_pclk_en__getf()==DISABLE){
801 cpr_ctlapbclken_grctl__rtc_pclk_en__setf(ENABLE);
802 }
803 if(cprao_aon_clken_grctl__rtc_clk_en__getf()==DISABLE){
804 cprao_aon_clken_grctl__rtc_clk_en__setf(ENABLE);
805 }
806 if(pin < 32){
807 val = rtc_pwrkey_soft_ctrl0_get();
808 val = val | (1 << pin);
809 rtc_pwrkey_soft_ctrl0_set(val);
810
811 val = rtc_pwrkey_soft_ctrl1_get();
812 if(level == 0){
813 val &= ~(1<<pin);
814 }else{
815 val |= (1<<pin);
816 }
817 rtc_pwrkey_soft_ctrl1_set(val);
818 }else{
819
820 val = rtc_pwrkey_ctrl3__aogpio_soft_out_en_h__getf();
821 val = val | (1 << (pin-32));
822 rtc_pwrkey_ctrl3__aogpio_soft_out_en_h__setf(val);
823
824 val = rtc_pwrkey_ctrl3__aogpio_soft_out_value_h__getf();
825 if(level == 0){
826 val &= ~(1<<(pin-32));
827 }else{
828 val |= (1<<(pin-32));
829 }
830 rtc_pwrkey_ctrl3__aogpio_soft_out_value_h__setf(val);
831 }
832}
833
834void xc_pwr_pwrkey_toggle_pin(uint8_t pin)
835{
836 uint32_t val;
837
838 if(cpr_ctlapbclken_grctl__rtc_pclk_en__getf()==DISABLE){
839 cpr_ctlapbclken_grctl__rtc_pclk_en__setf(ENABLE);
840 }
841 if(cprao_aon_clken_grctl__rtc_clk_en__getf()==DISABLE){
842 cprao_aon_clken_grctl__rtc_clk_en__setf(ENABLE);
843 }
844
845 if(pin < 32){
846 val = rtc_pwrkey_soft_ctrl0_get();
847 val = val | (1 << pin);
848 rtc_pwrkey_soft_ctrl0_set(val);
849
850 val = rtc_pwrkey_soft_ctrl1_get();
851 if(val == 0){
852 val |= (1<<pin);
853 }else{
854 val &= ~(1<<pin);
855 }
856 rtc_pwrkey_soft_ctrl1_set(val);
857 }else{
858
859 val = rtc_pwrkey_ctrl3__aogpio_soft_out_en_h__getf();
860 val = val | (1 << (pin-32));
861 rtc_pwrkey_ctrl3__aogpio_soft_out_en_h__setf(val);
862
863 val = rtc_pwrkey_ctrl3__aogpio_soft_out_value_h__getf();
864
865 if(( val & 1<<(pin-32)) == 0){
866 val |= (1<<(pin-32));
867 }else{
868 val &= ~(1<<(pin-32));
869 }
870 rtc_pwrkey_ctrl3__aogpio_soft_out_value_h__setf(val);
871 }
872}
873
874
875void xc_pwr_dcdc_init(uint8_t vol_level)
876{
877 if (vol_level > 7) {
878 vol_level = 7;
879 }
880
881 cprao_aon_dcdc_ctr_reg1__dcdc_ctrl__setf(vol_level);
882
883}
884
885void xc_pwr_dcdc_close()
886{
887 // 0b100, 3.3v supply power
888 cprao_aon_reg1__bb_coreldo_dcdc_sw_soft__setf(0);
889 cprao_aon_reg1__bb_coreldo_dcdc_sw_softsel__setf(0);
890 cprao_aon_reg1__bb_coreldo_dcdc_sw_mux__setf(1);
891 cprao_aon_dcdc_ctr_reg0_set(1<<6);
892
893}
894
895void xc_pwr_dcdc_open()
896{
897 cprao_aon_dcdc_ctr_reg0__dcdc_en_soft__setf(1);
898 cprao_aon_dcdc_ctr_reg0__dcdc_bg_en_soft__setf(1);
899
900 // 0b011, dcdc supply power
901 cprao_aon_reg1__bb_coreldo_dcdc_sw_softsel__setf(1);
902 cprao_aon_reg1__bb_coreldo_dcdc_sw_soft__setf(1);
903 for (volatile uint16_t dly = 0; dly < 600; dly++) ;
904 cprao_aon_reg1__bb_coreldo_dcdc_sw_mux__setf(0);
905}
GPIO_InitCfg_t
Definition xc_drv_gpio.h:154
GPIO_InitCfg_t::Dir
GPIO_DIR_TypeDef Dir
Definition xc_drv_gpio.h:158
GPIO_InitCfg_t::FunSel
GPIO_FUN_SEL_TypeDef FunSel
Definition xc_drv_gpio.h:157
GPIO_InitCfg_t::Pin
uint16_t Pin
Definition xc_drv_gpio.h:155
GPIO_InitCfg_t::Pull
GPIO_PULL_TypeDef Pull
Definition xc_drv_gpio.h:159
GPIO_InitCfg_t::Mux
GPIO_MUX_TypeDef Mux
Definition xc_drv_gpio.h:156
GPIO_InitCfg_t::Int
GPIO_INT_TypeDef Int
Definition xc_drv_gpio.h:160
PWR_InitCfg_t
Definition xc_drv_pwr.h:66
PWR_InitCfg_t::pwr_sleep_mode
uint32_t pwr_sleep_mode
Definition xc_drv_pwr.h:69
PWR_InitCfg_t::pwr_wake_it_src
uint32_t pwr_wake_it_src
Definition xc_drv_pwr.h:67
xc_clock_lfclk_src_get
CLOCK_LFCLK_Src_Typedef xc_clock_lfclk_src_get(void)
xc_clock_lfclk_src_get
Definition xc_drv_clock.c:507
xc_clock_hfclk_in_get
CLOCK_HFCLK_In_Typedef xc_clock_hfclk_in_get(void)
xc_clock_hfclk_in_get
Definition xc_drv_clock.c:474
CLOCK_LFCLK_SRC_XTAL
@ CLOCK_LFCLK_SRC_XTAL
Definition xc_drv_clock.h:50
CLOCK_HFCLK_IN_16M
@ CLOCK_HFCLK_IN_16M
Definition xc_drv_clock.h:67
CLOCK_HFCLK_IN_96M
@ CLOCK_HFCLK_IN_96M
Definition xc_drv_clock.h:71
CLOCK_HFCLK_IN_48M
@ CLOCK_HFCLK_IN_48M
Definition xc_drv_clock.h:69
CLOCK_HFCLK_IN_32M
@ CLOCK_HFCLK_IN_32M
Definition xc_drv_clock.h:68
CLOCK_HFCLK_IN_64M
@ CLOCK_HFCLK_IN_64M
Definition xc_drv_clock.h:70
xc_fmc_spi_flash_power_down
__RAM_CODE void xc_fmc_spi_flash_power_down(void)
xc_fmc_spi_flash_power_down
Definition xc_drv_fmc_spi.c:268
xc_fmc_spi_flash_wake_up
__RAM_CODE void xc_fmc_spi_flash_wake_up(void)
xc_fmc_spi_flash_power_down
Definition xc_drv_fmc_spi.c:296
xc_gpio_init
void xc_gpio_init(GPIO_InitCfg_t *init_cfg)
xc_gpio_init
Definition xc_drv_gpio.c:63
GPIO_DIR_INPUT
@ GPIO_DIR_INPUT
Definition xc_drv_gpio.h:135
GPIO_Dx
@ GPIO_Dx
Definition xc_drv_gpio.h:104
GPIO_PULLDOWN
@ GPIO_PULLDOWN
Definition xc_drv_gpio.h:129
GPIO_PULLUP
@ GPIO_PULLUP
Definition xc_drv_gpio.h:128
NOT_INT
@ NOT_INT
Definition xc_drv_gpio.h:141
RIS_EDGE_INT
@ RIS_EDGE_INT
Definition xc_drv_gpio.h:146
FAIL_EDGE_INT
@ FAIL_EDGE_INT
Definition xc_drv_gpio.h:148
GPIO_Mux0
@ GPIO_Mux0
Definition xc_drv_gpio.h:96
GPIO_36
@ GPIO_36
Definition xc_drv_gpio.h:86
xc_pwr_ao_timer_pclk32k_set
__RAM_CODE void xc_pwr_ao_timer_pclk32k_set(void)
Definition xc_drv_pwr.c:117
xc_pwr_pwrkey_write_pin
void xc_pwr_pwrkey_write_pin(uint8_t pin, uint8_t level)
Definition xc_drv_pwr.c:796
xc_adc_wakeup
void xc_adc_wakeup(void)
xc_adc_wakeup
Definition xc_drv_pwr.c:112
xc_pwr_dcdc_open
void xc_pwr_dcdc_open()
Definition xc_drv_pwr.c:895
xc_pwr_vol_set
void xc_pwr_vol_set(void)
Definition xc_drv_pwr.c:36
xc_adc_powerdown
void xc_adc_powerdown(void)
xc_adc_powerdown
Definition xc_drv_pwr.c:97
xc_pwr_pwrkey_init
void xc_pwr_pwrkey_init(void)
Definition xc_drv_pwr.c:749
xc_pwr_ao_timer_pclk32m_Set
void xc_pwr_ao_timer_pclk32m_Set()
Definition xc_drv_pwr.c:132
xc_deep_sleep
__RAM_CODE void xc_deep_sleep()
Definition xc_drv_pwr.c:419
xc_pwr_dcdc_init
void xc_pwr_dcdc_init(uint8_t vol_level)
Definition xc_drv_pwr.c:875
xc_pwr_gpio_sleep_config
void xc_pwr_gpio_sleep_config(void)
Definition xc_drv_pwr.c:635
xc_pwr_dcdc_close
void xc_pwr_dcdc_close()
Definition xc_drv_pwr.c:885
xc_pwr_ble_sleep_enter
__RAM_CODE void xc_pwr_ble_sleep_enter(void)
Definition xc_drv_pwr.c:176
xc_pwr_gpio_lightsleep_wake_config
void xc_pwr_gpio_lightsleep_wake_config(uint8_t pin, uint8_t edge_it)
Definition xc_drv_pwr.c:727
xc_sleep
__RAM_CODE void xc_sleep(void)
Definition xc_drv_pwr.c:286
xc_pwr_sleep_init
void xc_pwr_sleep_init(PWR_InitCfg_t *pwr_cfg)
Definition xc_drv_pwr.c:137
xc_pwr_pwrkey_toggle_pin
void xc_pwr_pwrkey_toggle_pin(uint8_t pin)
Definition xc_drv_pwr.c:834
xc_pwr_cpu_sleep_enter
__RAM_CODE void xc_pwr_cpu_sleep_enter(void)
Definition xc_drv_pwr.c:540
xc_pwr_pwrkey_deepsleep_wake_config
void xc_pwr_pwrkey_deepsleep_wake_config(uint8_t pin, uint8_t level)
Definition xc_drv_pwr.c:759
xc_drv_pwr.h
The header of xc_drv_pwr.c
xc_pwr_bor_off
static __inline void xc_pwr_bor_off(void)
Definition xc_drv_pwr.h:188
xc_pwr_rom_off
static __RAM_CODE __inline void xc_pwr_rom_off(void)
Definition xc_drv_pwr.h:125
xc_pwr_rc32k_calib_off
static __inline void xc_pwr_rc32k_calib_off()
Definition xc_drv_pwr.h:193
xc_pwr_rfdigital_on
static __inline void xc_pwr_rfdigital_on(void)
Definition xc_drv_pwr.h:148
xc_pwr_modem_on
static __inline void xc_pwr_modem_on(void)
Definition xc_drv_pwr.h:119
xc_pwr_osc_off
static __inline void xc_pwr_osc_off(void)
Definition xc_drv_pwr.h:108
xc_pwr_rc16m_off
static __inline void xc_pwr_rc16m_off(void)
Definition xc_drv_pwr.h:83
xc_pwr_pd_lightsleep_set
static __inline void xc_pwr_pd_lightsleep_set(void)
Definition xc_drv_pwr.h:98
xc_pwr_wake_it_set
static __inline void xc_pwr_wake_it_set(uint32_t Val)
Definition xc_drv_pwr.h:76
xc_pwr_revddldo_off
static __inline void xc_pwr_revddldo_off()
Definition xc_drv_pwr.h:173
xc_pwr_pd_deepsleep_set
static __inline void xc_pwr_pd_deepsleep_set(void)
Definition xc_drv_pwr.h:103
xc_pwr_rfdigital_off
static __inline void xc_pwr_rfdigital_off(void)
Definition xc_drv_pwr.h:137
xc_pwr_rom_on
static __RAM_CODE __inline void xc_pwr_rom_on(void)
Definition xc_drv_pwr.h:131
xc_pwr_opa_tempsensor_off
static __inline void xc_pwr_opa_tempsensor_off(void)
Definition xc_drv_pwr.h:178
xc_pwr_sleepsrc_mask_set
static __inline void xc_pwr_sleepsrc_mask_set(uint32_t val)
Definition xc_drv_pwr.h:159
xc_pwr_opa_volr_off
static __inline void xc_pwr_opa_volr_off(void)
Definition xc_drv_pwr.h:164
xc_pwr_usb_off
static __inline void xc_pwr_usb_off(void)
Definition xc_drv_pwr.h:81
xc_pwr_modem_off
static __inline void xc_pwr_modem_off(void)
Definition xc_drv_pwr.h:113
delay_us
void delay_us(uint32_t nus)
Definition xc_drv_systick.c:37
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