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xc_drv_adc.c
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1
25/*-----------------------------------------------------------------------------------
26 INCLUDE HEADE FILES
27 ------------------------------------------------------------------------------------*/
28#include "xc6xxx.h"
29
30/*------------------------------------------------------------------------------------
31 Local Variables
32 -------------------------------------------------------------------------------------*/
33static uint16_t adc_value[2 * ADC_FIFO_DOUT_LEN] = {0};
34static uint16_t adc_it_val;
35
36/*------------------------------------------------------------------------------------
37 Global Variables
38 -------------------------------------------------------------------------------------*/
39
40/*------------------------------------------------------------------------------------
41 Func Prototype
42 -------------------------------------------------------------------------------------*/
43
44/*------------------------------------------------------------------------------------
45 Functions
46 -------------------------------------------------------------------------------------*/
47
68{
69 cpr_rstctl_ctlapb_sw__gpadc_rstn__setf(RSTCTL_ENABLE);
70 cpr_rstctl_ctlapb_sw__gpadc_rstn__setf(RSTCTL_DISABLE);
71 cpr_ctlapbclken_grctl__gpadc_pclk_en__setf(ENABLE);
72
73 cpr_opa_ctrl_reg__bg_5v_ctrl__setf(ENABLE);
74
75 adc_main_ctl__adc_en__setf(ADC_MAIN_CTL_ADC_EN_DISABLE);
76
78
79 adc_timer0_set(ADC_TIMER);
80
81 adc_main_ctl__edge_sel__setf(adc_cfg->SampEdge);
82
83 xc_adc_freq_set(adc_cfg->Freq);
84
85 xc_adc_refvol_set(adc_cfg->RefVol);
86
87 adc_main_ctl__ext_edge_sel__setf(adc_cfg->ExtEdgeSel);
88
89 adc_main_ctl__ext_sample_num__setf(adc_cfg->ExtSampleNum);
90
91 adc_main_ctl__ext_trigger_sel__setf(adc_cfg->ExtTriggerSel);
92
93 adc_main_ctl__ext_data_mode__setf(adc_cfg->ExtDataMode);
94}
95
96
106uint16_t xc_adc_data_average(uint16_t *data, uint16_t len)
107{
108 uint16_t add_cnt = 0;
109 uint32_t sum_data = 0;
110 uint8_t filter_cnt = 0;
111
112 filter_cnt = len / 4;
113
114 for (int i = 0; i < len - 1; i++) {
115 for (int j = 0; j < len - i - 1; j++) {
116 if (data[j] > data[j + 1]) {
117 uint16_t temp = data[j];
118 data[j] = data[j + 1];
119 data[j + 1] = temp;
120 }
121 }
122 }
123
124 for (int i = filter_cnt; i < len - filter_cnt; i++) {
125 sum_data += data[i];
126 add_cnt++;
127 }
128
129 if (0 == add_cnt)
130 return 0xffff;
131 else
132 return sum_data / add_cnt;
133}
134
135
136
137
148{
149 GPIO_InitCfg_t GPIO_InitCfg;
150
151 GPIO_InitCfg.Mux = GPIO_Mux0;
152 GPIO_InitCfg.FunSel = GPIO_Dx;
153 GPIO_InitCfg.Dir = GPIO_DIR_INPUT;
154 GPIO_InitCfg.Pull = GPIO_NOPULL;
155 GPIO_InitCfg.Int = NOT_INT;
156
157 switch (Channel) {
158 case 0:
159 case 1:
160 case 2:
161 case 3: {
162 GPIO_InitCfg.Pin = GPIO_21 - Channel;
163 } break;
164
165 case 4: {
166 GPIO_InitCfg.Pin = GPIO_0;
167 } break;
168
169 case 5: {
170 GPIO_InitCfg.Pin = GPIO_1;
171
172 } break;
173
174 case 6: {
175 GPIO_InitCfg.Pin = GPIO_4;
176 } break;
177
178 case 7: {
179 GPIO_InitCfg.Pin = GPIO_5;
180 } break;
181
182 case 10: {
183 GPIO_InitCfg.Pin = GPIO_2;
184 } break;
185
186 case 11: {
187 GPIO_InitCfg.Pin = GPIO_3;
188 } break;
189
190 default:
191 break;
192 }
193 xc_gpio_init(&GPIO_InitCfg);
194}
195
196
197
210void xc_adc_start_get_value(ADC_ChannelTypeDef_t Channel, uint16_t *adc_val)
211{
212 uint32_t val;
213 ADC_FIFO_TypeDef_t *fifo_val = NULL;
214 uint32_t time_out = 100000;
215 uint8_t adc_count = 0;
216
217 adc_main_ctl__adc_en__setf(ADC_MAIN_CTL_ADC_EN_DISABLE);
218
219 adc_chan_ctl__select_chan__setf(Channel);
220
221 adc_fifo_ctl__read_req_thresh__setf(ADC_FIFO_CTL_READ_REQ_THRESH_LEN_8);
222
224
225 adc_int_set(adc_int_get());
226
227 adc_main_ctl__adc_en__setf(ADC_MAIN_CTL_ADC_EN_ENABLE);
228
229 val = adc_int_raw_get();
230
231 while (((val & ADC_INT_READ_REQ_INT_SET) != ADC_INT_READ_REQ_INT_SET) &&
232 time_out) {
233 __nop();
234
235 val = adc_int_raw_get();
236 time_out--;
237 }
238
239 if (time_out == 0) {
240 DEBUG("adc time_out\n");
241 return;
242 }
243
244 adc_main_ctl__adc_en__setf(ADC_MAIN_CTL_ADC_EN_DISABLE);
245
246 fifo_val = (ADC_FIFO_TypeDef_t *)&val;
247
248 for (int t = 0; t < ADC_FIFO_CTL_READ_REQ_THRESH_LEN_8; t++) {
249 val = adc_fifo_get();
250
251 if (fifo_val->chanel_1 != fifo_val->chanel_2) {
252 DEBUG("channel error :%d\n", t);
253 return;
254 }
255
256 if (fifo_val->chanel_1 != Channel) {
257 DEBUG("channel error :%d\n", t);
258 return;
259 }
260
261 adc_value[adc_count++] = fifo_val->value_1;
262 adc_value[adc_count++] = fifo_val->value_2;
263// DEBUG("adc_value :%d\n", fifo_val->value_1);
264// DEBUG("adc_value :%d\n", fifo_val->value_2);
265 }
266
267 *adc_val = xc_adc_data_average(adc_value, adc_count);
268}
269
270
271
282{
283 adc_main_ctl__adc_en__setf(ADC_MAIN_CTL_ADC_EN_ENABLE) ;
284}
285
286
287
298{
299 adc_main_ctl__adc_en__setf(ADC_MAIN_CTL_ADC_EN_DISABLE) ;
300}
301
302
303
304
314void xc_adc_enable_it(uint8_t it)
315{
316 adc_int_en_set(it) ;
317}
318
319void xc_adc_disable_it(uint8_t it)
320{
321 adc_int_en_set(it) ;
322}
323
324
325
326
337void xc_adc_fifo_req_len_set(uint8_t len)
338{
339 adc_fifo_ctl__read_req_thresh__setf(len);
340}
341
342
343
360void xc_adc_wait_time_set(uint8_t timer0, uint16_t timer1)
361{
362 adc_timer1_set(timer1);
363 adc_timer0_set(timer0);
364}
365
366
367
378{
379 adc_main_ctl__auto_sw__setf(ADC_MAIN_CTL_AUTO_SW_ENABLE);
380}
381
382
383
394{
395 adc_main_ctl__auto_sw__setf(ADC_MAIN_CTL_AUTO_SW_DISABLE);
396}
397
398
399
409void xc_adc_ch_auto_set(uint8_t ch)
410{
411 adc_chan_ctl__chan_auto__setf(ch);
412}
413
414
415
426{
427 adc_chan_ctl__select_chan__setf(ch);
428}
429
430
431
446void xc_adc_it_set(uint8_t it)
447{
448 adc_int_set(it);
449}
450
451
452
453
463uint8_t xc_adc_it_get(void)
464{
465 return adc_int_get();
466}
467
468
469
470
480uint32_t xc_adc_data_get(void)
481{
482 return adc_fifo__fifo_dout__getf();
483}
484
485
486
487
497void xc_adc_it_collectval_set(uint16_t val) { adc_it_val = val; }
498
499
509uint16_t xc_adc_it_collectval_get(void) { return adc_it_val; }
510
520void GADC_Handler(void)
521{
523 adc_int_set(adc_int_get());
524}
525
535__WEAK void adc_intr_callback(void)
536{
537 uint32_t adc_int;
538 uint32_t val;
539
540 uint8_t adc_count = 0;
541 ADC_FIFO_TypeDef_t *fifo_val = NULL;
542 uint8_t channel = adc_chan_ctl__select_chan__getf();
543
544 adc_int = adc_int_get();
545
546 if (!(adc_int & (ADC_INT_READ_REQ_INT_SET | ADC_INT_FIFO_ERROR_INT_SET))) {
547// DEBUG("adc error\n");
548 return;
549 }
550
551 fifo_val = (ADC_FIFO_TypeDef_t *)&val;
552
553 for (int t = 0; t < adc_fifo_ctl__read_req_thresh__getf(); t++) {
554 val = adc_fifo_get();
555
556 if (fifo_val->chanel_1 != fifo_val->chanel_2) {
557 DEBUG("channel error :%d\n", t);
558 break;
559 }
560
561 if (fifo_val->chanel_1 != channel) {
562 DEBUG("channel error :%d\n", t);
563 break;
564 }
565
566 adc_value[adc_count++] = fifo_val->value_1;
567 adc_value[adc_count++] = fifo_val->value_2;
568 }
569
570 val = xc_adc_data_average(adc_value, adc_count);
572
573 adc_chan_ctl__select_chan__setf(channel);
574}
575
576
unsigned int chanel_1
Definition xc_drv_adc.h:128
unsigned int chanel_2
Definition xc_drv_adc.h:126
unsigned int value_2
Definition xc_drv_adc.h:125
unsigned int value_1
Definition xc_drv_adc.h:127
uint32_t ExtEdgeSel
Definition xc_drv_adc.h:189
uint32_t ExtTriggerSel
Definition xc_drv_adc.h:188
ADC_FreqTypeDef_t Freq
Definition xc_drv_adc.h:184
ADC_RefVolTypeDef_t RefVol
Definition xc_drv_adc.h:183
ADC_SampEdgeTypeDef_t SampEdge
Definition xc_drv_adc.h:185
uint32_t ExtDataMode
Definition xc_drv_adc.h:187
uint32_t ExtSampleNum
Definition xc_drv_adc.h:186
GPIO_DIR_TypeDef Dir
GPIO_FUN_SEL_TypeDef FunSel
GPIO_PULL_TypeDef Pull
GPIO_MUX_TypeDef Mux
GPIO_INT_TypeDef Int
void xc_adc_ch_auto_disable(void)
xc_adc_ch_auto_enable
Definition xc_drv_adc.c:393
void xc_adc_it_collectval_set(uint16_t val)
xc_adc_it_collectval_set
Definition xc_drv_adc.c:497
void xc_adc_wait_time_set(uint8_t timer0, uint16_t timer1)
xc_adc_wait_time_set
Definition xc_drv_adc.c:360
void xc_adc_init(ADC_InitCfg_t *adc_cfg)
xc_adc_init
Definition xc_drv_adc.c:67
void xc_adc_it_set(uint8_t it)
xc_adc_it_set
Definition xc_drv_adc.c:446
void xc_adc_channel_gpio_config(ADC_ChannelTypeDef_t Channel)
xc_adc_data_average
Definition xc_drv_adc.c:147
void xc_adc_start_get_value(ADC_ChannelTypeDef_t Channel, uint16_t *adc_val)
xc_adc_startgetvalue
Definition xc_drv_adc.c:210
void xc_adc_fifo_req_len_set(uint8_t len)
xc_adc_fifo_req_len_set
Definition xc_drv_adc.c:337
void xc_adc_ch_auto_enable(void)
xc_adc_ch_auto_enable
Definition xc_drv_adc.c:377
uint16_t xc_adc_it_collectval_get(void)
xc_adc_it_collectval_get
Definition xc_drv_adc.c:509
uint8_t xc_adc_it_get(void)
xc_adc_it_get
Definition xc_drv_adc.c:463
static uint16_t adc_it_val
Definition xc_drv_adc.c:34
void GADC_Handler(void)
GADC_Handler
Definition xc_drv_adc.c:520
void xc_adc_enable(void)
xc_adc_enable
Definition xc_drv_adc.c:281
void xc_adc_enable_it(uint8_t it)
xc_adc_enable_it
Definition xc_drv_adc.c:314
uint32_t xc_adc_data_get(void)
xc_adc_data_get
Definition xc_drv_adc.c:480
void xc_adc_ch_not_auto_set(uint8_t ch)
xc_adc_ch_auto_set
Definition xc_drv_adc.c:425
static uint16_t adc_value[2 *ADC_FIFO_DOUT_LEN]
Definition xc_drv_adc.c:33
void xc_adc_disable_it(uint8_t it)
Definition xc_drv_adc.c:319
uint16_t xc_adc_data_average(uint16_t *data, uint16_t len)
xc_adc_data_average
Definition xc_drv_adc.c:106
__WEAK void adc_intr_callback(void)
adc_intr_callback
Definition xc_drv_adc.c:535
void xc_adc_ch_auto_set(uint8_t ch)
xc_adc_ch_auto_set
Definition xc_drv_adc.c:409
void xc_adc_disable(void)
xc_adc_disable
Definition xc_drv_adc.c:297
static __inline void xc_adc_refvol_set(uint8_t ref_vol)
Definition xc_drv_adc.h:206
static __inline void xc_adc_fifo_flush(void)
Definition xc_drv_adc.h:200
static __inline void xc_adc_freq_set(uint8_t freq)
Definition xc_drv_adc.h:218
ADC_ChannelTypeDef_t
Definition xc_drv_adc.h:132
void xc_gpio_init(GPIO_InitCfg_t *init_cfg)
xc_gpio_init
Definition xc_drv_gpio.c:63
@ GPIO_DIR_INPUT
@ GPIO_Dx
@ GPIO_NOPULL
@ NOT_INT
@ GPIO_Mux0
Definition xc_drv_gpio.h:96
@ GPIO_0
Definition xc_drv_gpio.h:50
@ GPIO_21
Definition xc_drv_gpio.h:71
@ GPIO_3
Definition xc_drv_gpio.h:53
@ GPIO_5
Definition xc_drv_gpio.h:55
@ GPIO_1
Definition xc_drv_gpio.h:51
@ GPIO_4
Definition xc_drv_gpio.h:54
@ GPIO_2
Definition xc_drv_gpio.h:52