hpw421初始版本
This commit is contained in:
xushaoxiang
@@ -0,0 +1,234 @@
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;/*****************************************************************************
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; * @file: startup_xinc.s
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; * @purpose: CMSIS Cortex-M0 Core Device Startup File for the
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; * Device xinc.
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; *****************************************************************************/
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Stack_Size EQU 0x00000600
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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Heap_Size EQU 0x00000000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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; ToDo: Add here the vectors for the device specific external interrupts handler
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DCD 0 ; 0 BLE Handler
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DCD DMAS_Handler ; 1
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DCD CPR_Handler ; 2
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DCD GPIO_Handler ; 3
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DCD RTC_Handler ; 4
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DCD TIMER0_Handler ; 5
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DCD TIMER1_Handler
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DCD TIMER2_Handler
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DCD TIMER3_Handler
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DCD WDT_Handler
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DCD I2C_Handler
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DCD UART0_Handler
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DCD UART1_Handler
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DCD SPI0_Handler
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DCD SPI1_Handler
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DCD 0
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DCD 0
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DCD GADC_Handler ; 17
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DCD 0 ; 18
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DCD 0 ; 19
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DCD 0 ; 20
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DCD 0 ; 21
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DCD RF24G_Handler ; 22
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DCD PWM_Handler ; 23
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DCD BOR_Handler ; 24
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DCD 0 ; 25
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DCD 0 ; 26
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DCD AOTIMER0_Handler ; 27
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DCD AOTIMER1_Handler ; 28
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DCD CMP_Handler ; 29
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DCD FMC_Handler ; 30
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DCD CAN_Handler ; 31
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset Handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT SystemInit
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IMPORT __main
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LDR r0, =0x4000013C ; remap
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LDR r1, =0x10000001
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STR r1, [r0]
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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MemManage_Handler\
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PROC
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EXPORT MemManage_Handler [WEAK]
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B .
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ENDP
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BusFault_Handler\
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PROC
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EXPORT BusFault_Handler [WEAK]
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B .
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ENDP
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UsageFault_Handler\
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PROC
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EXPORT UsageFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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DebugMon_Handler\
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PROC
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EXPORT DebugMon_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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;EXPORT BLE_Handler [WEAK]
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EXPORT DMAS_Handler [WEAK]
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EXPORT CPR_Handler [WEAK]
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EXPORT GPIO_Handler [WEAK]
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EXPORT RTC_Handler [WEAK]
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EXPORT TIMER0_Handler [WEAK]
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EXPORT TIMER1_Handler [WEAK]
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EXPORT TIMER2_Handler [WEAK]
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EXPORT TIMER3_Handler [WEAK]
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EXPORT WDT_Handler [WEAK]
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EXPORT I2C_Handler [WEAK]
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EXPORT UART0_Handler [WEAK]
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EXPORT UART1_Handler [WEAK]
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EXPORT SPI0_Handler [WEAK]
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EXPORT SPI1_Handler [WEAK]
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;EXPORT KBS_Handler [WEAK]
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;EXPORT QDEC_Handler [WEAK]
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EXPORT GADC_Handler [WEAK]
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EXPORT AOTIMER0_Handler [WEAK]
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EXPORT AOTIMER1_Handler [WEAK]
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EXPORT CMP_Handler [WEAK]
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EXPORT FMC_Handler [WEAK]
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EXPORT CAN_Handler [WEAK]
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;EXPORT SIM_Handler [WEAK]
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;EXPORT AES_Handler [WEAK]
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EXPORT PendSV_Handler [WEAK]
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EXPORT SysTick_Handler [WEAK]
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EXPORT RF24G_Handler [WEAK]
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EXPORT PWM_Handler [WEAK]
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EXPORT BOR_Handler [WEAK]
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PendSV_Handler
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SysTick_Handler
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;BLE_Handler
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DMAS_Handler
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CPR_Handler
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GPIO_Handler
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RTC_Handler
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TIMER0_Handler
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TIMER1_Handler
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TIMER2_Handler
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TIMER3_Handler
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WDT_Handler
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I2C_Handler
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UART0_Handler
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UART1_Handler
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SPI0_Handler
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SPI1_Handler
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;KBS_Handler
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;QDEC_Handler
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GADC_Handler
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;SIM_Handler
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;AES_Handler
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AOTIMER0_Handler
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AOTIMER1_Handler
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CMP_Handler
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FMC_Handler
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CAN_Handler
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RF24G_Handler
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PWM_Handler
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BOR_Handler
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B .
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ENDP
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ALIGN
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; User Initial Stack & Heap
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, = (Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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END
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@@ -0,0 +1,232 @@
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/*!
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* \file system_it_xinc.c
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*
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* \brief Target system interruption implementation
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*
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* \copyright Revised BSD License, see section \ref LICENSE.
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*
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* \code
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*
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* _ __ _ ________ _
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* | |/ /(_)___ / ____/ /_ (_)___
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* | // / __ \/ / / __ \/ / __ \
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* / |/ / / / / /___/ / / / / /_/ /
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* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
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* /_/
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* (C) 2022-2025 XinChip
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*
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* \endcode
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*
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* \author ( XinChip ) Alex-J
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*
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* \author ( XinChip )
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*/
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/*-----------------------------------------------------------------------------------
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INCLUDE HEADE FILES
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------------------------------------------------------------------------------------*/
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#include "system_it_xinc.h"
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/*------------------------------------------------------------------------------------
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Func Prototype
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-------------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------------
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Functions
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-------------------------------------------------------------------------------------*/
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/**
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****************************************************************************************
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* @brief This function handles NMI exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn */
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DEBUG("%s\n", __func__);
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/* USER CODE END NonMaskableInt_IRQn */
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while (1)
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{
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}
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}
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/**
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****************************************************************************************
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* @brief This function handles Hard Fault exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn */
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DEBUG("%s\n", __func__);
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/* USER CODE END HardFault_IRQn */
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while (1)
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{
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}
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}
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/**
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****************************************************************************************
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* @brief This function handles Memory Manage exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN */
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DEBUG("%s\n", __func__);
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/* USER CODE END */
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while (1)
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{
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}
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}
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/**
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****************************************************************************************
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* @brief This function handles Bus Fault exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN */
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DEBUG("%s\n", __func__);
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/* USER CODE END */
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while (1)
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{
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}
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}
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/**
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****************************************************************************************
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* @brief This function handles Usage Fault exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN */
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DEBUG("%s\n", __func__);
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/* USER CODE END */
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||||
while (1)
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{
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||||
}
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}
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/**
|
||||
****************************************************************************************
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* @brief This function handles SVCall exception.
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*
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* @param[in]
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* @param[in]
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****************************************************************************************
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*/
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void SVC_Handler(void)
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{
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/* USER CODE BEGIN SVCall_IRQn */
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DEBUG("%s\n", __func__);
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/* USER CODE END SVCall_IRQn */
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||||
while (1)
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{
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|
||||
}
|
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}
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|
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/**
|
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****************************************************************************************
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* @brief This function handles Debug Monitor exception.
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*
|
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* @param[in]
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* @param[in]
|
||||
****************************************************************************************
|
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*/
|
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void DebugMon_Handler(void)
|
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{
|
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/* USER CODE BEGIN */
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DEBUG("%s\n", __func__);
|
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/* USER CODE END */
|
||||
while (1)
|
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{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
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||||
* @brief This function handles PendSVC exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
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||||
/* USER CODE BEGIN PendSV_IRQn */
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DEBUG("%s\n", __func__);
|
||||
/* USER CODE END PendSV_IRQn */
|
||||
while (1)
|
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{
|
||||
|
||||
}
|
||||
}
|
||||
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||||
/****************************** Hard Fault Handler Functions *******************************/
|
||||
/*------------------------------------------------------------------------------------
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||||
Private Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
void HardFault_Handler_c(unsigned int * HardFault_args)
|
||||
{
|
||||
/*栈帧里面内容：*/
|
||||
unsigned int stack_r0; //压栈的 R0
|
||||
unsigned int stack_r1; //压栈的 R1
|
||||
unsigned int stack_r2; //压栈的 R2
|
||||
unsigned int stack_r3; //压栈的 R3
|
||||
unsigned int stack_r12; //压栈的 R12
|
||||
unsigned int stack_lr; //压栈的 lr
|
||||
unsigned int stack_pc; //压栈的 pc
|
||||
unsigned int stack_psr; //压栈的 psr
|
||||
|
||||
stack_r0 = ((unsigned int)HardFault_args[0]);
|
||||
stack_r1 = ((unsigned int)HardFault_args[1]);
|
||||
stack_r2 = ((unsigned int)HardFault_args[2]);
|
||||
stack_r3 = ((unsigned int)HardFault_args[3]);
|
||||
stack_r12 = ((unsigned int)HardFault_args[4]);
|
||||
stack_lr = ((unsigned int)HardFault_args[5]);
|
||||
stack_pc = ((unsigned int)HardFault_args[6]);
|
||||
stack_psr = ((unsigned int)HardFault_args[7]);
|
||||
|
||||
DEBUG("----%s----\n", __func__);
|
||||
DEBUG("R0=%x\n",stack_r0);
|
||||
DEBUG("R1=%x\n",stack_r1);
|
||||
DEBUG("R2=%x\n",stack_r2);
|
||||
DEBUG("R3=%x\n",stack_r3);
|
||||
DEBUG("R12=%x\n",stack_r12);
|
||||
DEBUG("LR[R14]=%x\n",stack_lr);
|
||||
DEBUG("PC[R15]=%x\n",stack_pc);
|
||||
DEBUG("PSR=%x\n",stack_psr);
|
||||
DEBUG("SCB_SHCSR=%x\n",SCB->SHCSR);
|
||||
DEBUG("---------------------------\n");
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*******************************************************************************************/
|
||||
|
||||
@@ -0,0 +1,58 @@
|
||||
/*!
|
||||
* \file system_it_xinc.h
|
||||
*
|
||||
* \brief The header of system_it_xinc.c
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __SYSTEM_IT_XINC_H__
|
||||
#define __SYSTEM_IT_XINC_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "xc6xxx.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Exported Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
void NMI_Handler( void );
|
||||
void HardFault_Handler( void );
|
||||
void MemManage_Handler( void );
|
||||
void BusFault_Handler( void );
|
||||
void UsageFault_Handler( void );
|
||||
void SVC_Handler( void );
|
||||
void DebugMon_Handler( void );
|
||||
void PendSV_Handler( void );
|
||||
|
||||
void HardFault_Handler_c(unsigned int * HardFault_args);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __SYSTEM_IT_XINC_H__ */
|
||||
|
||||
@@ -0,0 +1,117 @@
|
||||
/**
|
||||
* Initialize the system
|
||||
*
|
||||
* @param none
|
||||
* @return none
|
||||
*
|
||||
* @brief Setup the microcontroller system
|
||||
*
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include <stdio.h>
|
||||
|
||||
#include "xc6xxx.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
#define __DEBUG_OUT_PORT 0
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
#define VECTOR_NUM 48
|
||||
|
||||
void set_vector(void)
|
||||
{
|
||||
#if (USE_XIP == 1)
|
||||
__disable_irq();
|
||||
for (uint32_t i = 0, *Pvector = (uint32_t *)(0x11001000 + 0),
|
||||
*_vector_table = (uint32_t *)(0x10000000);
|
||||
i < VECTOR_NUM; i++) // copy vertor table
|
||||
{
|
||||
_vector_table[i] = *Pvector++;
|
||||
}
|
||||
|
||||
*((volatile unsigned int *)(0x4000013C)) =
|
||||
0x10000001; // inter vertor table remap
|
||||
__enable_irq();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
static void WDT_ResetInit(void)
|
||||
{
|
||||
cpr_ctlapbclken_grctl__wdt_pclk_en__setf(ENABLE);
|
||||
|
||||
cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_ENABLE);
|
||||
cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_DISABLE);
|
||||
|
||||
cpr_rstctl_wdtrst_mask_set(
|
||||
(WDT_SYS_RSTN_MASK_DISABLE | WDT_M0_RSTN_MASK_ENABLE));
|
||||
|
||||
cpr_lp_ctl__wdt_tclk_en__setf(ENABLE);
|
||||
wdt_cr__wdt_en__setf(DISABLE);
|
||||
}
|
||||
|
||||
void SystemInit(void)
|
||||
{
|
||||
|
||||
WDT_ResetInit();
|
||||
|
||||
#if (USE_XIP == 1)
|
||||
|
||||
set_vector();
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
__RAM_CODE int sendchar(int c)
|
||||
{
|
||||
unsigned int status;
|
||||
#if (__DEBUG_OUT_PORT == 1)
|
||||
for (;;) {
|
||||
status = (*((volatile unsigned *)(0x40011000 + 0x14)));
|
||||
status &= 0x20;
|
||||
if (status == 0x20)
|
||||
break;
|
||||
}
|
||||
(*((volatile unsigned *)(0x40011000 + 0x00))) = c;
|
||||
return (1);
|
||||
#else
|
||||
for (;;) {
|
||||
status = (*((volatile unsigned *)(0x40010000 + 0x14)));
|
||||
status &= 0x20;
|
||||
if (status == 0x20)
|
||||
break;
|
||||
}
|
||||
(*((volatile unsigned *)(0x40010000 + 0x00))) = c;
|
||||
return (1);
|
||||
#endif
|
||||
}
|
||||
|
||||
struct __FILE
|
||||
{
|
||||
int handle; /* Add whatever you need here */
|
||||
};
|
||||
|
||||
FILE __stdout;
|
||||
__RAM_CODE int fputc(int ch, FILE *f) { return (sendchar(ch)); }
|
||||
|
||||
int ferror(FILE *f)
|
||||
{
|
||||
/* Your implementation of ferror */
|
||||
return EOF;
|
||||
}
|
||||
|
||||
void _ttywrch(int ch) { sendchar(ch); }
|
||||
|
||||
void _sys_exit(int return_code)
|
||||
{
|
||||
label:
|
||||
goto label; /* endless loop */
|
||||
}
|
||||
@@ -0,0 +1,256 @@
|
||||
|
||||
;/*****************************************************************************
|
||||
; * @file: startup_xinc.s
|
||||
; * @purpose: CMSIS Cortex-M0 Core Device Startup File for the
|
||||
; * Device xinc.
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00001000
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
; ToDo: Add here the vectors for the device specific external interrupts handler
|
||||
DCD BLE_Handler ; 0
|
||||
DCD DMA_Handler ; 1
|
||||
DCD CPR_Handler ; 2
|
||||
DCD GPIO_Handler ; 3
|
||||
DCD RTC_Handler ; 4
|
||||
DCD TIMER0_Handler ; 5
|
||||
DCD TIMER1_Handler ; 6
|
||||
DCD TIMER2_Handler ; 7
|
||||
DCD TIMER3_Handler ; 8
|
||||
DCD WDT_Handler ; 9
|
||||
DCD I2C_Handler ; 10
|
||||
DCD UART0_Handler ; 11
|
||||
DCD UART1_Handler ; 12
|
||||
DCD SPI0_Handler ; 13
|
||||
DCD SPI1_Handler ; 14
|
||||
DCD 0 ; 15
|
||||
DCD 0 ; 16
|
||||
DCD GADC_Handler ; 17
|
||||
DCD PWM_Handler ; 18
|
||||
DCD AES_Handler ; 19
|
||||
DCD USB_Handler ; 20
|
||||
DCD AUDIO_Handler ; 21
|
||||
DCD RF24G_Handler ; 22
|
||||
DCD SPI2_Handler ; 23
|
||||
DCD 0 ; 24
|
||||
DCD UART2_Handler ; 25
|
||||
DCD I2S_Handler ; 26
|
||||
DCD AOTIMER0_Handler ; 27
|
||||
DCD AOTIMER1_Handler ; 28
|
||||
DCD CMP_Handler ; 29
|
||||
DCD FMC_Handler ; 30
|
||||
DCD CAN_Handler ; 31
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR r0, =0x4000013C ; remap
|
||||
LDR r1, =0x10000001
|
||||
STR r1, [r0]
|
||||
|
||||
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
IMPORT HardFault_Handler_c ;函数声明
|
||||
movs r0, #4 ;判断主栈指针还是进程栈指针
|
||||
mov r1, lr
|
||||
tst r0, r1
|
||||
beq hf_used_msp ;如果是主栈指针
|
||||
mrs r0, psp ;否则是进程栈指针,把进程栈指针地址付给 R0
|
||||
ldr r1, =HardFault_Handler_c ;跳转到 HardFault 中断程序
|
||||
bx r1
|
||||
hf_used_msp
|
||||
mrs r0, msp ;把主栈指针地址赋给 R0
|
||||
ldr r1, =HardFault_Handler_c
|
||||
bx r1
|
||||
;EXPORT HardFault_Handler [WEAK]
|
||||
;B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
EXPORT BLE_Handler [WEAK]
|
||||
EXPORT DMA_Handler [WEAK]
|
||||
EXPORT CPR_Handler [WEAK]
|
||||
EXPORT GPIO_Handler [WEAK]
|
||||
EXPORT RTC_Handler [WEAK]
|
||||
EXPORT TIMER0_Handler [WEAK]
|
||||
EXPORT TIMER1_Handler [WEAK]
|
||||
EXPORT TIMER2_Handler [WEAK]
|
||||
EXPORT TIMER3_Handler [WEAK]
|
||||
EXPORT WDT_Handler [WEAK]
|
||||
EXPORT I2C_Handler [WEAK]
|
||||
EXPORT UART0_Handler [WEAK]
|
||||
EXPORT UART1_Handler [WEAK]
|
||||
EXPORT SPI0_Handler [WEAK]
|
||||
EXPORT SPI1_Handler [WEAK]
|
||||
;EXPORT KBS_Handler [WEAK]
|
||||
;EXPORT QDEC_Handler [WEAK]
|
||||
EXPORT GADC_Handler [WEAK]
|
||||
EXPORT PWM_Handler [WEAK]
|
||||
EXPORT AES_Handler [WEAK]
|
||||
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
|
||||
EXPORT USB_Handler [WEAK];20
|
||||
EXPORT AUDIO_Handler [WEAK];21
|
||||
EXPORT RF24G_Handler [WEAK];22
|
||||
EXPORT SPI2_Handler [WEAK];23
|
||||
;EXPORT MPU_Handler [WEAK];24
|
||||
EXPORT UART2_Handler [WEAK];25
|
||||
EXPORT I2S_Handler [WEAK];26
|
||||
EXPORT AOTIMER0_Handler [WEAK];27
|
||||
EXPORT AOTIMER1_Handler [WEAK];28
|
||||
EXPORT CMP_Handler [WEAK];29
|
||||
EXPORT FMC_Handler [WEAK];30
|
||||
EXPORT CAN_Handler [WEAK];31
|
||||
|
||||
PendSV_Handler
|
||||
SysTick_Handler
|
||||
BLE_Handler
|
||||
RF24G_Handler
|
||||
DMA_Handler
|
||||
CPR_Handler
|
||||
GPIO_Handler
|
||||
RTC_Handler
|
||||
TIMER0_Handler
|
||||
TIMER1_Handler
|
||||
TIMER2_Handler
|
||||
TIMER3_Handler
|
||||
WDT_Handler
|
||||
I2C_Handler
|
||||
I2S_Handler
|
||||
UART0_Handler
|
||||
UART1_Handler
|
||||
UART2_Handler
|
||||
SPI0_Handler
|
||||
SPI1_Handler
|
||||
SPI2_Handler
|
||||
;KBS_Handler
|
||||
;QDEC_Handler
|
||||
GADC_Handler
|
||||
PWM_Handler
|
||||
AUDIO_Handler
|
||||
;SIM_Handler
|
||||
AES_Handler
|
||||
AOTIMER0_Handler
|
||||
AOTIMER1_Handler
|
||||
CMP_Handler
|
||||
FMC_Handler
|
||||
CAN_Handler
|
||||
USB_Handler
|
||||
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
ALIGN
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, = (Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
END
|
||||
@@ -0,0 +1,90 @@
|
||||
/*
|
||||
* @Descripttion:
|
||||
* @version:
|
||||
* @Author: sueRimn
|
||||
* @Date: 2023-12-12 14:23:55
|
||||
* @LastEditors: sueRimn
|
||||
* @LastEditTime: 2024-06-07 13:46:09
|
||||
*/
|
||||
/*!
|
||||
* \file main.h
|
||||
*
|
||||
* \brief The head file of main.c
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MAIN_H__
|
||||
#define __MAIN_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "rf_config.h"
|
||||
#include "xc6xxx.h"
|
||||
#include "xc6xxx_rf_2_4g.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
#define DEBUG_LOG
|
||||
|
||||
#define RECV_TIMERMS_OUT 1000
|
||||
#define SEND_TIMERMS_CNT 30
|
||||
#define XC_SEND_NUM 1000U
|
||||
|
||||
#define RF_TX_TIMERx TIMER0_IDX
|
||||
#define RF_RX_TIMERx TIMER0_IDX
|
||||
|
||||
#define RF_CONFIRMED_VALUE 5
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
TypeDef
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Global Variables
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
extern uint8_t recv_len;
|
||||
extern uint8_t recv_buf[XINCX_2_4G_PIPE0_LEN];
|
||||
extern bool rf_send_timer_flag;
|
||||
extern bool rf24g_handler_flag;
|
||||
/*------------------------------------------------------------------------------------
|
||||
Exported Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
uint32_t rf_tx_manage(rf_data_typedef_t *rf_data);
|
||||
uint32_t rf_rx_manage(rf_data_typedef_t *rf_data);
|
||||
void rf_buff_info(uint8_t *buff, uint8_t len);
|
||||
void rf_2M_reg_info(void);
|
||||
void rf_dump_log(void);
|
||||
uint8_t rf_data_config(uint8_t *buff, uint8_t len);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H__ */
|
||||
@@ -0,0 +1,285 @@
|
||||
|
||||
#ifndef SDK_CONFIG_H
|
||||
#define SDK_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>\n
|
||||
|
||||
// <h> Xinc_RF
|
||||
|
||||
// <o> XINCX_RF_MODE - RF Tx or Rx Mode
|
||||
// <0=> TX Mode
|
||||
// <1=> RX Mode
|
||||
#ifndef XINCX_RF_MODE
|
||||
#define XINCX_RF_MODE 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_ADDR_L - rf Address Set
|
||||
#ifndef XINCX_2_4G_ADDR_L
|
||||
#define XINCX_2_4G_ADDR_L 0xE7E7E7E6
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_ADDR_H - rf Address Set
|
||||
#ifndef XINCX_2_4G_ADDR_H
|
||||
#define XINCX_2_4G_ADDR_H 0xEA
|
||||
#endif
|
||||
// <h> XINCX_2_4G_AUTO_ACK - 2.4g Auto Acknowledgement
|
||||
//==========================================================
|
||||
// <o> XINCX_2_4G_PIPE0_ENAA - 2.4g Pipe0 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE0_ENAA
|
||||
#define XINCX_2_4G_PIPE0_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE1_ENAA - 2.4g Pipe1 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE1_ENAA
|
||||
#define XINCX_2_4G_PIPE1_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE2_ENAA - 2.4g Pipe2 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE2_ENAA
|
||||
#define XINCX_2_4G_PIPE2_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE3_ENAA - 2.4g Pipe3 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE3_ENAA
|
||||
#define XINCX_2_4G_PIPE3_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE4_ENAA - 2.4g Pipe4 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE4_ENAA
|
||||
#define XINCX_2_4G_PIPE4_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE5_ENAA - 2.4g Pipe5 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE5_ENAA
|
||||
#define XINCX_2_4G_PIPE5_ENAA 1
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <o> XINCX_RF_POWER - rf Power Set
|
||||
#ifndef XINCX_POWER
|
||||
#define XINCX_POWER 0x00008
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_CHANNEL - 2.4g Channel Set
|
||||
#ifndef XINCX_2_4G_CHANNEL
|
||||
#define XINCX_2_4G_CHANNEL 2410
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_NVIC_MODE - RF NVIC Mode
|
||||
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_RF_NVIC_MODE
|
||||
#define XINCX_RF_NVIC_MODE 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_TX_ADDR_WIDTH - RF Tx Addr Width
|
||||
|
||||
// <3=> 3 Bytes
|
||||
// <4=> 4 Bytes
|
||||
// <5=> 5 Bytes
|
||||
#ifndef XINCX_RF_TX_ADDR_WIDTH
|
||||
#define XINCX_RF_TX_ADDR_WIDTH 5
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_TRANS_RATE - RF Transmission Rate Config
|
||||
|
||||
// <0x02=> 1M
|
||||
// <0x0A=> 2M
|
||||
// <0x22=> 250k
|
||||
// <0x2A=> 125k
|
||||
#ifndef XINCX_RF_TRANS_RATE
|
||||
#define XINCX_RF_TRANS_RATE 0x02
|
||||
#endif
|
||||
|
||||
// <e> XINCX_RF_CRC_ENABLE - RF CRC Enable
|
||||
//==========================================================
|
||||
#ifndef XINCX_RF_CRC_ENABLE
|
||||
#define XINCX_RF_CRC_ENABLE 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_CRC_BYTE - 2.4g CRC Bytes Set
|
||||
|
||||
// <1=> 1 Byte
|
||||
// <2=> 2 Bytes
|
||||
#ifndef XINCX_2_4G_CRC_BYTE
|
||||
#define XINCX_2_4G_CRC_BYTE 2
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// <h> XINCX_2_4G_FEATURE_PARAM - 2.4g Feature Parameters
|
||||
//==========================================================
|
||||
|
||||
// <q> XINCX_2_4G_GUARD_CFG - 2.4g Long Payload Feature
|
||||
#ifndef XINCX_2_4G_GUARD_CFG
|
||||
#define XINCX_2_4G_GUARD_CFG 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_LONG_PLD_TYPE - 2.4g Long Pld Type
|
||||
#ifndef XINCX_2_4G_LONG_PLD_TYPE
|
||||
#define XINCX_2_4G_LONG_PLD_TYPE 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_PREAMBLE_NUM - 2.4g Preamble
|
||||
// <o> XINCX_2_4G_PREAMBLE_NUM
|
||||
// <0=> 1 Byte
|
||||
// <1=> 2 Bytes
|
||||
// <2=> 3 Bytes
|
||||
// <3=> 4 Bytes
|
||||
#ifndef XINCX_2_4G_PREAMBLE_NUM
|
||||
#define XINCX_2_4G_PREAMBLE_NUM 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_PREAMBLE_TYPE - 2.4g Preamble Type
|
||||
#ifndef XINCX_2_4G_PREAMBLE_TYPE
|
||||
#define XINCX_2_4G_PREAMBLE_TYPE 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_CRC_SCOPE_GUARD - 2.4g CRC Scope Guard
|
||||
#ifndef XINCX_2_4G_CRC_SCOPE_GUARD
|
||||
#define XINCX_2_4G_CRC_SCOPE_GUARD 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_CRC_SCOPE_HEADER - 2.4g CRC Scope Header
|
||||
#ifndef XINCX_2_4G_CRC_SCOPE_HEADER
|
||||
#define XINCX_2_4G_CRC_SCOPE_HEADER 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_CRC_SCOPE_ADDR - 2.4g CRC Scope Addr
|
||||
#ifndef XINCX_2_4G_CRC_SCOPE_ADDR
|
||||
#define XINCX_2_4G_CRC_SCOPE_ADDR 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_LONG_PLD - 2.4g Long Payload Feature
|
||||
#ifndef XINCX_2_4G_LONG_PLD
|
||||
#define XINCX_2_4G_LONG_PLD 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_FEC - 2.4g FEC&Interleave Feature
|
||||
#ifndef XINCX_2_4G_FEC
|
||||
#define XINCX_2_4G_FEC 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_WHITEN - 2.4g Whiten Feature
|
||||
#ifndef XINCX_2_4G_WHITEN
|
||||
#define XINCX_2_4G_WHITEN 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_DPL - 2.4g Dynamic Payload Length Feature
|
||||
#ifndef XINCX_2_4G_DPL
|
||||
#define XINCX_2_4G_DPL 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_ACK_PAY - 2.4g Payload on ACK
|
||||
#ifndef XINCX_2_4G_ACK_PAY
|
||||
#define XINCX_2_4G_ACK_PAY 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_DYN_ACK - 2.4g W_TX_PAYLOAD_NOACK Command
|
||||
#ifndef XINCX_2_4G_DYN_ACK
|
||||
#define XINCX_2_4G_DYN_ACK 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_PREAMBLE - 2.4g preamble
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_PREAMBLE - 2.4g preamble
|
||||
#ifndef XINCX_2_4G_PREAMBLE
|
||||
#define XINCX_2_4G_PREAMBLE 0x710f5555
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_GUARD - 2.4g guard
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_GUARD - 2.4g guard
|
||||
#ifndef XINCX_2_4G_GUARD
|
||||
#define XINCX_2_4G_GUARD 0x8fc9
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_DYNPD - 2.4g dynpd
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_DYNPD - 2.4g dynpd
|
||||
#ifndef XINCX_2_4G_DYNPD
|
||||
#define XINCX_2_4G_DYNPD 0x3f
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_CRY_CPT_ARRAY - 2.4g Crystal capacitor array
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_CRY_CPT_ARRAY - 2.4g Crystal capacitor array
|
||||
#ifndef XINCX_2_4G_CRY_CPT_ARRAY
|
||||
#define XINCX_2_4G_CRY_CPT_ARRAY 0x36
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_TRANS_PARAM - 2.4g Transmission Parameters
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_RETRANS_CNT - 2.4g Retransmit Count
|
||||
#ifndef XINCX_2_4G_RETRANS_CNT
|
||||
#define XINCX_2_4G_RETRANS_CNT 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_RETRANS_DELAY - 2.4g Retransmission Delay
|
||||
#ifndef XINCX_2_4G_RETRANS_DELAY
|
||||
#define XINCX_2_4G_RETRANS_DELAY 3
|
||||
#endif
|
||||
|
||||
// <h> XINCX_2_4G_PIPE_RX_PAYLEN - 2.4g Pipe Rx Payload Len
|
||||
//==========================================================
|
||||
// <o> - 2.4g Pipe0 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE0_LEN
|
||||
#define XINCX_2_4G_PIPE0_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE1_LEN - 2.4g Pipe1 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE1_LEN
|
||||
#define XINCX_2_4G_PIPE1_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE2_LEN - 2.4g Pipe2 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE2_LEN
|
||||
#define XINCX_2_4G_PIPE2_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE3_LEN - 2.4g Pipe3 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE3_LEN
|
||||
#define XINCX_2_4G_PIPE3_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE4_LEN - 2.4g Pipe4 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE4_LEN
|
||||
#define XINCX_2_4G_PIPE4_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE5_LEN - 2.4g Pipe5 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE5_LEN
|
||||
#define XINCX_2_4G_PIPE5_LEN 32
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// </h>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,12 @@
|
||||
|
||||
FUNC void Initialization(void)
|
||||
{
|
||||
SP = _RDWORD(0x10000000);
|
||||
PC = _RDWORD(0x10000004);
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
LOAD %L INCREMENTAL
|
||||
Initialization();
|
||||
@@ -0,0 +1,84 @@
|
||||
|
||||
|
||||
|
||||
FUNC void InitGpio(void)
|
||||
{
|
||||
// Config IOMUX
|
||||
/*
|
||||
gpio_mux_ctl_u(33,1);//d2
|
||||
gpio_mux_ctl_u(34,1);//d3
|
||||
gpio_mux_ctl_u(35,2);//clk
|
||||
gpio_mux_ctl_u(36,2);//cs
|
||||
gpio_mux_ctl_u(37,2);//d0 rx
|
||||
gpio_mux_ctl_u(38,2);//d1 tx
|
||||
*/
|
||||
_WDWORD(0x4000019c, 0x00002A94);
|
||||
}
|
||||
FUNC void InitFlash(void)
|
||||
{
|
||||
|
||||
}
|
||||
FUNC void InitXIP(void)
|
||||
{
|
||||
|
||||
_WDWORD(0x40000104,0x040000);//reset ssi0
|
||||
_WDWORD(0x40000104,0x040004);//reset ssi0
|
||||
_WDWORD(0x40000050,0x110000);//close spi0 mclk
|
||||
_WDWORD(0x40000070,0x1000000);//close spi0 pclk
|
||||
|
||||
|
||||
//config fmc
|
||||
_WDWORD(0x40000270, 0x0503);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x40000270, 0x3503);
|
||||
//config cache
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x52000000, 0x0);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x52000000, 0x21);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
|
||||
|
||||
//config xip spi
|
||||
_WDWORD(0x51000008, 0); //disable spi
|
||||
|
||||
_WDWORD(0x5100002c,0); //close IE
|
||||
_WDWORD(0x51000000,0x1F); //32bit SPI data
|
||||
_WDWORD(0x51000010,0x01); //enable select slave -- SE
|
||||
_WDWORD(0x51000018,0x0); //TXFTL be set 0
|
||||
_WDWORD(0x5100001c,0x0); //RXFTL be set 0
|
||||
|
||||
_WDWORD(0x5100010c, 0x01);//enable select slave
|
||||
_WDWORD(0x51000114, 0xFF);//XIP time out
|
||||
|
||||
_WDWORD(0x51000014, 0x2);//div 2
|
||||
|
||||
//quad
|
||||
_WDWORD(0x51000108, (2)|(6<<4)|(2<<9)|(1<<22)|(1<<29)|(1<<23)|(0<<24)|(8<<13));
|
||||
_WDWORD(0x51000100, 0x6b);//quad read cmd
|
||||
_WDWORD(0x51000104, 0x6b);//quad read cmd
|
||||
|
||||
|
||||
// //dual
|
||||
// _WDWORD(0x51000108, (1)|(6<<4)|(2<<9)|(1<<22)|(1<<29)|(1<<23)|(0)|(8<<13));
|
||||
// _WDWORD(0x51000100, 0x3b);//dual read cmd
|
||||
// _WDWORD(0x51000104, 0x3b);//dual read cmd
|
||||
|
||||
|
||||
_WDWORD(0x51000008, 1); //enable spi
|
||||
}
|
||||
|
||||
FUNC void Initialization(void)
|
||||
{
|
||||
InitGpio();
|
||||
InitFlash();
|
||||
InitXIP();
|
||||
SP = _RDWORD(0x11001000);
|
||||
PC = _RDWORD(0x11001004);
|
||||
_WDWORD(0x4000013C, 0x11001001);
|
||||
}
|
||||
LOAD %L INCREMENTAL
|
||||
Initialization();
|
||||
@@ -0,0 +1,18 @@
|
||||
|
||||
LOAD 0x10000000
|
||||
{
|
||||
EXE 0x10000000
|
||||
{
|
||||
startup_xinc.o (RESET, +FIRST)
|
||||
* (+RO)
|
||||
|
||||
}
|
||||
|
||||
RW +0000
|
||||
{
|
||||
* (+RW,+ZI)
|
||||
}
|
||||
|
||||
;ScatterAssert(ImageLength(RW) < 1024 * 28)
|
||||
}
|
||||
|
||||
@@ -0,0 +1,18 @@
|
||||
|
||||
|
||||
LOAD 0x11001000
|
||||
{
|
||||
EXE 0x11001000
|
||||
{
|
||||
startup_xinc.o (RESET, +FIRST)
|
||||
* (+RO)
|
||||
|
||||
}
|
||||
|
||||
RW 0x10002000
|
||||
{
|
||||
* (+RW,+ZI)
|
||||
*(ram_code)
|
||||
}
|
||||
ScatterAssert((ImageLength(RW)) < 1024 * 32 )
|
||||
}
|
||||
Binary file not shown.
@@ -0,0 +1 @@
|
||||
Xincboot_tool.exe 0_ram.bin 1_ram_download.bin 0 0 0 0 1
|
||||
Binary file not shown.
Binary file not shown.
@@ -0,0 +1 @@
|
||||
.\Tools\xinchip_xip_tool.exe .\Output\0_ram.bin .\Output\xip_dual .\Output\rf24_ack_xip.bin
|
||||
File diff suppressed because one or more lines are too long
@@ -0,0 +1,577 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rf_2_4g_ack_demo</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>0</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>7</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>4</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile>.\JLinkSettings.ini</tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>DLGUARM</Key>
|
||||
<Name>??H</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ARMRTXEVENTFLAGS</Key>
|
||||
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>DLGTARM</Key>
|
||||
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ARMDBGFLAGS</Key>
|
||||
<Name></Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U4294967295 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN1 -FF0xc66xx -FS010000000 -FL020000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>1</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>1</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Target>
|
||||
<TargetName>rf_2_4g_ack_xip_demo</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>7</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>0</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\UL2CM3.DLL</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Startup</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\CMSIS\core_cm0.h</PathWithFileName>
|
||||
<FilenameWithoutPath>core_cm0.h</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>2</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\Startup\xc60xx\startup_xinc.s</PathWithFileName>
|
||||
<FilenameWithoutPath>startup_xinc.s</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>3</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\Startup\system_xinc.c</PathWithFileName>
|
||||
<FilenameWithoutPath>system_xinc.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>4</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\Startup\system_it_xinc.c</PathWithFileName>
|
||||
<FilenameWithoutPath>system_it_xinc.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>Application</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>5</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\src\main.c</PathWithFileName>
|
||||
<FilenameWithoutPath>main.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>RF_Config</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>6</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\rf_config\rf_config.h</PathWithFileName>
|
||||
<FilenameWithoutPath>rf_config.h</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>RF_Drivers</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>7</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\rf24\Drivers\xc6xxx_rf_2_4g\xc6xxx_rf_2_4g.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc6xxx_rf_2_4g.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>Drivers</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>8</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\ringbuffer.c</PathWithFileName>
|
||||
<FilenameWithoutPath>ringbuffer.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>9</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_clock.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_clock.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>10</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_gpio.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_gpio.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>11</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
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|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_pwr.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_pwr.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>12</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_systick.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_systick.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>13</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_timer.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_timer.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>14</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_uart.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_uart.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>15</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_wdt.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_wdt.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>16</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_fmc_spi.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_fmc_spi.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
File diff suppressed because it is too large
Load Diff
Binary file not shown.
@@ -0,0 +1,59 @@
|
||||
#!/usr/bin/env python
|
||||
#-*- coding:UTF-8 -*-
|
||||
import socket
|
||||
from select import select
|
||||
import time
|
||||
import os
|
||||
import sys
|
||||
import threading
|
||||
import json
|
||||
import struct
|
||||
import binascii
|
||||
import time
|
||||
import re
|
||||
import fileinput
|
||||
|
||||
|
||||
|
||||
def dump_addr(addr):
|
||||
file_asm = "./Xinc_ble_sdk_asm"
|
||||
cur_func = ""
|
||||
with open(file_asm, 'r') as fd:
|
||||
for line in fd:
|
||||
if re.match(r" \w+", line) != None:
|
||||
cur_func = line.strip()
|
||||
#
|
||||
if re.search("^ 0x", line) != None and re.search(addr, line) != None:
|
||||
print(addr, cur_func)
|
||||
break
|
||||
fd.close()
|
||||
|
||||
if __name__ == "__main__":
|
||||
file_in = "./dump.txt"
|
||||
|
||||
for line in fileinput.input(file_in):
|
||||
# 处理 PC 指针信息
|
||||
if re.search("PC = ", line) != None:
|
||||
pc_addr = line.split("PC = ")[1].split(",")[0]
|
||||
#print(hex(int(pc_addr, 16)))
|
||||
dump_addr(hex(int(pc_addr, 16)))
|
||||
|
||||
# 处理 栈信息
|
||||
if re.search("^[0-9]",line) != None:
|
||||
#print(line)
|
||||
stack = line.split('=')[1].replace('\n', '').split(' ')
|
||||
for addr in stack:
|
||||
if addr == ' ' or re.search("^1", addr) == None:
|
||||
continue
|
||||
#print(addr, hex(int(addr,16)-1))
|
||||
dump_addr(hex(int(addr,16)-1))
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
Binary file not shown.
@@ -0,0 +1,234 @@
|
||||
|
||||
;/*****************************************************************************
|
||||
; * @file: startup_xinc.s
|
||||
; * @purpose: CMSIS Cortex-M0 Core Device Startup File for the
|
||||
; * Device xinc.
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000600
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
; ToDo: Add here the vectors for the device specific external interrupts handler
|
||||
DCD 0 ; 0 BLE Handler
|
||||
DCD DMAS_Handler ; 1
|
||||
DCD CPR_Handler ; 2
|
||||
DCD GPIO_Handler ; 3
|
||||
DCD RTC_Handler ; 4
|
||||
DCD TIMER0_Handler ; 5
|
||||
DCD TIMER1_Handler
|
||||
DCD TIMER2_Handler
|
||||
DCD TIMER3_Handler
|
||||
DCD WDT_Handler
|
||||
DCD I2C_Handler
|
||||
DCD UART0_Handler
|
||||
DCD UART1_Handler
|
||||
DCD SPI0_Handler
|
||||
DCD SPI1_Handler
|
||||
DCD 0
|
||||
DCD 0
|
||||
DCD GADC_Handler ; 17
|
||||
DCD 0 ; 18
|
||||
DCD 0 ; 19
|
||||
DCD 0 ; 20
|
||||
DCD 0 ; 21
|
||||
DCD RF24G_Handler ; 22
|
||||
DCD PWM_Handler ; 23
|
||||
DCD BOR_Handler ; 24
|
||||
DCD 0 ; 25
|
||||
DCD 0 ; 26
|
||||
DCD AOTIMER0_Handler ; 27
|
||||
DCD AOTIMER1_Handler ; 28
|
||||
DCD CMP_Handler ; 29
|
||||
DCD FMC_Handler ; 30
|
||||
DCD CAN_Handler ; 31
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR r0, =0x4000013C ; remap
|
||||
LDR r1, =0x10000001
|
||||
STR r1, [r0]
|
||||
|
||||
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
;EXPORT BLE_Handler [WEAK]
|
||||
EXPORT DMAS_Handler [WEAK]
|
||||
EXPORT CPR_Handler [WEAK]
|
||||
EXPORT GPIO_Handler [WEAK]
|
||||
EXPORT RTC_Handler [WEAK]
|
||||
EXPORT TIMER0_Handler [WEAK]
|
||||
EXPORT TIMER1_Handler [WEAK]
|
||||
EXPORT TIMER2_Handler [WEAK]
|
||||
EXPORT TIMER3_Handler [WEAK]
|
||||
EXPORT WDT_Handler [WEAK]
|
||||
EXPORT I2C_Handler [WEAK]
|
||||
EXPORT UART0_Handler [WEAK]
|
||||
EXPORT UART1_Handler [WEAK]
|
||||
EXPORT SPI0_Handler [WEAK]
|
||||
EXPORT SPI1_Handler [WEAK]
|
||||
;EXPORT KBS_Handler [WEAK]
|
||||
;EXPORT QDEC_Handler [WEAK]
|
||||
EXPORT GADC_Handler [WEAK]
|
||||
EXPORT AOTIMER0_Handler [WEAK]
|
||||
EXPORT AOTIMER1_Handler [WEAK]
|
||||
EXPORT CMP_Handler [WEAK]
|
||||
EXPORT FMC_Handler [WEAK]
|
||||
EXPORT CAN_Handler [WEAK]
|
||||
;EXPORT SIM_Handler [WEAK]
|
||||
;EXPORT AES_Handler [WEAK]
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
EXPORT RF24G_Handler [WEAK]
|
||||
EXPORT PWM_Handler [WEAK]
|
||||
EXPORT BOR_Handler [WEAK]
|
||||
|
||||
PendSV_Handler
|
||||
SysTick_Handler
|
||||
;BLE_Handler
|
||||
DMAS_Handler
|
||||
CPR_Handler
|
||||
GPIO_Handler
|
||||
RTC_Handler
|
||||
TIMER0_Handler
|
||||
TIMER1_Handler
|
||||
TIMER2_Handler
|
||||
TIMER3_Handler
|
||||
WDT_Handler
|
||||
I2C_Handler
|
||||
UART0_Handler
|
||||
UART1_Handler
|
||||
SPI0_Handler
|
||||
SPI1_Handler
|
||||
;KBS_Handler
|
||||
;QDEC_Handler
|
||||
GADC_Handler
|
||||
;SIM_Handler
|
||||
;AES_Handler
|
||||
AOTIMER0_Handler
|
||||
AOTIMER1_Handler
|
||||
CMP_Handler
|
||||
FMC_Handler
|
||||
CAN_Handler
|
||||
RF24G_Handler
|
||||
PWM_Handler
|
||||
BOR_Handler
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
ALIGN
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, = (Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
END
|
||||
|
||||
@@ -0,0 +1,232 @@
|
||||
/*!
|
||||
* \file system_it_xinc.c
|
||||
*
|
||||
* \brief Target system interruption implementation
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "system_it_xinc.h"
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Func Prototype
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles NMI exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END NonMaskableInt_IRQn */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Hard Fault exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END HardFault_IRQn */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Memory Manage exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Bus Fault exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Usage Fault exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles SVCall exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVCall_IRQn */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END SVCall_IRQn */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Debug Monitor exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles PendSVC exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END PendSV_IRQn */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/****************************** Hard Fault Handler Functions *******************************/
|
||||
/*------------------------------------------------------------------------------------
|
||||
Private Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
void HardFault_Handler_c(unsigned int * HardFault_args)
|
||||
{
|
||||
/*栈帧里面内容：*/
|
||||
unsigned int stack_r0; //压栈的 R0
|
||||
unsigned int stack_r1; //压栈的 R1
|
||||
unsigned int stack_r2; //压栈的 R2
|
||||
unsigned int stack_r3; //压栈的 R3
|
||||
unsigned int stack_r12; //压栈的 R12
|
||||
unsigned int stack_lr; //压栈的 lr
|
||||
unsigned int stack_pc; //压栈的 pc
|
||||
unsigned int stack_psr; //压栈的 psr
|
||||
|
||||
stack_r0 = ((unsigned int)HardFault_args[0]);
|
||||
stack_r1 = ((unsigned int)HardFault_args[1]);
|
||||
stack_r2 = ((unsigned int)HardFault_args[2]);
|
||||
stack_r3 = ((unsigned int)HardFault_args[3]);
|
||||
stack_r12 = ((unsigned int)HardFault_args[4]);
|
||||
stack_lr = ((unsigned int)HardFault_args[5]);
|
||||
stack_pc = ((unsigned int)HardFault_args[6]);
|
||||
stack_psr = ((unsigned int)HardFault_args[7]);
|
||||
|
||||
DEBUG("----%s----\n", __func__);
|
||||
DEBUG("R0=%x\n",stack_r0);
|
||||
DEBUG("R1=%x\n",stack_r1);
|
||||
DEBUG("R2=%x\n",stack_r2);
|
||||
DEBUG("R3=%x\n",stack_r3);
|
||||
DEBUG("R12=%x\n",stack_r12);
|
||||
DEBUG("LR[R14]=%x\n",stack_lr);
|
||||
DEBUG("PC[R15]=%x\n",stack_pc);
|
||||
DEBUG("PSR=%x\n",stack_psr);
|
||||
DEBUG("SCB_SHCSR=%x\n",SCB->SHCSR);
|
||||
DEBUG("---------------------------\n");
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*******************************************************************************************/
|
||||
|
||||
@@ -0,0 +1,58 @@
|
||||
/*!
|
||||
* \file system_it_xinc.h
|
||||
*
|
||||
* \brief The header of system_it_xinc.c
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __SYSTEM_IT_XINC_H__
|
||||
#define __SYSTEM_IT_XINC_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "xc6xxx.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Exported Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
void NMI_Handler( void );
|
||||
void HardFault_Handler( void );
|
||||
void MemManage_Handler( void );
|
||||
void BusFault_Handler( void );
|
||||
void UsageFault_Handler( void );
|
||||
void SVC_Handler( void );
|
||||
void DebugMon_Handler( void );
|
||||
void PendSV_Handler( void );
|
||||
|
||||
void HardFault_Handler_c(unsigned int * HardFault_args);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __SYSTEM_IT_XINC_H__ */
|
||||
|
||||
@@ -0,0 +1,113 @@
|
||||
/**
|
||||
* Initialize the system
|
||||
*
|
||||
* @param none
|
||||
* @return none
|
||||
*
|
||||
* @brief Setup the microcontroller system
|
||||
*
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include <stdio.h>
|
||||
|
||||
#include "xc6xxx.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
#define __DEBUG_OUT_PORT 0
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
#define VECTOR_NUM 48
|
||||
|
||||
void set_vector(void)
|
||||
{
|
||||
#if (USE_XIP == 1)
|
||||
__disable_irq();
|
||||
for (uint32_t i = 0, *Pvector = (uint32_t *)(0x11001000 + 0),
|
||||
*_vector_table = (uint32_t *)(0x10000000);
|
||||
i < VECTOR_NUM; i++) // copy vertor table
|
||||
{
|
||||
_vector_table[i] = *Pvector++;
|
||||
}
|
||||
|
||||
*((volatile unsigned int *)(0x4000013C)) = 0x10000001; // inter vertor table remap
|
||||
__enable_irq();
|
||||
#endif
|
||||
}
|
||||
|
||||
static void WDT_ResetInit(void)
|
||||
{
|
||||
cpr_ctlapbclken_grctl__wdt_pclk_en__setf(ENABLE);
|
||||
|
||||
cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_ENABLE);
|
||||
cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_DISABLE);
|
||||
|
||||
cpr_rstctl_wdtrst_mask_set((WDT_SYS_RSTN_MASK_DISABLE | WDT_M0_RSTN_MASK_ENABLE));
|
||||
|
||||
cpr_lp_ctl__wdt_tclk_en__setf(ENABLE);
|
||||
wdt_cr__wdt_en__setf(DISABLE);
|
||||
}
|
||||
|
||||
void SystemInit(void)
|
||||
{
|
||||
|
||||
WDT_ResetInit();
|
||||
|
||||
#if (USE_XIP == 1)
|
||||
|
||||
set_vector();
|
||||
#endif
|
||||
}
|
||||
|
||||
__RAM_CODE int sendchar(int c)
|
||||
{
|
||||
unsigned int status;
|
||||
#if (__DEBUG_OUT_PORT == 1)
|
||||
for (;;) {
|
||||
status = (*((volatile unsigned *)(0x40011000 + 0x14)));
|
||||
status &= 0x20;
|
||||
if (status == 0x20)
|
||||
break;
|
||||
}
|
||||
(*((volatile unsigned *)(0x40011000 + 0x00))) = c;
|
||||
return (1);
|
||||
#else
|
||||
for (;;) {
|
||||
status = (*((volatile unsigned *)(0x40010000 + 0x14)));
|
||||
status &= 0x20;
|
||||
if (status == 0x20)
|
||||
break;
|
||||
}
|
||||
(*((volatile unsigned *)(0x40010000 + 0x00))) = c;
|
||||
return (1);
|
||||
#endif
|
||||
}
|
||||
|
||||
struct __FILE
|
||||
{
|
||||
int handle; /* Add whatever you need here */
|
||||
};
|
||||
|
||||
FILE __stdout;
|
||||
__RAM_CODE int fputc(int ch, FILE *f) { return (sendchar(ch)); }
|
||||
|
||||
int ferror(FILE *f)
|
||||
{
|
||||
/* Your implementation of ferror */
|
||||
return EOF;
|
||||
}
|
||||
|
||||
void _ttywrch(int ch) { sendchar(ch); }
|
||||
|
||||
void _sys_exit(int return_code)
|
||||
{
|
||||
label:
|
||||
goto label; /* endless loop */
|
||||
}
|
||||
@@ -0,0 +1,256 @@
|
||||
|
||||
;/*****************************************************************************
|
||||
; * @file: startup_xinc.s
|
||||
; * @purpose: CMSIS Cortex-M0 Core Device Startup File for the
|
||||
; * Device xinc.
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00001800
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
; ToDo: Add here the vectors for the device specific external interrupts handler
|
||||
DCD BLE_Handler ; 0
|
||||
DCD DMA_Handler ; 1
|
||||
DCD CPR_Handler ; 2
|
||||
DCD GPIO_Handler ; 3
|
||||
DCD RTC_Handler ; 4
|
||||
DCD TIMER0_Handler ; 5
|
||||
DCD TIMER1_Handler ; 6
|
||||
DCD TIMER2_Handler ; 7
|
||||
DCD TIMER3_Handler ; 8
|
||||
DCD WDT_Handler ; 9
|
||||
DCD I2C_Handler ; 10
|
||||
DCD UART0_Handler ; 11
|
||||
DCD UART1_Handler ; 12
|
||||
DCD SPI0_Handler ; 13
|
||||
DCD SPI1_Handler ; 14
|
||||
DCD 0 ; 15
|
||||
DCD 0 ; 16
|
||||
DCD GADC_Handler ; 17
|
||||
DCD PWM_Handler ; 18
|
||||
DCD AES_Handler ; 19
|
||||
DCD USB_Handler ; 20
|
||||
DCD AUDIO_Handler ; 21
|
||||
DCD RF24G_Handler ; 22
|
||||
DCD SPI2_Handler ; 23
|
||||
DCD 0 ; 24
|
||||
DCD UART2_Handler ; 25
|
||||
DCD I2S_Handler ; 26
|
||||
DCD AOTIMER0_Handler ; 27
|
||||
DCD AOTIMER1_Handler ; 28
|
||||
DCD CMP_Handler ; 29
|
||||
DCD FMC_Handler ; 30
|
||||
DCD CAN_Handler ; 31
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR r0, =0x4000013C ; remap
|
||||
LDR r1, =0x10000001
|
||||
STR r1, [r0]
|
||||
|
||||
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
IMPORT HardFault_Handler_c ;函数声明
|
||||
movs r0, #4 ;判断主栈指针还是进程栈指针
|
||||
mov r1, lr
|
||||
tst r0, r1
|
||||
beq hf_used_msp ;如果是主栈指针
|
||||
mrs r0, psp ;否则是进程栈指针,把进程栈指针地址付给 R0
|
||||
ldr r1, =HardFault_Handler_c ;跳转到 HardFault 中断程序
|
||||
bx r1
|
||||
hf_used_msp
|
||||
mrs r0, msp ;把主栈指针地址赋给 R0
|
||||
ldr r1, =HardFault_Handler_c
|
||||
bx r1
|
||||
;EXPORT HardFault_Handler [WEAK]
|
||||
;B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
EXPORT BLE_Handler [WEAK]
|
||||
EXPORT DMA_Handler [WEAK]
|
||||
EXPORT CPR_Handler [WEAK]
|
||||
EXPORT GPIO_Handler [WEAK]
|
||||
EXPORT RTC_Handler [WEAK]
|
||||
EXPORT TIMER0_Handler [WEAK]
|
||||
EXPORT TIMER1_Handler [WEAK]
|
||||
EXPORT TIMER2_Handler [WEAK]
|
||||
EXPORT TIMER3_Handler [WEAK]
|
||||
EXPORT WDT_Handler [WEAK]
|
||||
EXPORT I2C_Handler [WEAK]
|
||||
EXPORT UART0_Handler [WEAK]
|
||||
EXPORT UART1_Handler [WEAK]
|
||||
EXPORT SPI0_Handler [WEAK]
|
||||
EXPORT SPI1_Handler [WEAK]
|
||||
;EXPORT KBS_Handler [WEAK]
|
||||
;EXPORT QDEC_Handler [WEAK]
|
||||
EXPORT GADC_Handler [WEAK]
|
||||
EXPORT PWM_Handler [WEAK]
|
||||
EXPORT AES_Handler [WEAK]
|
||||
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
|
||||
EXPORT USB_Handler [WEAK];20
|
||||
EXPORT AUDIO_Handler [WEAK];21
|
||||
EXPORT RF24G_Handler [WEAK];22
|
||||
EXPORT SPI2_Handler [WEAK];23
|
||||
;EXPORT MPU_Handler [WEAK];24
|
||||
EXPORT UART2_Handler [WEAK];25
|
||||
EXPORT I2S_Handler [WEAK];26
|
||||
EXPORT AOTIMER0_Handler [WEAK];27
|
||||
EXPORT AOTIMER1_Handler [WEAK];28
|
||||
EXPORT CMP_Handler [WEAK];29
|
||||
EXPORT FMC_Handler [WEAK];30
|
||||
EXPORT CAN_Handler [WEAK];31
|
||||
|
||||
PendSV_Handler
|
||||
SysTick_Handler
|
||||
BLE_Handler
|
||||
RF24G_Handler
|
||||
DMA_Handler
|
||||
CPR_Handler
|
||||
GPIO_Handler
|
||||
RTC_Handler
|
||||
TIMER0_Handler
|
||||
TIMER1_Handler
|
||||
TIMER2_Handler
|
||||
TIMER3_Handler
|
||||
WDT_Handler
|
||||
I2C_Handler
|
||||
I2S_Handler
|
||||
UART0_Handler
|
||||
UART1_Handler
|
||||
UART2_Handler
|
||||
SPI0_Handler
|
||||
SPI1_Handler
|
||||
SPI2_Handler
|
||||
;KBS_Handler
|
||||
;QDEC_Handler
|
||||
GADC_Handler
|
||||
PWM_Handler
|
||||
AUDIO_Handler
|
||||
;SIM_Handler
|
||||
AES_Handler
|
||||
AOTIMER0_Handler
|
||||
AOTIMER1_Handler
|
||||
CMP_Handler
|
||||
FMC_Handler
|
||||
CAN_Handler
|
||||
USB_Handler
|
||||
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
ALIGN
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, = (Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
END
|
||||
@@ -0,0 +1,81 @@
|
||||
/*!
|
||||
* \file main.h
|
||||
*
|
||||
* \brief The head file of main.c
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MAIN_H__
|
||||
#define __MAIN_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "xc6xxx.h"
|
||||
#include "xc6xxx_rf_2_4g.h"
|
||||
#include "rf_config.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
#define DEBUG_LOG
|
||||
|
||||
#define RECV_TIMERMS_OUT 1000
|
||||
#define SEND_TIMERMS_CNT 50
|
||||
//#define XC_SEND_NUM 1000U
|
||||
|
||||
#define RF_TX_TIMERx TIMER0_IDX
|
||||
#define RF_RX_TIMERx TIMER0_IDX
|
||||
|
||||
|
||||
#define RF_CONFIRMED_VALUE 5
|
||||
|
||||
#define RF_SPI_BASR_ADDR 0x3f000 //A multiple of 4096
|
||||
/*------------------------------------------------------------------------------------
|
||||
TypeDef
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Global Variables
|
||||
-------------------------------------------------------------------------------------*/
|
||||
extern uint8_t recv_len;
|
||||
extern uint8_t recv_buf[XINCX_2_4G_PIPE0_LEN];
|
||||
extern bool rf_send_timer_flag;
|
||||
extern bool rf24g_handler_flag;
|
||||
/*------------------------------------------------------------------------------------
|
||||
Exported Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
uint32_t rf_2_4g_tx_manage(rf_data_typedef_t *rf_data);
|
||||
uint32_t rf_2_4g_rx_manage(rf_data_typedef_t *rf_data);
|
||||
void rf_2_4g_dump_log(void);
|
||||
uint8_t rf_2_4g_data_config(uint8_t *buff, uint8_t len);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H__ */
|
||||
|
||||
@@ -0,0 +1,286 @@
|
||||
|
||||
#ifndef SDK_CONFIG_H
|
||||
#define SDK_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>\n
|
||||
|
||||
// <h> Xinc_RF
|
||||
|
||||
// <o> XINCX_RF_MODE - RF Tx or Rx Mode
|
||||
// <0=> TX Mode
|
||||
// <1=> RX Mode
|
||||
#ifndef XINCX_RF_MODE
|
||||
#define XINCX_RF_MODE 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_ADDR_L - rf Address Set
|
||||
#ifndef XINCX_2_4G_ADDR_L
|
||||
#define XINCX_2_4G_ADDR_L 0xE7E7E7E6
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_ADDR_H - rf Address Set
|
||||
#ifndef XINCX_2_4G_ADDR_H
|
||||
#define XINCX_2_4G_ADDR_H 0xEA
|
||||
#endif
|
||||
// <h> XINCX_2_4G_AUTO_ACK - 2.4g Auto Acknowledgement
|
||||
//==========================================================
|
||||
// <o> XINCX_2_4G_PIPE0_ENAA - 2.4g Pipe0 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE0_ENAA
|
||||
#define XINCX_2_4G_PIPE0_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE1_ENAA - 2.4g Pipe1 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE1_ENAA
|
||||
#define XINCX_2_4G_PIPE1_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE2_ENAA - 2.4g Pipe2 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE2_ENAA
|
||||
#define XINCX_2_4G_PIPE2_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE3_ENAA - 2.4g Pipe3 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE3_ENAA
|
||||
#define XINCX_2_4G_PIPE3_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE4_ENAA - 2.4g Pipe4 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE4_ENAA
|
||||
#define XINCX_2_4G_PIPE4_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE5_ENAA - 2.4g Pipe5 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE5_ENAA
|
||||
#define XINCX_2_4G_PIPE5_ENAA 1
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <o> XINCX_RF_POWER - rf Power Set
|
||||
#ifndef XINCX_POWER
|
||||
#define XINCX_POWER 0x00008
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_CHANNEL - 2.4g Channel Set
|
||||
#ifndef XINCX_2_4G_CHANNEL
|
||||
#define XINCX_2_4G_CHANNEL 2410
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_NVIC_MODE - RF NVIC Mode
|
||||
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_RF_NVIC_MODE
|
||||
#define XINCX_RF_NVIC_MODE 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_TX_ADDR_WIDTH - RF Tx Addr Width
|
||||
|
||||
// <3=> 3 Bytes
|
||||
// <4=> 4 Bytes
|
||||
// <5=> 5 Bytes
|
||||
#ifndef XINCX_RF_TX_ADDR_WIDTH
|
||||
#define XINCX_RF_TX_ADDR_WIDTH 5
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_TRANS_RATE - RF Transmission Rate Config
|
||||
|
||||
// <0x02=> 1M
|
||||
// <0x0A=> 2M
|
||||
// <0x22=> 250k
|
||||
// <0x2A=> 125k
|
||||
#ifndef XINCX_RF_TRANS_RATE
|
||||
#define XINCX_RF_TRANS_RATE 0x02
|
||||
#endif
|
||||
|
||||
// <e> XINCX_RF_CRC_ENABLE - RF CRC Enable
|
||||
//==========================================================
|
||||
#ifndef XINCX_RF_CRC_ENABLE
|
||||
#define XINCX_RF_CRC_ENABLE 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_CRC_BYTE - 2.4g CRC Bytes Set
|
||||
|
||||
// <1=> 1 Byte
|
||||
// <2=> 2 Bytes
|
||||
#ifndef XINCX_2_4G_CRC_BYTE
|
||||
#define XINCX_2_4G_CRC_BYTE 2
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// <h> XINCX_2_4G_FEATURE_PARAM - 2.4g Feature Parameters
|
||||
//==========================================================
|
||||
|
||||
// <q> XINCX_2_4G_GUARD_CFG - 2.4g Long Payload Feature
|
||||
#ifndef XINCX_2_4G_GUARD_CFG
|
||||
#define XINCX_2_4G_GUARD_CFG 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_LONG_PLD_TYPE - 2.4g Long Pld Type
|
||||
#ifndef XINCX_2_4G_LONG_PLD_TYPE
|
||||
#define XINCX_2_4G_LONG_PLD_TYPE 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_PREAMBLE_NUM - 2.4g Preamble
|
||||
// <o> XINCX_2_4G_PREAMBLE_NUM
|
||||
// <0=> 1 Byte
|
||||
// <1=> 2 Bytes
|
||||
// <2=> 3 Bytes
|
||||
// <3=> 4 Bytes
|
||||
#ifndef XINCX_2_4G_PREAMBLE_NUM
|
||||
#define XINCX_2_4G_PREAMBLE_NUM 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_PREAMBLE_TYPE - 2.4g Preamble Type
|
||||
#ifndef XINCX_2_4G_PREAMBLE_TYPE
|
||||
#define XINCX_2_4G_PREAMBLE_TYPE 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_CRC_SCOPE_GUARD - 2.4g CRC Scope Guard
|
||||
#ifndef XINCX_2_4G_CRC_SCOPE_GUARD
|
||||
#define XINCX_2_4G_CRC_SCOPE_GUARD 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_CRC_SCOPE_HEADER - 2.4g CRC Scope Header
|
||||
#ifndef XINCX_2_4G_CRC_SCOPE_HEADER
|
||||
#define XINCX_2_4G_CRC_SCOPE_HEADER 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_CRC_SCOPE_ADDR - 2.4g CRC Scope Addr
|
||||
#ifndef XINCX_2_4G_CRC_SCOPE_ADDR
|
||||
#define XINCX_2_4G_CRC_SCOPE_ADDR 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_LONG_PLD - 2.4g Long Payload Feature
|
||||
#ifndef XINCX_2_4G_LONG_PLD
|
||||
#define XINCX_2_4G_LONG_PLD 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_FEC - 2.4g FEC&Interleave Feature
|
||||
#ifndef XINCX_2_4G_FEC
|
||||
#define XINCX_2_4G_FEC 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_WHITEN - 2.4g Whiten Feature
|
||||
#ifndef XINCX_2_4G_WHITEN
|
||||
#define XINCX_2_4G_WHITEN 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_DPL - 2.4g Dynamic Payload Length Feature
|
||||
#ifndef XINCX_2_4G_DPL
|
||||
#define XINCX_2_4G_DPL 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_ACK_PAY - 2.4g Payload on ACK
|
||||
#ifndef XINCX_2_4G_ACK_PAY
|
||||
#define XINCX_2_4G_ACK_PAY 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_DYN_ACK - 2.4g W_TX_PAYLOAD_NOACK Command
|
||||
#ifndef XINCX_2_4G_DYN_ACK
|
||||
#define XINCX_2_4G_DYN_ACK 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_PREAMBLE - 2.4g preamble
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_PREAMBLE - 2.4g preamble
|
||||
#ifndef XINCX_2_4G_PREAMBLE
|
||||
#define XINCX_2_4G_PREAMBLE 0x710f5555
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_GUARD - 2.4g guard
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_GUARD - 2.4g guard
|
||||
#ifndef XINCX_2_4G_GUARD
|
||||
#define XINCX_2_4G_GUARD 0x8fc9
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_DYNPD - 2.4g dynpd
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_DYNPD - 2.4g dynpd
|
||||
#ifndef XINCX_2_4G_DYNPD
|
||||
#define XINCX_2_4G_DYNPD 0x3f
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
|
||||
// <h> XINCX_2_4G_CRY_CPT_ARRAY - 2.4g Crystal capacitor array
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_CRY_CPT_ARRAY - 2.4g Crystal capacitor array
|
||||
#ifndef XINCX_2_4G_CRY_CPT_ARRAY
|
||||
#define XINCX_2_4G_CRY_CPT_ARRAY 0x36
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_TRANS_PARAM - 2.4g Transmission Parameters
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_RETRANS_CNT - 2.4g Retransmit Count
|
||||
#ifndef XINCX_2_4G_RETRANS_CNT
|
||||
#define XINCX_2_4G_RETRANS_CNT 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_RETRANS_DELAY - 2.4g Retransmission Delay
|
||||
#ifndef XINCX_2_4G_RETRANS_DELAY
|
||||
#define XINCX_2_4G_RETRANS_DELAY 3
|
||||
#endif
|
||||
|
||||
// <h> XINCX_2_4G_PIPE_RX_PAYLEN - 2.4g Pipe Rx Payload Len
|
||||
//==========================================================
|
||||
// <o> - 2.4g Pipe0 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE0_LEN
|
||||
#define XINCX_2_4G_PIPE0_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE1_LEN - 2.4g Pipe1 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE1_LEN
|
||||
#define XINCX_2_4G_PIPE1_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE2_LEN - 2.4g Pipe2 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE2_LEN
|
||||
#define XINCX_2_4G_PIPE2_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE3_LEN - 2.4g Pipe3 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE3_LEN
|
||||
#define XINCX_2_4G_PIPE3_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE4_LEN - 2.4g Pipe4 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE4_LEN
|
||||
#define XINCX_2_4G_PIPE4_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE5_LEN - 2.4g Pipe5 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE5_LEN
|
||||
#define XINCX_2_4G_PIPE5_LEN 32
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// </h>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,579 @@
|
||||
/*!
|
||||
* \file main.c
|
||||
*
|
||||
* \brief Target main implementation
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "xc6xxx_rf_2_4g.h"
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Global Variables
|
||||
-------------------------------------------------------------------------------------*/
|
||||
#if !USE_XIP
|
||||
uint8_t spi_idx = SPI0_IDX;
|
||||
#else
|
||||
uint8_t spi_idx = SPI1_IDX;
|
||||
#endif
|
||||
uint8_t rx_flash_buff[BUFF_LEN] = {0};
|
||||
uint8_t rx_timerout_flag = false;
|
||||
uint32_t recv_count = 0;
|
||||
uint32_t recv_err_cnt = 0;
|
||||
uint8_t send_spi_buff[BUFF_LEN] = {0};
|
||||
|
||||
bool rf_send_timer_flag = false;
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Func Prototype
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief Clock Initialization
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void clock_init(void)
|
||||
{
|
||||
CLOCK_InitCfg_t clock_cfg;
|
||||
|
||||
clock_cfg.hfclk_src = CLOCK_HFCLK_SRC_XTAL;
|
||||
clock_cfg.hfclk_in = CLOCK_HFCLK_IN_32M;
|
||||
#if (RC_32K)
|
||||
clock_cb.lfclk_src = CLOCK_LFCLK_SRC_RC;
|
||||
#endif //(RC_32K)
|
||||
|
||||
#if (XTAL_32K)
|
||||
clock_cb.lfclk_src = CLOCK_LFCLK_SRC_XTAL;
|
||||
#endif // (XTAL_32K)
|
||||
|
||||
#if (XTAL_32768K)
|
||||
clock_cb.lfclk_src = CLOCK_LFCLK_SRC_XTAL;
|
||||
#endif // (XTAL_32768K)
|
||||
|
||||
if (clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_XTAL) {
|
||||
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32768;
|
||||
} else if (clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_RC) {
|
||||
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32K;
|
||||
}
|
||||
|
||||
xc_clock_init_cfg(&clock_cfg);
|
||||
|
||||
SysTick_Config(xc_clock_hfclk_in_get() / 100);
|
||||
SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Timer0_Callback
|
||||
* @param void * - context
|
||||
*
|
||||
* @retval void
|
||||
*/
|
||||
void timer0_callback(void *context)
|
||||
{
|
||||
#if !(XINCX_RF_MODE)
|
||||
rf_send_timer_flag = true;
|
||||
#else
|
||||
rx_timerout_flag = true;
|
||||
#endif //!(XINCX_RF_MODE)
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief timer init
|
||||
* @param TIMER_TypeDef * - timer_id
|
||||
* @param uint32_t - timer_cnt
|
||||
* @retval void
|
||||
*/
|
||||
void timer_init(uint8_t timer_id, uint32_t timer_cnt)
|
||||
{
|
||||
Timer_InitCfg_t timer_cfg;
|
||||
|
||||
timer_cfg.timer_src_clk = TIMER_CLK_SRC_32M_DIV;
|
||||
timer_cfg.timer_div_clk = TIMER_DIV_CLK_16MHzOr16K;
|
||||
timer_cfg.timer_mode = TIMER_MODE_CYCLE;
|
||||
|
||||
xc_timer_init(timer_id, &timer_cfg);
|
||||
#if !(XINCX_RF_MODE)
|
||||
uint32_t Us = timer_cnt * 1000;
|
||||
xc_timer_set_value(timer_id, Us);
|
||||
xc_timer_start(timer_id);
|
||||
#endif //!(XINCX_RF_MODE)
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Rf 2.4g dump log
|
||||
* @param void
|
||||
*
|
||||
* @retval void
|
||||
*/
|
||||
#ifdef DEBUG_LOG
|
||||
void rf_dump_log(void)
|
||||
{
|
||||
LOGI("***************** 2.4G Param ******************\n");
|
||||
LOGI("CFG_TOP: 0x%08x\r\n", XC_RF_2_4G->CFG_TOP);
|
||||
LOGI("EN_AA: 0x%08x\r\n", XC_RF_2_4G->EN_AA);
|
||||
LOGI("EN_RXADDR: 0x%08x\r\n", XC_RF_2_4G->EN_RXADDR);
|
||||
LOGI("SETUP_AW: 0x%08x\r\n", XC_RF_2_4G->SETUP_AW);
|
||||
LOGI("SETUP_RETR: 0x%08x\r\n", XC_RF_2_4G->SETUP_RETR);
|
||||
LOGI("RF_CH: 0x%08x\r\n", XC_RF_2_4G->RF_CH);
|
||||
LOGI("SETUP_RF: 0x%08x\r\n", XC_RF_2_4G->SETUP_RF);
|
||||
LOGI("STATUS: 0x%08x\r\n", XC_RF_2_4G->STATUS);
|
||||
LOGI("OBSERVE_TX: 0x%08x\r\n", XC_RF_2_4G->OBSERVE_TX);
|
||||
LOGI("RSSI: 0x%08x\r\n", XC_RF_2_4G->RSSI);
|
||||
LOGI("RX_ADDR_P0: 0x%02x %08x\r\n", 0xFF & (XC_RF_2_4G->RX_ADDR_P0_H), XC_RF_2_4G->RX_ADDR_P0_L);
|
||||
LOGI("RX_ADDR_P1: 0x%02x %08x\r\n", 0xFF & (XC_RF_2_4G->RX_ADDR_P1_H), XC_RF_2_4G->RX_ADDR_P1_L);
|
||||
LOGI("RX_ADDR_P2TOP5:0x%08x\r\n", XC_RF_2_4G->RX_ADDR_P2TOP5);
|
||||
LOGI("BER_RESULT: 0x%08x%08x\r\n", XC_RF_2_4G->BER_ERR_CNT, XC_RF_2_4G->BER_RECV_CNT);
|
||||
LOGI("AGC_SETTING: 0x%08x\r\n", XC_RF_2_4G->AGC_SETTING);
|
||||
LOGI("PGA_SETTING: 0x%02x %08x\r\n", ((XC_RF_2_4G->TX_ADDR_H) & 0xFF00) >> 8, XC_RF_2_4G->PGA_SETTING);
|
||||
LOGI("TX_ADDR: 0x%02x %08x\r\n", ((XC_RF_2_4G->TX_ADDR_H) & 0xFF), XC_RF_2_4G->TX_ADDR_L);
|
||||
LOGI("RX_PW_PX: 0x%04x %08x\r\n", 0xFFFF & (XC_RF_2_4G->RX_PW_Px_H), XC_RF_2_4G->RX_PW_Px_L);
|
||||
LOGI("STATUS_FIFO: 0x%08x\r\n", XC_RF_2_4G->STATUS_FIFO);
|
||||
LOGI("RSSIREC: 0x%08x\r\n", XC_RF_2_4G->RSSIREC);
|
||||
LOGI("TXPROC_CFG: 0x%08x\r\n", XC_RF_2_4G->TXPROC_CFG);
|
||||
LOGI("RXPROC_CFG: 0x%02x %08x\r\n", 0xFF & (XC_RF_2_4G->RXPROC_CFG_H), XC_RF_2_4G->RXPROC_CFG_L);
|
||||
LOGI("DYNPD: 0x%08x\r\n", XC_RF_2_4G->DYNPD);
|
||||
LOGI("FEATURE: 0x%08x\r\n", XC_RF_2_4G->FEATURE);
|
||||
LOGI("PGA_SETTING_H: 0x%08x\r\n", XC_RF_2_4G->TX_ADDR_H);
|
||||
LOGI("TX_POWER 0x%08x\r\n", (XC_BT_RF->ana21_reg_l >> 6) & 0x3f);
|
||||
LOGI("ana11_reg_l: 0x%08x\r\n", XC_BT_RF->ana11_reg_l);
|
||||
LOGI("***********************************************\n");
|
||||
LOGI("\r\n");
|
||||
}
|
||||
#endif
|
||||
/**
|
||||
* @brief RF 2.4g data config
|
||||
* @param uint8_t * - buff
|
||||
* uint8 - len
|
||||
* @retval uint8_t - 0
|
||||
*/
|
||||
uint8_t rf_data_config(uint8_t *buff, uint8_t len)
|
||||
{
|
||||
if (len == 0) {
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
for (uint8_t i = 0; i < len; i++) {
|
||||
buff[i] = i;
|
||||
}
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Spi init
|
||||
* @param void
|
||||
* @retval void
|
||||
*/
|
||||
void rf_spi_init(void)
|
||||
{
|
||||
|
||||
#if (!USE_XIP)
|
||||
SPI_InitCfg_t spi_cfg = {0};
|
||||
|
||||
if (spi_idx == SPI1_IDX) {
|
||||
GPIO_InitCfg_t gpio_cfg = {0};
|
||||
|
||||
gpio_cfg.Mux = GPIO_Mux0;
|
||||
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
|
||||
gpio_cfg.FunSel = SSI1_CLK;
|
||||
gpio_cfg.Int = NOT_INT;
|
||||
gpio_cfg.Pull = GPIO_PULLDOWN;
|
||||
gpio_cfg.Pin = GPIO_14;
|
||||
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
gpio_cfg.FunSel = SSI1_SSN;
|
||||
gpio_cfg.Pin = GPIO_15;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
gpio_cfg.FunSel = SSI1_TX;
|
||||
gpio_cfg.Pin = GPIO_16;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
gpio_cfg.FunSel = SSI1_RX;
|
||||
gpio_cfg.Pin = GPIO_17;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
} else if (spi_idx == SPI2_IDX) {
|
||||
GPIO_InitCfg_t gpio_cfg = {0};
|
||||
|
||||
gpio_cfg.Mux = GPIO_Mux2;
|
||||
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
|
||||
gpio_cfg.FunSel = GPIO_Dx;
|
||||
gpio_cfg.Int = NOT_INT;
|
||||
gpio_cfg.Pull = GPIO_PULLDOWN;
|
||||
gpio_cfg.Pin = GPIO_14; // clk
|
||||
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
gpio_cfg.FunSel = GPIO_Dx;
|
||||
gpio_cfg.Pin = GPIO_15; // ssn
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
gpio_cfg.FunSel = GPIO_Dx;
|
||||
gpio_cfg.Pin = GPIO_16;
|
||||
xc_gpio_init(&gpio_cfg); // mosi
|
||||
|
||||
gpio_cfg.FunSel = GPIO_Dx;
|
||||
gpio_cfg.Pin = GPIO_17;
|
||||
xc_gpio_init(&gpio_cfg); // miso
|
||||
}
|
||||
|
||||
spi_cfg.Mode = SPI_MODE_MASTER;
|
||||
spi_cfg.DataSize = SSI_CTRL0_DFS_LEN_8BIT;
|
||||
spi_cfg.Direction = SSI_CTRL0_TMOD_WR;
|
||||
spi_cfg.BaudRatePrescaler = SSI_BAUD_DIV_2;
|
||||
spi_cfg.CLKPolarity = SSI_CTRL0_SCPOL_LOW;
|
||||
spi_cfg.CLKPhase = SSI_CTRL0_SCPHA_LEAD;
|
||||
spi_cfg.FirstBit = SPI_FirstBit_MSB;
|
||||
|
||||
xc_spi_init(spi_idx, &spi_cfg);
|
||||
|
||||
xc_spi_flash_wake_up(spi_idx);
|
||||
uint32_t mid = 0;
|
||||
xc_spi_flash_rdid(spi_idx, (uint8_t *)&mid);
|
||||
PRINT("Flash RDID: 0x%08x\n", mid);
|
||||
|
||||
uint8_t ruid[16];
|
||||
xc_spi_flash_read_128bit_uid(spi_idx, ruid);
|
||||
#else
|
||||
xc_fmc_spi_init_oprt();
|
||||
|
||||
xc_fmc_spi_flash_wake_up();
|
||||
uint32_t mid = 0;
|
||||
xc_fmc_spi_flash_rdid((uint8_t *)&mid);
|
||||
PRINT("Flash RDID: 0x%08x\n", mid);
|
||||
|
||||
uint8_t ruid[16];
|
||||
xc_fmc_spi_flash_ruid(ruid);
|
||||
#endif //(!USE_XIP)
|
||||
PRINT("Flash RUID: ");
|
||||
for (int i = 0; i < 16; i++) {
|
||||
LOGI("%02x ", ruid[i]);
|
||||
}
|
||||
LOGI("\n");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RF 2.4g tx manage
|
||||
* @param rf_data_typedef_t * - rf_data
|
||||
* @retval uint8_t - cnt
|
||||
*/
|
||||
uint32_t rf_tx_manage(rf_data_typedef_t *rf_data)
|
||||
{
|
||||
#ifdef XC_SEND_NUM // Limited number of transmissions
|
||||
if (rf_data->cnt == XC_SEND_NUM) {
|
||||
rf_data->cnt += 1;
|
||||
LOGI("SEND END\r\n");
|
||||
|
||||
/* Turn off the send timer */
|
||||
xc_timer_stop(RF_TX_TIMERx);
|
||||
}
|
||||
if ((rf_data->cnt < XC_SEND_NUM) && (rf_send_timer_flag)) {
|
||||
#else // Timed transmission
|
||||
if (rf_send_timer_flag) {
|
||||
#endif // XC_SEND_NUM
|
||||
rf_send_timer_flag = false;
|
||||
GLOBAL_INT_DISABLE();
|
||||
#if (!USE_XIP)
|
||||
xc_spi_flash_read(spi_idx, RF_SPI_BASR_ADDR, rf_data->buff, sizeof(rf_data->buff));
|
||||
#else
|
||||
xc_fmc_spi_flash_read(RF_SPI_BASR_ADDR, rf_data->buff, sizeof(rf_data->buff));
|
||||
#endif //(!USE_XIP)
|
||||
|
||||
GLOBAL_INT_RESTORE();
|
||||
rf_data_config(rf_data->buff, sizeof(rf_data->buff));
|
||||
/* Filling in software frame number */
|
||||
rf_data->cnt += 1;
|
||||
rf_data->buff[0] = rf_data->cnt;
|
||||
LOGI("send_cnt:%d\r\n", rf_data->cnt);
|
||||
|
||||
/* Data transmission */
|
||||
for (uint8_t i = 0; i < sizeof(rf_data->buff); i++)
|
||||
LOGI("%02x ", rf_data->buff[i]);
|
||||
LOGI("\r\n");
|
||||
rf_tx_event(rf_data->buff, BUFF_LEN);
|
||||
memcpy(send_spi_buff, rf_data->buff, sizeof(rf_data->buff));
|
||||
|
||||
/* Operating Flash*/
|
||||
GLOBAL_INT_DISABLE();
|
||||
#if (!USE_XIP)
|
||||
xc_spi_flash_erase_sector(spi_idx, RF_SPI_BASR_ADDR);
|
||||
xc_spi_flash_write(spi_idx, RF_SPI_BASR_ADDR, send_spi_buff, sizeof(send_spi_buff));
|
||||
xc_spi_flash_read(spi_idx, RF_SPI_BASR_ADDR, rf_data->buff, sizeof(rf_data->buff));
|
||||
#else
|
||||
xc_fmc_spi_flash_erase_sector(RF_SPI_BASR_ADDR);
|
||||
xc_fmc_spi_flash_write(RF_SPI_BASR_ADDR, send_spi_buff, sizeof(send_spi_buff));
|
||||
xc_fmc_spi_flash_read(RF_SPI_BASR_ADDR, rf_data->buff, sizeof(rf_data->buff));
|
||||
#endif //(!USE_XIP)
|
||||
GLOBAL_INT_RESTORE();
|
||||
}
|
||||
return rf_data->cnt;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RF 2.4g rx manage
|
||||
* @param rf_data_typedef_t * - rf_data
|
||||
* @retval uint32_t - 0
|
||||
*/
|
||||
#if !(XINCX_RF_NVIC_MODE)
|
||||
uint32_t rf_rx_manage(rf_data_typedef_t *rf_data)
|
||||
{
|
||||
static uint32_t conut = 0;
|
||||
|
||||
/* Receive event processing */
|
||||
uint8_t len = rf_rx_event(rf_data->buff);
|
||||
|
||||
/* Receiving end polling data processing */
|
||||
if (len != 0) {
|
||||
/* Receive Count */
|
||||
CE_CTL_LOW;
|
||||
|
||||
/* Receive Count */
|
||||
conut += 1;
|
||||
|
||||
/* Receiving data processing */
|
||||
if (rf_data->buff[RF_CONFIRMED_VALUE] == RF_CONFIRMED_VALUE) {
|
||||
PRINT("%d\r\n", conut);
|
||||
GLOBAL_INT_DISABLE();
|
||||
#if (!USE_XIP)
|
||||
xc_spi_flash_erase_sector(spi_idx, RF_SPI_BASR_ADDR);
|
||||
xc_spi_flash_write(spi_idx, RF_SPI_BASR_ADDR, rf_data->buff, sizeof(rf_data->buff));
|
||||
xc_spi_flash_read(spi_idx, RF_SPI_BASR_ADDR, rx_flash_buff, sizeof(rx_flash_buff));
|
||||
#else
|
||||
xc_fmc_spi_flash_erase_sector(RF_SPI_BASR_ADDR);
|
||||
xc_fmc_spi_flash_write(RF_SPI_BASR_ADDR, rf_data->buff, sizeof(recv_buf));
|
||||
xc_fmc_spi_flash_read(RF_SPI_BASR_ADDR, rx_flash_buff, sizeof(rx_flash_buff));
|
||||
#endif //(USE_XIP)
|
||||
GLOBAL_INT_RESTORE();
|
||||
|
||||
recv_count += 1;
|
||||
} else {
|
||||
recv_err_cnt += 1;
|
||||
}
|
||||
|
||||
LOGI("read flash:");
|
||||
for (uint8_t i = 0; i < len; i++) {
|
||||
LOGI("%02x ", rx_flash_buff[i]);
|
||||
}
|
||||
LOGI("\r\n");
|
||||
xc_timer_set_value(RF_RX_TIMERx, 1000 * 1000);
|
||||
xc_timer_start(RF_RX_TIMERx);
|
||||
|
||||
/* Receive read data buffer reset */
|
||||
memset(rf_data->buff, 0, len);
|
||||
memset(rx_flash_buff, 0, sizeof(rx_flash_buff));
|
||||
len = 0;
|
||||
|
||||
/* Entering the receiver */
|
||||
CE_CTL_HIGH;
|
||||
}
|
||||
|
||||
if (rx_timerout_flag) {
|
||||
rx_timerout_flag = false;
|
||||
LOGI("recv_count:%d,recv_err_cnt:%d\r\n", recv_count, recv_err_cnt);
|
||||
xc_timer_stop(RF_RX_TIMERx);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
uint32_t rf_rx_manage(rf_data_typedef_t *rf_data)
|
||||
{
|
||||
static uint32_t conut = 0;
|
||||
|
||||
uint8_t len = recv_len;
|
||||
if (rf24g_handler_flag) {
|
||||
rf24g_handler_flag = false;
|
||||
|
||||
/* Entering standby mode */
|
||||
CE_CTL_LOW;
|
||||
if ((len != 0) && (recv_buf[RF_CONFIRMED_VALUE] == RF_CONFIRMED_VALUE)) {
|
||||
recv_count += 1;
|
||||
LOGI("%d\r\n", recv_buf[0]);
|
||||
GLOBAL_INT_DISABLE();
|
||||
#if (!USE_XIP)
|
||||
xc_spi_flash_erase_sector(spi_idx, RF_SPI_BASR_ADDR);
|
||||
xc_spi_flash_write(spi_idx, RF_SPI_BASR_ADDR, recv_buf, sizeof(recv_buf));
|
||||
xc_spi_flash_read(spi_idx, RF_SPI_BASR_ADDR, rx_flash_buff, sizeof(rx_flash_buff));
|
||||
#else
|
||||
xc_fmc_spi_flash_erase_sector(RF_SPI_BASR_ADDR);
|
||||
xc_fmc_spi_flash_write(RF_SPI_BASR_ADDR, recv_buf, sizeof(recv_buf));
|
||||
xc_fmc_spi_flash_read(RF_SPI_BASR_ADDR, rx_flash_buff, sizeof(rx_flash_buff));
|
||||
#endif
|
||||
GLOBAL_INT_RESTORE();
|
||||
|
||||
} else {
|
||||
recv_err_cnt += 1;
|
||||
}
|
||||
LOGI("read flash:");
|
||||
for (uint8_t i = 0; i < len; i++) {
|
||||
LOGI("%02x ", rx_flash_buff[i]);
|
||||
}
|
||||
LOGI("\r\n");
|
||||
xc_timer_set_value(RF_RX_TIMERx, 1000 * 1000);
|
||||
xc_timer_start(RF_RX_TIMERx);
|
||||
|
||||
/* Receive Count */
|
||||
conut += 1;
|
||||
|
||||
/* Receive read data buffer reset */
|
||||
memset(recv_buf, 0, len);
|
||||
memset(rx_flash_buff, 0, sizeof(rx_flash_buff));
|
||||
|
||||
/* Entering the receiver */
|
||||
CE_CTL_HIGH;
|
||||
}
|
||||
|
||||
if (rx_timerout_flag) {
|
||||
rx_timerout_flag = false;
|
||||
LOGI("recv_count:%d,recv_err_cnt:%d\r\n", recv_count, recv_err_cnt);
|
||||
xc_timer_stop(RF_RX_TIMERx);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
#endif //!(XINCX_RF_NVIC_MODE)
|
||||
|
||||
void app_uart_init(void)
|
||||
{
|
||||
GPIO_InitCfg_t gpio_cfg = {0};
|
||||
|
||||
gpio_cfg.Mux = GPIO_Mux0;
|
||||
gpio_cfg.Pull = GPIO_PULLUP;
|
||||
gpio_cfg.Int = NOT_INT;
|
||||
gpio_cfg.FunSel = UART0_TX;
|
||||
|
||||
gpio_cfg.Pin = GPIO_18;
|
||||
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
gpio_cfg.FunSel = UART0_RX;
|
||||
gpio_cfg.Pin = GPIO_19;
|
||||
gpio_cfg.Dir = GPIO_DIR_INPUT;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
UART_InitCfg_t uart_cfg = {0};
|
||||
|
||||
uart_cfg.Parity = UART_PARITY_DISABLE;
|
||||
uart_cfg.StopBits = UART_STOP_1_BITS;
|
||||
uart_cfg.WordLength = UART_DATA_8_BITS;
|
||||
uart_cfg.BaudRate = UART_BAUDRATE_115200;
|
||||
uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE;
|
||||
|
||||
xc_uart_init(UART0_IDX, &uart_cfg);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief main
|
||||
* @details
|
||||
* @param[in] void
|
||||
* @param[out] void
|
||||
* @retval int - 0
|
||||
* @retval void
|
||||
* @par identifier
|
||||
* reserve
|
||||
* @par other
|
||||
* void
|
||||
* @par change log
|
||||
* Alex created on 2023-05-31
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
rf_data_typedef_t rf_data;
|
||||
rf_data_config(rf_data.buff, sizeof(rf_data.buff));
|
||||
rf_data.cnt = 0;
|
||||
rf_data.temp = SEND_TIMERMS_CNT;
|
||||
|
||||
/* Clock initialization */
|
||||
clock_init();
|
||||
|
||||
/* Serial port initialization */
|
||||
app_uart_init();
|
||||
|
||||
/* SPI initialization */
|
||||
rf_spi_init();
|
||||
|
||||
/* rf 2.4g initialization configuration */
|
||||
rf24g_init();
|
||||
|
||||
/* Set testing frequency points */
|
||||
rf_set_channel(XINCX_2_4G_CHANNEL);
|
||||
|
||||
#if (XINCX_RF_TRANS_RATE == RATE_2M)
|
||||
/* Set 2M mode register configuration */
|
||||
/* Don't move this function interface */
|
||||
rf_2M_config();
|
||||
#endif //(XINCX_RF_TRANS_RATE == RATE_2M)
|
||||
|
||||
#ifdef DEBUG_LOG
|
||||
/* Register information printing */
|
||||
rf_dump_log();
|
||||
#endif
|
||||
|
||||
#if XINCX_RF_MODE
|
||||
/* Receive timeout setting */
|
||||
timer_init(RF_RX_TIMERx, RECV_TIMERMS_OUT);
|
||||
|
||||
/* Enter receiver mode */
|
||||
CE_CTL_HIGH;
|
||||
#else
|
||||
/* Launch data packaging filling */
|
||||
rf_data_config(rf_data.buff, sizeof(rf_data.buff));
|
||||
#if (!USE_XIP)
|
||||
xc_spi_flash_erase_sector(spi_idx, RF_SPI_BASR_ADDR);
|
||||
xc_spi_flash_write(spi_idx, RF_SPI_BASR_ADDR, rf_data.buff, sizeof(rf_data.buff));
|
||||
#else
|
||||
xc_fmc_spi_flash_erase_sector(RF_SPI_BASR_ADDR);
|
||||
xc_fmc_spi_flash_write(RF_SPI_BASR_ADDR, rf_data.buff, sizeof(rf_data.buff));
|
||||
#endif //(!USE_XIP)
|
||||
/* Set emission interval */
|
||||
timer_init(RF_TX_TIMERx, SEND_TIMERMS_CNT);
|
||||
#endif // XINCX_RF_MODE
|
||||
|
||||
for (;;) {
|
||||
|
||||
#if XINCX_RF_MODE
|
||||
/* receive */
|
||||
rf_rx_manage(&rf_data);
|
||||
#else
|
||||
/* sending */
|
||||
rf_data.cnt = rf_tx_manage(&rf_data);
|
||||
#endif // XINCX_RF_MODE
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,12 @@
|
||||
|
||||
FUNC void Initialization(void)
|
||||
{
|
||||
SP = _RDWORD(0x10000000);
|
||||
PC = _RDWORD(0x10000004);
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
LOAD %L INCREMENTAL
|
||||
Initialization();
|
||||
@@ -0,0 +1,84 @@
|
||||
|
||||
|
||||
|
||||
FUNC void InitGpio(void)
|
||||
{
|
||||
// Config IOMUX
|
||||
/*
|
||||
gpio_mux_ctl_u(33,1);//d2
|
||||
gpio_mux_ctl_u(34,1);//d3
|
||||
gpio_mux_ctl_u(35,2);//clk
|
||||
gpio_mux_ctl_u(36,2);//cs
|
||||
gpio_mux_ctl_u(37,2);//d0 rx
|
||||
gpio_mux_ctl_u(38,2);//d1 tx
|
||||
*/
|
||||
_WDWORD(0x4000019c, 0x00002A94);
|
||||
}
|
||||
FUNC void InitFlash(void)
|
||||
{
|
||||
|
||||
}
|
||||
FUNC void InitXIP(void)
|
||||
{
|
||||
|
||||
_WDWORD(0x40000104,0x040000);//reset ssi0
|
||||
_WDWORD(0x40000104,0x040004);//reset ssi0
|
||||
_WDWORD(0x40000050,0x110000);//close spi0 mclk
|
||||
_WDWORD(0x40000070,0x1000000);//close spi0 pclk
|
||||
|
||||
|
||||
//config fmc
|
||||
_WDWORD(0x40000270, 0x0503);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x40000270, 0x3503);
|
||||
//config cache
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x52000000, 0x0);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x52000000, 0x21);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
|
||||
|
||||
//config xip spi
|
||||
_WDWORD(0x51000008, 0); //disable spi
|
||||
|
||||
_WDWORD(0x5100002c,0); //close IE
|
||||
_WDWORD(0x51000000,0x1F); //32bit SPI data
|
||||
_WDWORD(0x51000010,0x01); //enable select slave -- SE
|
||||
_WDWORD(0x51000018,0x0); //TXFTL be set 0
|
||||
_WDWORD(0x5100001c,0x0); //RXFTL be set 0
|
||||
|
||||
_WDWORD(0x5100010c, 0x01);//enable select slave
|
||||
_WDWORD(0x51000114, 0xFF);//XIP time out
|
||||
|
||||
_WDWORD(0x51000014, 0x2);//div 2
|
||||
|
||||
//quad
|
||||
_WDWORD(0x51000108, (2)|(6<<4)|(2<<9)|(1<<22)|(1<<29)|(1<<23)|(0<<24)|(8<<13));
|
||||
_WDWORD(0x51000100, 0x6b);//quad read cmd
|
||||
_WDWORD(0x51000104, 0x6b);//quad read cmd
|
||||
|
||||
|
||||
// //dual
|
||||
// _WDWORD(0x51000108, (1)|(6<<4)|(2<<9)|(1<<22)|(1<<29)|(1<<23)|(0)|(8<<13));
|
||||
// _WDWORD(0x51000100, 0x3b);//dual read cmd
|
||||
// _WDWORD(0x51000104, 0x3b);//dual read cmd
|
||||
|
||||
|
||||
_WDWORD(0x51000008, 1); //enable spi
|
||||
}
|
||||
|
||||
FUNC void Initialization(void)
|
||||
{
|
||||
InitGpio();
|
||||
InitFlash();
|
||||
InitXIP();
|
||||
SP = _RDWORD(0x11001000);
|
||||
PC = _RDWORD(0x11001004);
|
||||
_WDWORD(0x4000013C, 0x11001001);
|
||||
}
|
||||
LOAD %L INCREMENTAL
|
||||
Initialization();
|
||||
@@ -0,0 +1,18 @@
|
||||
|
||||
LOAD 0x10000000
|
||||
{
|
||||
EXE 0x10000000
|
||||
{
|
||||
startup_xinc.o (RESET, +FIRST)
|
||||
* (+RO)
|
||||
|
||||
}
|
||||
|
||||
RW +0000
|
||||
{
|
||||
* (+RW,+ZI)
|
||||
}
|
||||
|
||||
ScatterAssert(ImageLength(RW) < 1024 * 28)
|
||||
}
|
||||
|
||||
@@ -0,0 +1,17 @@
|
||||
|
||||
|
||||
LOAD 0x11001000
|
||||
{
|
||||
EXE 0x11001000
|
||||
{
|
||||
startup_xinc.o (RESET, +FIRST)
|
||||
* (+RO)
|
||||
|
||||
}
|
||||
|
||||
RW 0x10002000
|
||||
{
|
||||
* (+RW,+ZI)
|
||||
*(ram_code)
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1 @@
|
||||
Xincboot_tool.exe 0_ram.bin 1_ram_download.bin 0 0 0 0 1
|
||||
Binary file not shown.
@@ -0,0 +1 @@
|
||||
.\Tools\xinchip_xip_tool.exe .\Output\0_ram.bin .\Output\xip_dual .\Output\rf24_ack_flash_xip.bin
|
||||
Binary file not shown.
@@ -0,0 +1,59 @@
|
||||
#!/usr/bin/env python
|
||||
#-*- coding:UTF-8 -*-
|
||||
import socket
|
||||
from select import select
|
||||
import time
|
||||
import os
|
||||
import sys
|
||||
import threading
|
||||
import json
|
||||
import struct
|
||||
import binascii
|
||||
import time
|
||||
import re
|
||||
import fileinput
|
||||
|
||||
|
||||
|
||||
def dump_addr(addr):
|
||||
file_asm = "./Xinc_ble_sdk_asm"
|
||||
cur_func = ""
|
||||
with open(file_asm, 'r') as fd:
|
||||
for line in fd:
|
||||
if re.match(r" \w+", line) != None:
|
||||
cur_func = line.strip()
|
||||
#
|
||||
if re.search("^ 0x", line) != None and re.search(addr, line) != None:
|
||||
print(addr, cur_func)
|
||||
break
|
||||
fd.close()
|
||||
|
||||
if __name__ == "__main__":
|
||||
file_in = "./dump.txt"
|
||||
|
||||
for line in fileinput.input(file_in):
|
||||
# 处理 PC 指针信息
|
||||
if re.search("PC = ", line) != None:
|
||||
pc_addr = line.split("PC = ")[1].split(",")[0]
|
||||
#print(hex(int(pc_addr, 16)))
|
||||
dump_addr(hex(int(pc_addr, 16)))
|
||||
|
||||
# 处理 栈信息
|
||||
if re.search("^[0-9]",line) != None:
|
||||
#print(line)
|
||||
stack = line.split('=')[1].replace('\n', '').split(' ')
|
||||
for addr in stack:
|
||||
if addr == ' ' or re.search("^1", addr) == None:
|
||||
continue
|
||||
#print(addr, hex(int(addr,16)-1))
|
||||
dump_addr(hex(int(addr,16)-1))
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
Binary file not shown.
@@ -0,0 +1,564 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rf24_ack_flash</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>0</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>7</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>0</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\UL2CM3.DLL</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Target>
|
||||
<TargetName>rf24_ack_flash_xip_demo</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>7</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>0</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\UL2CM3.DLL</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Startup</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\CMSIS\core_cm0.h</PathWithFileName>
|
||||
<FilenameWithoutPath>core_cm0.h</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>2</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\Startup\xc60xx\startup_xinc.s</PathWithFileName>
|
||||
<FilenameWithoutPath>startup_xinc.s</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>3</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\Startup\system_xinc.c</PathWithFileName>
|
||||
<FilenameWithoutPath>system_xinc.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>4</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\Startup\system_it_xinc.c</PathWithFileName>
|
||||
<FilenameWithoutPath>system_it_xinc.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>Application</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>5</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\src\main.c</PathWithFileName>
|
||||
<FilenameWithoutPath>main.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>RF_Config</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>6</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\rf_config\rf_config.h</PathWithFileName>
|
||||
<FilenameWithoutPath>rf_config.h</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>RF_Drivers</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>7</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\rf24\Drivers\xc6xxx_rf_2_4g\xc6xxx_rf_2_4g.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc6xxx_rf_2_4g.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>Drivers</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>8</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_clock.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_clock.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>9</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_gpio.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_gpio.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>10</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_pwr.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_pwr.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>11</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_spi.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_spi.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>12</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_uart.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_uart.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>13</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_timer.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_timer.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>14</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_systick.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_systick.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>15</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\ringbuffer.c</PathWithFileName>
|
||||
<FilenameWithoutPath>ringbuffer.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>16</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_dma.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_dma.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>17</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_fmc_spi.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_fmc_spi.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,234 @@
|
||||
|
||||
;/*****************************************************************************
|
||||
; * @file: startup_xinc.s
|
||||
; * @purpose: CMSIS Cortex-M0 Core Device Startup File for the
|
||||
; * Device xinc.
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000600
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
; ToDo: Add here the vectors for the device specific external interrupts handler
|
||||
DCD 0 ; 0 BLE Handler
|
||||
DCD DMAS_Handler ; 1
|
||||
DCD CPR_Handler ; 2
|
||||
DCD GPIO_Handler ; 3
|
||||
DCD RTC_Handler ; 4
|
||||
DCD TIMER0_Handler ; 5
|
||||
DCD TIMER1_Handler
|
||||
DCD TIMER2_Handler
|
||||
DCD TIMER3_Handler
|
||||
DCD WDT_Handler
|
||||
DCD I2C_Handler
|
||||
DCD UART0_Handler
|
||||
DCD UART1_Handler
|
||||
DCD SPI0_Handler
|
||||
DCD SPI1_Handler
|
||||
DCD 0
|
||||
DCD 0
|
||||
DCD GADC_Handler ; 17
|
||||
DCD 0 ; 18
|
||||
DCD 0 ; 19
|
||||
DCD 0 ; 20
|
||||
DCD 0 ; 21
|
||||
DCD RF24G_Handler ; 22
|
||||
DCD PWM_Handler ; 23
|
||||
DCD BOR_Handler ; 24
|
||||
DCD 0 ; 25
|
||||
DCD 0 ; 26
|
||||
DCD AOTIMER0_Handler ; 27
|
||||
DCD AOTIMER1_Handler ; 28
|
||||
DCD CMP_Handler ; 29
|
||||
DCD FMC_Handler ; 30
|
||||
DCD CAN_Handler ; 31
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR r0, =0x4000013C ; remap
|
||||
LDR r1, =0x10000001
|
||||
STR r1, [r0]
|
||||
|
||||
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
;EXPORT BLE_Handler [WEAK]
|
||||
EXPORT DMAS_Handler [WEAK]
|
||||
EXPORT CPR_Handler [WEAK]
|
||||
EXPORT GPIO_Handler [WEAK]
|
||||
EXPORT RTC_Handler [WEAK]
|
||||
EXPORT TIMER0_Handler [WEAK]
|
||||
EXPORT TIMER1_Handler [WEAK]
|
||||
EXPORT TIMER2_Handler [WEAK]
|
||||
EXPORT TIMER3_Handler [WEAK]
|
||||
EXPORT WDT_Handler [WEAK]
|
||||
EXPORT I2C_Handler [WEAK]
|
||||
EXPORT UART0_Handler [WEAK]
|
||||
EXPORT UART1_Handler [WEAK]
|
||||
EXPORT SPI0_Handler [WEAK]
|
||||
EXPORT SPI1_Handler [WEAK]
|
||||
;EXPORT KBS_Handler [WEAK]
|
||||
;EXPORT QDEC_Handler [WEAK]
|
||||
EXPORT GADC_Handler [WEAK]
|
||||
EXPORT AOTIMER0_Handler [WEAK]
|
||||
EXPORT AOTIMER1_Handler [WEAK]
|
||||
EXPORT CMP_Handler [WEAK]
|
||||
EXPORT FMC_Handler [WEAK]
|
||||
EXPORT CAN_Handler [WEAK]
|
||||
;EXPORT SIM_Handler [WEAK]
|
||||
;EXPORT AES_Handler [WEAK]
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
EXPORT RF24G_Handler [WEAK]
|
||||
EXPORT PWM_Handler [WEAK]
|
||||
EXPORT BOR_Handler [WEAK]
|
||||
|
||||
PendSV_Handler
|
||||
SysTick_Handler
|
||||
;BLE_Handler
|
||||
DMAS_Handler
|
||||
CPR_Handler
|
||||
GPIO_Handler
|
||||
RTC_Handler
|
||||
TIMER0_Handler
|
||||
TIMER1_Handler
|
||||
TIMER2_Handler
|
||||
TIMER3_Handler
|
||||
WDT_Handler
|
||||
I2C_Handler
|
||||
UART0_Handler
|
||||
UART1_Handler
|
||||
SPI0_Handler
|
||||
SPI1_Handler
|
||||
;KBS_Handler
|
||||
;QDEC_Handler
|
||||
GADC_Handler
|
||||
;SIM_Handler
|
||||
;AES_Handler
|
||||
AOTIMER0_Handler
|
||||
AOTIMER1_Handler
|
||||
CMP_Handler
|
||||
FMC_Handler
|
||||
CAN_Handler
|
||||
RF24G_Handler
|
||||
PWM_Handler
|
||||
BOR_Handler
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
ALIGN
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, = (Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
END
|
||||
|
||||
@@ -0,0 +1,232 @@
|
||||
/*!
|
||||
* \file system_it_xinc.c
|
||||
*
|
||||
* \brief Target system interruption implementation
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "system_it_xinc.h"
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Func Prototype
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles NMI exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END NonMaskableInt_IRQn */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Hard Fault exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END HardFault_IRQn */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Memory Manage exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Bus Fault exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Usage Fault exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles SVCall exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVCall_IRQn */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END SVCall_IRQn */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Debug Monitor exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles PendSVC exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END PendSV_IRQn */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/****************************** Hard Fault Handler Functions *******************************/
|
||||
/*------------------------------------------------------------------------------------
|
||||
Private Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
void HardFault_Handler_c(unsigned int * HardFault_args)
|
||||
{
|
||||
/*栈帧里面内容：*/
|
||||
unsigned int stack_r0; //压栈的 R0
|
||||
unsigned int stack_r1; //压栈的 R1
|
||||
unsigned int stack_r2; //压栈的 R2
|
||||
unsigned int stack_r3; //压栈的 R3
|
||||
unsigned int stack_r12; //压栈的 R12
|
||||
unsigned int stack_lr; //压栈的 lr
|
||||
unsigned int stack_pc; //压栈的 pc
|
||||
unsigned int stack_psr; //压栈的 psr
|
||||
|
||||
stack_r0 = ((unsigned int)HardFault_args[0]);
|
||||
stack_r1 = ((unsigned int)HardFault_args[1]);
|
||||
stack_r2 = ((unsigned int)HardFault_args[2]);
|
||||
stack_r3 = ((unsigned int)HardFault_args[3]);
|
||||
stack_r12 = ((unsigned int)HardFault_args[4]);
|
||||
stack_lr = ((unsigned int)HardFault_args[5]);
|
||||
stack_pc = ((unsigned int)HardFault_args[6]);
|
||||
stack_psr = ((unsigned int)HardFault_args[7]);
|
||||
|
||||
DEBUG("----%s----\n", __func__);
|
||||
DEBUG("R0=%x\n",stack_r0);
|
||||
DEBUG("R1=%x\n",stack_r1);
|
||||
DEBUG("R2=%x\n",stack_r2);
|
||||
DEBUG("R3=%x\n",stack_r3);
|
||||
DEBUG("R12=%x\n",stack_r12);
|
||||
DEBUG("LR[R14]=%x\n",stack_lr);
|
||||
DEBUG("PC[R15]=%x\n",stack_pc);
|
||||
DEBUG("PSR=%x\n",stack_psr);
|
||||
DEBUG("SCB_SHCSR=%x\n",SCB->SHCSR);
|
||||
DEBUG("---------------------------\n");
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*******************************************************************************************/
|
||||
|
||||
@@ -0,0 +1,58 @@
|
||||
/*!
|
||||
* \file system_it_xinc.h
|
||||
*
|
||||
* \brief The header of system_it_xinc.c
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __SYSTEM_IT_XINC_H__
|
||||
#define __SYSTEM_IT_XINC_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "xc6xxx.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Exported Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
void NMI_Handler( void );
|
||||
void HardFault_Handler( void );
|
||||
void MemManage_Handler( void );
|
||||
void BusFault_Handler( void );
|
||||
void UsageFault_Handler( void );
|
||||
void SVC_Handler( void );
|
||||
void DebugMon_Handler( void );
|
||||
void PendSV_Handler( void );
|
||||
|
||||
void HardFault_Handler_c(unsigned int * HardFault_args);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __SYSTEM_IT_XINC_H__ */
|
||||
|
||||
@@ -0,0 +1,117 @@
|
||||
/**
|
||||
* Initialize the system
|
||||
*
|
||||
* @param none
|
||||
* @return none
|
||||
*
|
||||
* @brief Setup the microcontroller system
|
||||
*
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include <stdio.h>
|
||||
|
||||
#include "xc6xxx.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
#define __DEBUG_OUT_PORT 0
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
#define VECTOR_NUM 48
|
||||
|
||||
void set_vector(void)
|
||||
{
|
||||
#if (USE_XIP == 1)
|
||||
__disable_irq();
|
||||
for (uint32_t i = 0, *Pvector = (uint32_t *)(0x11001000 + 0),
|
||||
*_vector_table = (uint32_t *)(0x10000000);
|
||||
i < VECTOR_NUM; i++) // copy vertor table
|
||||
{
|
||||
_vector_table[i] = *Pvector++;
|
||||
}
|
||||
|
||||
*((volatile unsigned int *)(0x4000013C)) =
|
||||
0x10000001; // inter vertor table remap
|
||||
__enable_irq();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
static void WDT_ResetInit(void)
|
||||
{
|
||||
cpr_ctlapbclken_grctl__wdt_pclk_en__setf(ENABLE);
|
||||
|
||||
cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_ENABLE);
|
||||
cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_DISABLE);
|
||||
|
||||
cpr_rstctl_wdtrst_mask_set(
|
||||
(WDT_SYS_RSTN_MASK_DISABLE | WDT_M0_RSTN_MASK_ENABLE));
|
||||
|
||||
cpr_lp_ctl__wdt_tclk_en__setf(ENABLE);
|
||||
wdt_cr__wdt_en__setf(DISABLE);
|
||||
}
|
||||
|
||||
void SystemInit(void)
|
||||
{
|
||||
|
||||
WDT_ResetInit();
|
||||
|
||||
#if (USE_XIP == 1)
|
||||
|
||||
set_vector();
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
__RAM_CODE int sendchar(int c)
|
||||
{
|
||||
unsigned int status;
|
||||
#if (__DEBUG_OUT_PORT == 1)
|
||||
for (;;) {
|
||||
status = (*((volatile unsigned *)(0x40011000 + 0x14)));
|
||||
status &= 0x20;
|
||||
if (status == 0x20)
|
||||
break;
|
||||
}
|
||||
(*((volatile unsigned *)(0x40011000 + 0x00))) = c;
|
||||
return (1);
|
||||
#else
|
||||
for (;;) {
|
||||
status = (*((volatile unsigned *)(0x40010000 + 0x14)));
|
||||
status &= 0x20;
|
||||
if (status == 0x20)
|
||||
break;
|
||||
}
|
||||
(*((volatile unsigned *)(0x40010000 + 0x00))) = c;
|
||||
return (1);
|
||||
#endif
|
||||
}
|
||||
|
||||
struct __FILE
|
||||
{
|
||||
int handle; /* Add whatever you need here */
|
||||
};
|
||||
|
||||
FILE __stdout;
|
||||
__RAM_CODE int fputc(int ch, FILE *f) { return (sendchar(ch)); }
|
||||
|
||||
int ferror(FILE *f)
|
||||
{
|
||||
/* Your implementation of ferror */
|
||||
return EOF;
|
||||
}
|
||||
|
||||
void _ttywrch(int ch) { sendchar(ch); }
|
||||
|
||||
void _sys_exit(int return_code)
|
||||
{
|
||||
label:
|
||||
goto label; /* endless loop */
|
||||
}
|
||||
@@ -0,0 +1,256 @@
|
||||
|
||||
;/*****************************************************************************
|
||||
; * @file: startup_xinc.s
|
||||
; * @purpose: CMSIS Cortex-M0 Core Device Startup File for the
|
||||
; * Device xinc.
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00001000
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
; ToDo: Add here the vectors for the device specific external interrupts handler
|
||||
DCD BLE_Handler ; 0
|
||||
DCD DMA_Handler ; 1
|
||||
DCD CPR_Handler ; 2
|
||||
DCD GPIO_Handler ; 3
|
||||
DCD RTC_Handler ; 4
|
||||
DCD TIMER0_Handler ; 5
|
||||
DCD TIMER1_Handler ; 6
|
||||
DCD TIMER2_Handler ; 7
|
||||
DCD TIMER3_Handler ; 8
|
||||
DCD WDT_Handler ; 9
|
||||
DCD I2C_Handler ; 10
|
||||
DCD UART0_Handler ; 11
|
||||
DCD UART1_Handler ; 12
|
||||
DCD SPI0_Handler ; 13
|
||||
DCD SPI1_Handler ; 14
|
||||
DCD 0 ; 15
|
||||
DCD 0 ; 16
|
||||
DCD GADC_Handler ; 17
|
||||
DCD PWM_Handler ; 18
|
||||
DCD AES_Handler ; 19
|
||||
DCD USB_Handler ; 20
|
||||
DCD AUDIO_Handler ; 21
|
||||
DCD RF24G_Handler ; 22
|
||||
DCD SPI2_Handler ; 23
|
||||
DCD 0 ; 24
|
||||
DCD UART2_Handler ; 25
|
||||
DCD I2S_Handler ; 26
|
||||
DCD AOTIMER0_Handler ; 27
|
||||
DCD AOTIMER1_Handler ; 28
|
||||
DCD CMP_Handler ; 29
|
||||
DCD FMC_Handler ; 30
|
||||
DCD CAN_Handler ; 31
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR r0, =0x4000013C ; remap
|
||||
LDR r1, =0x10000001
|
||||
STR r1, [r0]
|
||||
|
||||
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
IMPORT HardFault_Handler_c ;函数声明
|
||||
movs r0, #4 ;判断主栈指针还是进程栈指针
|
||||
mov r1, lr
|
||||
tst r0, r1
|
||||
beq hf_used_msp ;如果是主栈指针
|
||||
mrs r0, psp ;否则是进程栈指针,把进程栈指针地址付给 R0
|
||||
ldr r1, =HardFault_Handler_c ;跳转到 HardFault 中断程序
|
||||
bx r1
|
||||
hf_used_msp
|
||||
mrs r0, msp ;把主栈指针地址赋给 R0
|
||||
ldr r1, =HardFault_Handler_c
|
||||
bx r1
|
||||
;EXPORT HardFault_Handler [WEAK]
|
||||
;B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
EXPORT BLE_Handler [WEAK]
|
||||
EXPORT DMA_Handler [WEAK]
|
||||
EXPORT CPR_Handler [WEAK]
|
||||
EXPORT GPIO_Handler [WEAK]
|
||||
EXPORT RTC_Handler [WEAK]
|
||||
EXPORT TIMER0_Handler [WEAK]
|
||||
EXPORT TIMER1_Handler [WEAK]
|
||||
EXPORT TIMER2_Handler [WEAK]
|
||||
EXPORT TIMER3_Handler [WEAK]
|
||||
EXPORT WDT_Handler [WEAK]
|
||||
EXPORT I2C_Handler [WEAK]
|
||||
EXPORT UART0_Handler [WEAK]
|
||||
EXPORT UART1_Handler [WEAK]
|
||||
EXPORT SPI0_Handler [WEAK]
|
||||
EXPORT SPI1_Handler [WEAK]
|
||||
;EXPORT KBS_Handler [WEAK]
|
||||
;EXPORT QDEC_Handler [WEAK]
|
||||
EXPORT GADC_Handler [WEAK]
|
||||
EXPORT PWM_Handler [WEAK]
|
||||
EXPORT AES_Handler [WEAK]
|
||||
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
|
||||
EXPORT USB_Handler [WEAK];20
|
||||
EXPORT AUDIO_Handler [WEAK];21
|
||||
EXPORT RF24G_Handler [WEAK];22
|
||||
EXPORT SPI2_Handler [WEAK];23
|
||||
;EXPORT MPU_Handler [WEAK];24
|
||||
EXPORT UART2_Handler [WEAK];25
|
||||
EXPORT I2S_Handler [WEAK];26
|
||||
EXPORT AOTIMER0_Handler [WEAK];27
|
||||
EXPORT AOTIMER1_Handler [WEAK];28
|
||||
EXPORT CMP_Handler [WEAK];29
|
||||
EXPORT FMC_Handler [WEAK];30
|
||||
EXPORT CAN_Handler [WEAK];31
|
||||
|
||||
PendSV_Handler
|
||||
SysTick_Handler
|
||||
BLE_Handler
|
||||
RF24G_Handler
|
||||
DMA_Handler
|
||||
CPR_Handler
|
||||
GPIO_Handler
|
||||
RTC_Handler
|
||||
TIMER0_Handler
|
||||
TIMER1_Handler
|
||||
TIMER2_Handler
|
||||
TIMER3_Handler
|
||||
WDT_Handler
|
||||
I2C_Handler
|
||||
I2S_Handler
|
||||
UART0_Handler
|
||||
UART1_Handler
|
||||
UART2_Handler
|
||||
SPI0_Handler
|
||||
SPI1_Handler
|
||||
SPI2_Handler
|
||||
;KBS_Handler
|
||||
;QDEC_Handler
|
||||
GADC_Handler
|
||||
PWM_Handler
|
||||
AUDIO_Handler
|
||||
;SIM_Handler
|
||||
AES_Handler
|
||||
AOTIMER0_Handler
|
||||
AOTIMER1_Handler
|
||||
CMP_Handler
|
||||
FMC_Handler
|
||||
CAN_Handler
|
||||
USB_Handler
|
||||
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
ALIGN
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, = (Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
END
|
||||
@@ -0,0 +1,84 @@
|
||||
/*!
|
||||
* \file main.h
|
||||
*
|
||||
* \brief The head file of main.c
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MAIN_H__
|
||||
#define __MAIN_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "xc6xxx.h"
|
||||
#include "xc6xxx_rf_2_4g.h"
|
||||
#include "rf_config.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
#define DEBUG_LOG
|
||||
|
||||
#define RECV_TIMERMS_OUT 1000
|
||||
#define SEND_TIMERMS_CNT 20
|
||||
|
||||
#define XC_SEND_NUM 100U
|
||||
|
||||
#define RF_TX_TIMERx TIMER0_IDX
|
||||
#define RF_RX_TIMERx TIMER0_IDX
|
||||
|
||||
|
||||
#define RF_CONFIRMED_VALUE 2
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
TypeDef
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Global Variables
|
||||
-------------------------------------------------------------------------------------*/
|
||||
extern uint8_t recv_len;
|
||||
extern uint8_t recv_buf[BUFF_LEN];
|
||||
extern bool rf_send_timer_flag;
|
||||
extern bool rf24g_handler_flag;
|
||||
extern uint8_t recv_ack_buff[BUFF_LEN];
|
||||
extern uint8_t ack_buff[BUFF_LEN];
|
||||
extern uint32_t ack_payload_cnt;
|
||||
extern uint32_t ack_payload_error;
|
||||
/*------------------------------------------------------------------------------------
|
||||
Exported Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
uint32_t rf_tx_manage(rf_data_typedef_t *rf_data);
|
||||
uint32_t rf_rx_manage(rf_data_typedef_t *rf_data);
|
||||
void rf_buff_info(uint8_t *buff, uint8_t len);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H__ */
|
||||
|
||||
@@ -0,0 +1,286 @@
|
||||
|
||||
#ifndef SDK_CONFIG_H
|
||||
#define SDK_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>\n
|
||||
|
||||
// <h> Xinc_RF
|
||||
|
||||
// <o> XINCX_RF_MODE - RF Tx or Rx Mode
|
||||
// <0=> TX Mode
|
||||
// <1=> RX Mode
|
||||
#ifndef XINCX_RF_MODE
|
||||
#define XINCX_RF_MODE 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_ADDR_L - rf Address Set
|
||||
#ifndef XINCX_2_4G_ADDR_L
|
||||
#define XINCX_2_4G_ADDR_L 0xE7E7E7E6
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_ADDR_H - rf Address Set
|
||||
#ifndef XINCX_2_4G_ADDR_H
|
||||
#define XINCX_2_4G_ADDR_H 0xEA
|
||||
#endif
|
||||
// <h> XINCX_2_4G_AUTO_ACK - 2.4g Auto Acknowledgement
|
||||
//==========================================================
|
||||
// <o> XINCX_2_4G_PIPE0_ENAA - 2.4g Pipe0 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE0_ENAA
|
||||
#define XINCX_2_4G_PIPE0_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE1_ENAA - 2.4g Pipe1 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE1_ENAA
|
||||
#define XINCX_2_4G_PIPE1_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE2_ENAA - 2.4g Pipe2 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE2_ENAA
|
||||
#define XINCX_2_4G_PIPE2_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE3_ENAA - 2.4g Pipe3 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE3_ENAA
|
||||
#define XINCX_2_4G_PIPE3_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE4_ENAA - 2.4g Pipe4 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE4_ENAA
|
||||
#define XINCX_2_4G_PIPE4_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE5_ENAA - 2.4g Pipe5 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE5_ENAA
|
||||
#define XINCX_2_4G_PIPE5_ENAA 1
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <o> XINCX_RF_POWER - rf Power Set
|
||||
#ifndef XINCX_POWER
|
||||
#define XINCX_POWER 0x00008
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_CHANNEL - 2.4g Channel Set
|
||||
#ifndef XINCX_2_4G_CHANNEL
|
||||
#define XINCX_2_4G_CHANNEL 2410
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_NVIC_MODE - RF NVIC Mode
|
||||
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_RF_NVIC_MODE
|
||||
#define XINCX_RF_NVIC_MODE 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_TX_ADDR_WIDTH - RF Tx Addr Width
|
||||
|
||||
// <3=> 3 Bytes
|
||||
// <4=> 4 Bytes
|
||||
// <5=> 5 Bytes
|
||||
#ifndef XINCX_RF_TX_ADDR_WIDTH
|
||||
#define XINCX_RF_TX_ADDR_WIDTH 5
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_TRANS_RATE - RF Transmission Rate Config
|
||||
|
||||
// <0x02=> 1M
|
||||
// <0x0A=> 2M
|
||||
// <0x22=> 250k
|
||||
// <0x2A=> 125k
|
||||
#ifndef XINCX_RF_TRANS_RATE
|
||||
#define XINCX_RF_TRANS_RATE 0x02
|
||||
#endif
|
||||
|
||||
// <e> XINCX_RF_CRC_ENABLE - RF CRC Enable
|
||||
//==========================================================
|
||||
#ifndef XINCX_RF_CRC_ENABLE
|
||||
#define XINCX_RF_CRC_ENABLE 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_CRC_BYTE - 2.4g CRC Bytes Set
|
||||
|
||||
// <1=> 1 Byte
|
||||
// <2=> 2 Bytes
|
||||
#ifndef XINCX_2_4G_CRC_BYTE
|
||||
#define XINCX_2_4G_CRC_BYTE 2
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// <h> XINCX_2_4G_FEATURE_PARAM - 2.4g Feature Parameters
|
||||
//==========================================================
|
||||
|
||||
// <q> XINCX_2_4G_GUARD_CFG - 2.4g Long Payload Feature
|
||||
#ifndef XINCX_2_4G_GUARD_CFG
|
||||
#define XINCX_2_4G_GUARD_CFG 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_LONG_PLD_TYPE - 2.4g Long Pld Type
|
||||
#ifndef XINCX_2_4G_LONG_PLD_TYPE
|
||||
#define XINCX_2_4G_LONG_PLD_TYPE 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_PREAMBLE_NUM - 2.4g Preamble
|
||||
// <o> XINCX_2_4G_PREAMBLE_NUM
|
||||
// <0=> 1 Byte
|
||||
// <1=> 2 Bytes
|
||||
// <2=> 3 Bytes
|
||||
// <3=> 4 Bytes
|
||||
#ifndef XINCX_2_4G_PREAMBLE_NUM
|
||||
#define XINCX_2_4G_PREAMBLE_NUM 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_PREAMBLE_TYPE - 2.4g Preamble Type
|
||||
#ifndef XINCX_2_4G_PREAMBLE_TYPE
|
||||
#define XINCX_2_4G_PREAMBLE_TYPE 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_CRC_SCOPE_GUARD - 2.4g CRC Scope Guard
|
||||
#ifndef XINCX_2_4G_CRC_SCOPE_GUARD
|
||||
#define XINCX_2_4G_CRC_SCOPE_GUARD 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_CRC_SCOPE_HEADER - 2.4g CRC Scope Header
|
||||
#ifndef XINCX_2_4G_CRC_SCOPE_HEADER
|
||||
#define XINCX_2_4G_CRC_SCOPE_HEADER 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_CRC_SCOPE_ADDR - 2.4g CRC Scope Addr
|
||||
#ifndef XINCX_2_4G_CRC_SCOPE_ADDR
|
||||
#define XINCX_2_4G_CRC_SCOPE_ADDR 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_LONG_PLD - 2.4g Long Payload Feature
|
||||
#ifndef XINCX_2_4G_LONG_PLD
|
||||
#define XINCX_2_4G_LONG_PLD 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_FEC - 2.4g FEC&Interleave Feature
|
||||
#ifndef XINCX_2_4G_FEC
|
||||
#define XINCX_2_4G_FEC 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_WHITEN - 2.4g Whiten Feature
|
||||
#ifndef XINCX_2_4G_WHITEN
|
||||
#define XINCX_2_4G_WHITEN 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_DPL - 2.4g Dynamic Payload Length Feature
|
||||
#ifndef XINCX_2_4G_DPL
|
||||
#define XINCX_2_4G_DPL 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_ACK_PAY - 2.4g Payload on ACK
|
||||
#ifndef XINCX_2_4G_ACK_PAY
|
||||
#define XINCX_2_4G_ACK_PAY 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_DYN_ACK - 2.4g W_TX_PAYLOAD_NOACK Command
|
||||
#ifndef XINCX_2_4G_DYN_ACK
|
||||
#define XINCX_2_4G_DYN_ACK 1
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_PREAMBLE - 2.4g preamble
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_PREAMBLE - 2.4g preamble
|
||||
#ifndef XINCX_2_4G_PREAMBLE
|
||||
#define XINCX_2_4G_PREAMBLE 0x710f5555
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_GUARD - 2.4g guard
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_GUARD - 2.4g guard
|
||||
#ifndef XINCX_2_4G_GUARD
|
||||
#define XINCX_2_4G_GUARD 0x8fc9
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_DYNPD - 2.4g dynpd
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_DYNPD - 2.4g dynpd
|
||||
#ifndef XINCX_2_4G_DYNPD
|
||||
#define XINCX_2_4G_DYNPD 0x3f
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
|
||||
// <h> XINCX_2_4G_CRY_CPT_ARRAY - 2.4g Crystal capacitor array
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_CRY_CPT_ARRAY - 2.4g Crystal capacitor array
|
||||
#ifndef XINCX_2_4G_CRY_CPT_ARRAY
|
||||
#define XINCX_2_4G_CRY_CPT_ARRAY 0x36
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_TRANS_PARAM - 2.4g Transmission Parameters
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_RETRANS_CNT - 2.4g Retransmit Count
|
||||
#ifndef XINCX_2_4G_RETRANS_CNT
|
||||
#define XINCX_2_4G_RETRANS_CNT 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_RETRANS_DELAY - 2.4g Retransmission Delay
|
||||
#ifndef XINCX_2_4G_RETRANS_DELAY
|
||||
#define XINCX_2_4G_RETRANS_DELAY 1
|
||||
#endif
|
||||
|
||||
// <h> XINCX_2_4G_PIPE_RX_PAYLEN - 2.4g Pipe Rx Payload Len
|
||||
//==========================================================
|
||||
// <o> - 2.4g Pipe0 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE0_LEN
|
||||
#define XINCX_2_4G_PIPE0_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE1_LEN - 2.4g Pipe1 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE1_LEN
|
||||
#define XINCX_2_4G_PIPE1_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE2_LEN - 2.4g Pipe2 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE2_LEN
|
||||
#define XINCX_2_4G_PIPE2_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE3_LEN - 2.4g Pipe3 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE3_LEN
|
||||
#define XINCX_2_4G_PIPE3_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE4_LEN - 2.4g Pipe4 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE4_LEN
|
||||
#define XINCX_2_4G_PIPE4_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE5_LEN - 2.4g Pipe5 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE5_LEN
|
||||
#define XINCX_2_4G_PIPE5_LEN 32
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// </h>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,506 @@
|
||||
/*!
|
||||
* \file main.c
|
||||
*
|
||||
* \brief Target main implementation
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "xc6xxx_rf_2_4g.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Global Variables
|
||||
-------------------------------------------------------------------------------------*/
|
||||
bool rf_send_timer_flag = false;
|
||||
|
||||
uint8_t recv_ack_buff[BUFF_LEN] = {0};
|
||||
uint8_t ack_buff[BUFF_LEN] = {0};
|
||||
uint32_t ack_payload_cnt = 0;
|
||||
uint32_t ack_payload_error = 0;
|
||||
/*------------------------------------------------------------------------------------
|
||||
Func Prototype
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void timer_init(uint8_t timer_id, uint32_t timer_cnt)
|
||||
{
|
||||
LOGI("timer_init\r\n");
|
||||
|
||||
uint32_t timerx_us = timer_cnt * 1000;
|
||||
Timer_InitCfg_t timer_cfg;
|
||||
|
||||
timer_cfg.timer_src_clk = TIMER_CLK_SRC_32M_DIV;
|
||||
timer_cfg.timer_div_clk = TIMER_DIV_CLK_1MHzOr1K;
|
||||
timer_cfg.timer_mode = TIMER_MODE_CYCLE;
|
||||
|
||||
xc_timer_init(timer_id, &timer_cfg);
|
||||
xc_timer_set_value(timer_id, timerx_us);
|
||||
xc_timer_start(timer_id);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Timer0_Callback
|
||||
* @param void * - context
|
||||
*
|
||||
* @retval void
|
||||
*/
|
||||
void timer0_callback(void *context)
|
||||
{
|
||||
#if !(XINCX_RF_MODE)
|
||||
rf_send_timer_flag = true;
|
||||
#endif // !(XINCX_RF_MODE)
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief Clock Initialization
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void clock_init(void)
|
||||
{
|
||||
CLOCK_InitCfg_t clock_cfg;
|
||||
|
||||
clock_cfg.hfclk_src = CLOCK_HFCLK_SRC_XTAL;
|
||||
clock_cfg.hfclk_in = CLOCK_HFCLK_IN_32M;
|
||||
#if (RC_32K)
|
||||
clock_cb.lfclk_src = CLOCK_LFCLK_SRC_RC;
|
||||
#endif //(RC_32K)
|
||||
|
||||
#if (XTAL_32K)
|
||||
clock_cb.lfclk_src = CLOCK_LFCLK_SRC_XTAL;
|
||||
#endif // (XTAL_32K)
|
||||
|
||||
#if (XTAL_32768K)
|
||||
clock_cb.lfclk_src = CLOCK_LFCLK_SRC_XTAL;
|
||||
#endif // (XTAL_32768K)
|
||||
|
||||
if (clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_XTAL) {
|
||||
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32768;
|
||||
} else if (clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_RC) {
|
||||
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32K;
|
||||
}
|
||||
|
||||
xc_clock_init_cfg(&clock_cfg);
|
||||
|
||||
SysTick_Config(xc_clock_hfclk_in_get() / 100);
|
||||
SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Rf 2.4g dump log
|
||||
* @param void
|
||||
*
|
||||
* @retval void
|
||||
*/
|
||||
#ifdef DEBUG_LOG
|
||||
void rf_dump_log(void)
|
||||
{
|
||||
LOGI("***************** 2.4G Param ******************\n");
|
||||
LOGI("CFG_TOP: 0x%08x\r\n", XC_RF_2_4G->CFG_TOP);
|
||||
LOGI("EN_AA: 0x%08x\r\n", XC_RF_2_4G->EN_AA);
|
||||
LOGI("EN_RXADDR: 0x%08x\r\n", XC_RF_2_4G->EN_RXADDR);
|
||||
LOGI("SETUP_AW: 0x%08x\r\n", XC_RF_2_4G->SETUP_AW);
|
||||
LOGI("SETUP_RETR: 0x%08x\r\n", XC_RF_2_4G->SETUP_RETR);
|
||||
LOGI("RF_CH: 0x%08x\r\n", XC_RF_2_4G->RF_CH);
|
||||
LOGI("SETUP_RF: 0x%08x\r\n", XC_RF_2_4G->SETUP_RF);
|
||||
LOGI("STATUS: 0x%08x\r\n", XC_RF_2_4G->STATUS);
|
||||
LOGI("OBSERVE_TX: 0x%08x\r\n", XC_RF_2_4G->OBSERVE_TX);
|
||||
LOGI("RSSI: 0x%08x\r\n", XC_RF_2_4G->RSSI);
|
||||
LOGI("RX_ADDR_P0: 0x%02x%08x\r\n", 0xFF & (XC_RF_2_4G->RX_ADDR_P0_H), XC_RF_2_4G->RX_ADDR_P0_L);
|
||||
LOGI("RX_ADDR_P1: 0x%02x %08x\r\n", 0xFF & (XC_RF_2_4G->RX_ADDR_P1_H), XC_RF_2_4G->RX_ADDR_P1_L);
|
||||
LOGI("RX_ADDR_P2TOP5:0x%08x\r\n", XC_RF_2_4G->RX_ADDR_P2TOP5);
|
||||
LOGI("BER_RESULT: 0x%08x%08x\r\n", XC_RF_2_4G->BER_ERR_CNT, XC_RF_2_4G->BER_RECV_CNT);
|
||||
LOGI("AGC_SETTING: 0x%08x\r\n", XC_RF_2_4G->AGC_SETTING);
|
||||
LOGI("PGA_SETTING: 0x%02x%08x\r\n", ((XC_RF_2_4G->TX_ADDR_H) & 0xFF00) >> 8, XC_RF_2_4G->PGA_SETTING);
|
||||
LOGI("TX_ADDR: 0x%02x%08x\r\n", ((XC_RF_2_4G->TX_ADDR_H) & 0xFF), XC_RF_2_4G->TX_ADDR_L);
|
||||
LOGI("RX_PW_PX: 0x%04x %08x\r\n", 0xFFFF & (XC_RF_2_4G->RX_PW_Px_H), XC_RF_2_4G->RX_PW_Px_L);
|
||||
LOGI("STATUS_FIFO: 0x%08x\r\n", XC_RF_2_4G->STATUS_FIFO);
|
||||
LOGI("RSSIREC: 0x%08x\r\n", XC_RF_2_4G->RSSIREC);
|
||||
LOGI("TXPROC_CFG: 0x%08x\r\n", XC_RF_2_4G->TXPROC_CFG);
|
||||
LOGI("RXPROC_CFG: 0x%02x%08x\r\n", 0xFF & (XC_RF_2_4G->RXPROC_CFG_H), XC_RF_2_4G->RXPROC_CFG_L);
|
||||
LOGI("DYNPD: 0x%08x\r\n", XC_RF_2_4G->DYNPD);
|
||||
LOGI("FEATURE: 0x%08x\r\n", XC_RF_2_4G->FEATURE);
|
||||
LOGI("PGA_SETTING_H: 0x%08x\r\n", XC_RF_2_4G->TX_ADDR_H);
|
||||
LOGI("TX_POWER 0x%08x\r\n", (XC_BT_RF->ana21_reg_l >> 6) & 0x3f);
|
||||
LOGI("ana11_reg_l: 0x%08x\r\n", XC_BT_RF->ana11_reg_l);
|
||||
LOGI("***********************************************\n");
|
||||
LOGI("\r\n");
|
||||
}
|
||||
#endif
|
||||
/**
|
||||
* @brief RF 2.4g data config
|
||||
* @param uint8_t * - buff
|
||||
* uint8 - len
|
||||
* @retval uint8_t - 0
|
||||
*/
|
||||
uint8_t rf_data_config(uint8_t *buff, uint8_t len)
|
||||
{
|
||||
if (len == 0) {
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
for (uint8_t i = 0; i < len; i++) {
|
||||
buff[i] = i;
|
||||
}
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RF ack payload config
|
||||
* @param void
|
||||
* @retval void
|
||||
*/
|
||||
void rf_ack_payload_config(void)
|
||||
{
|
||||
#if (XINCX_RF_TRANS_RATE == RATE_250K)
|
||||
XC_RF_2_4G->SETUP_RETR = 0xf0;
|
||||
#endif //(XINCX_RF_TRANS_RATE == RATE_250K)
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RF ack tx fifo
|
||||
* @param uint8_t * - ack_buff
|
||||
* @param uint8_t - buff_len
|
||||
* @retval void
|
||||
*/
|
||||
void rf_ackpayload_tx_fifo(uint8_t *rx_send_ack_buff, uint8_t buff_len)
|
||||
{
|
||||
for (uint8_t i = 0; i < RF_SEND_CMD_CNT; i++)
|
||||
XC_RF_2_4G->CMD_CFG = CMD_DONE | W_ACK_PLOAD;
|
||||
|
||||
for (uint8_t i = 0; i < buff_len; i++) {
|
||||
XC_RF_2_4G->TX_FIFO_DATA = rx_send_ack_buff[i];
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RF ack recv event
|
||||
* @param uint8_t * - ack_buff
|
||||
* @param uint8_t - buff_len
|
||||
* @retval void
|
||||
*/
|
||||
uint8_t rf_recv_ackpayload_event(uint8_t *tx_recv_ack_buff)
|
||||
{
|
||||
XC_RF_2_4G->CMD_CFG = CMD_DONE | R_RX_PL_WID;
|
||||
|
||||
uint8_t ack_len = XC_RF_2_4G->RX_FIFO_LEN & 0xff;
|
||||
if (ack_len) {
|
||||
for (uint8_t i = 0; i < RF_RECV_CMD_CNT; i++) {
|
||||
nop_cnt(16);
|
||||
XC_RF_2_4G->CMD_CFG = CMD_DONE | R_RX_PLOAD;
|
||||
nop_cnt(16);
|
||||
}
|
||||
|
||||
for (uint8_t i = 0; i < ack_len; i++) {
|
||||
tx_recv_ack_buff[i] = XC_RF_2_4G->RX_FIFO_DATA;
|
||||
}
|
||||
}
|
||||
|
||||
XC_RF_2_4G->CMD_CFG = FLUSH_RX | CMD_DONE;
|
||||
XC_RF_2_4G->STATUS = MASK_RX_DR;
|
||||
|
||||
return ack_len;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RF 2.4g tx manage
|
||||
* @param rf_data_typedef_t * - rf_data
|
||||
* @retval uint8_t - cnt
|
||||
*/
|
||||
uint32_t rf_tx_manage(rf_data_typedef_t *rf_data)
|
||||
{
|
||||
uint8_t ack_status = TX_DATA_INVALID;
|
||||
uint8_t ack_len = 0;
|
||||
static uint32_t ack_cnt = 0;
|
||||
#ifdef XC_SEND_NUM // Limited number of transmissions
|
||||
if (rf_data->cnt == XC_SEND_NUM) {
|
||||
rf_data->cnt += 1;
|
||||
LOGI("SEND END\r\n");
|
||||
|
||||
/* Turn off the send timer */
|
||||
xc_timer_stop(RF_TX_TIMERx);
|
||||
}
|
||||
if ((rf_data->cnt < XC_SEND_NUM) && (rf_send_timer_flag)) {
|
||||
#else // Timed transmission
|
||||
if (rf_send_timer_flag) {
|
||||
#endif // XC_SEND_NUM
|
||||
|
||||
rf_send_timer_flag = false;
|
||||
rf_data->cnt += 1;
|
||||
|
||||
/* Filling in software frame number */
|
||||
rf_data->buff[0] = rf_data->cnt;
|
||||
LOGI("send_cnt:%d\r\n", rf_data->cnt);
|
||||
/* data transmission */
|
||||
ack_status = rf_tx_event(rf_data->buff, rf_data->data_length);
|
||||
|
||||
/* Response data processing */
|
||||
if (ack_status == TX_DATA_OK) {
|
||||
ack_status = TX_DATA_INVALID;
|
||||
ack_len = rf_recv_ackpayload_event(ack_buff);
|
||||
// LOGI("ack_len:%d\r\n", ack_len);
|
||||
XC_RF_2_4G->STATUS = MASK_ALL_INTER;
|
||||
}
|
||||
|
||||
if (ack_len != 0) {
|
||||
ack_cnt += 1;
|
||||
LOGI("ack :%d\r\n", ack_cnt);
|
||||
for (uint8_t i = 0; i < ack_len; i++) {
|
||||
// LOGI("%0d ", ack_buff[i]);
|
||||
}
|
||||
LOGI("\r\n");
|
||||
|
||||
ack_len = 0;
|
||||
/* Clear response data*/
|
||||
memset(ack_buff, 0, sizeof(ack_buff));
|
||||
}
|
||||
}
|
||||
return rf_data->cnt;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RF 2.4g rx manage
|
||||
* @param rf_data_typedef_t * - rf_data
|
||||
* @retval uint32_t - 0
|
||||
*/
|
||||
|
||||
#if !(XINCX_RF_NVIC_MODE)
|
||||
uint32_t rf_rx_manage(rf_data_typedef_t *rf_data)
|
||||
{
|
||||
static uint32_t conut = 0;
|
||||
static uint32_t recv_cnt = 0;
|
||||
static uint32_t recv_err = 0;
|
||||
|
||||
/* Receive event processing */
|
||||
uint8_t len = rf_rx_event(rf_data->buff);
|
||||
|
||||
/* Receiving end polling data processing */
|
||||
if (len != 0) {
|
||||
/* Entering standby mode */
|
||||
CE_CTL_LOW;
|
||||
|
||||
/* ack payoad */
|
||||
rf_ackpayload_tx_fifo(rf_data->buff, 32);
|
||||
|
||||
/* Receive Count */
|
||||
conut += 1;
|
||||
LOGI("recv:%d\r\n", conut);
|
||||
/* Receiving data processing */
|
||||
if (rf_data->buff[RF_CONFIRMED_VALUE] == RF_CONFIRMED_VALUE) {
|
||||
LOGI("%d\r\n", recv_cnt);
|
||||
recv_cnt += 1;
|
||||
} else {
|
||||
recv_err += 1;
|
||||
}
|
||||
rf_buff_info(rf_data->buff, len);
|
||||
|
||||
/* Receive read data buffer reset */
|
||||
memset(rf_data->buff, 0, len);
|
||||
len = 0;
|
||||
|
||||
/* Entering the receiver */
|
||||
CE_CTL_HIGH;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
uint32_t rf_rx_manage(rf_data_typedef_t *rf_data)
|
||||
{
|
||||
static uint32_t conut = 0;
|
||||
static uint32_t recv_cnt = 0;
|
||||
static uint32_t recv_err = 0;
|
||||
|
||||
uint8_t len = recv_len;
|
||||
|
||||
if (rf24g_handler_flag) {
|
||||
/* Entering standby mode */
|
||||
CE_CTL_LOW;
|
||||
|
||||
rf24g_handler_flag = false;
|
||||
|
||||
/* Ack payoad */
|
||||
memcpy(recv_ack_buff, recv_buf, len);
|
||||
rf_ackpayload_tx_fifo(recv_ack_buff, len);
|
||||
|
||||
if ((len != 0) && (recv_buf[RF_CONFIRMED_VALUE] == RF_CONFIRMED_VALUE)) {
|
||||
recv_cnt += 1;
|
||||
} else {
|
||||
recv_err += 1;
|
||||
}
|
||||
|
||||
// rf_buff_info(recv_buf, len);
|
||||
/* Receive Count */
|
||||
conut += 1;
|
||||
|
||||
xc_timer_set_value(RF_RX_TIMERx, 3000000);
|
||||
xc_timer_start(RF_RX_TIMERx);
|
||||
LOGI("recv:%d\r\n", conut);
|
||||
|
||||
/* Receive read data buffer reset */
|
||||
memset(recv_buf, 0, len);
|
||||
len = 0;
|
||||
recv_len = 0;
|
||||
|
||||
/* Entering the receiver */
|
||||
CE_CTL_HIGH;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
#endif //!(XINCX_RF_NVIC_MODE)
|
||||
|
||||
/**
|
||||
* @brief RF 2.4g buff info
|
||||
* @param uint8_t * - buff
|
||||
* uint8_t len
|
||||
* @retval void
|
||||
*/
|
||||
void rf_buff_info(uint8_t *buff, uint8_t len)
|
||||
{
|
||||
for (uint8_t i = 0; i < len; i++)
|
||||
LOGI("%d ", buff[i]);
|
||||
LOGI("\r\n");
|
||||
}
|
||||
|
||||
void app_uart_init(void)
|
||||
{
|
||||
GPIO_InitCfg_t gpio_cfg = {0};
|
||||
|
||||
gpio_cfg.Mux = GPIO_Mux0;
|
||||
gpio_cfg.Pull = GPIO_PULLUP;
|
||||
gpio_cfg.Int = NOT_INT;
|
||||
gpio_cfg.FunSel = UART0_TX;
|
||||
|
||||
gpio_cfg.Pin = GPIO_18;
|
||||
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
gpio_cfg.FunSel = UART0_RX;
|
||||
gpio_cfg.Pin = GPIO_19;
|
||||
gpio_cfg.Dir = GPIO_DIR_INPUT;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
UART_InitCfg_t uart_cfg = {0};
|
||||
|
||||
uart_cfg.Parity = UART_PARITY_DISABLE;
|
||||
uart_cfg.StopBits = UART_STOP_1_BITS;
|
||||
uart_cfg.WordLength = UART_DATA_8_BITS;
|
||||
uart_cfg.BaudRate = UART_BAUDRATE_115200;
|
||||
uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE;
|
||||
|
||||
xc_uart_init(UART0_IDX, &uart_cfg);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief main
|
||||
* @details
|
||||
* @param[in] void
|
||||
* @param[out] void
|
||||
* @retval int - 0
|
||||
* @retval void
|
||||
* @par identifier
|
||||
* reserve
|
||||
* @par other
|
||||
* void
|
||||
* @par change log
|
||||
* Alex created on 2023-05-31
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
rf_data_typedef_t rf_data;
|
||||
/* TX data packaging filling */
|
||||
rf_data_config(rf_data.buff, sizeof(rf_data.buff));
|
||||
rf_data.cnt = 0;
|
||||
rf_data.temp = SEND_TIMERMS_CNT;
|
||||
/* Clock initialization */
|
||||
clock_init();
|
||||
|
||||
/* Serial port initialization */
|
||||
app_uart_init();
|
||||
|
||||
/* rf 2.4g initialization configuration */
|
||||
rf24g_init();
|
||||
|
||||
/* Set up ACKPAYLOD */
|
||||
rf_ack_payload_config();
|
||||
|
||||
/* Set testing frequency points */
|
||||
rf_set_channel(XINCX_2_4G_CHANNEL);
|
||||
|
||||
#if (XINCX_RF_TRANS_RATE == RATE_2M)
|
||||
/* Set 2M mode register configuration */
|
||||
/* Don't move this function interface */
|
||||
rf_2M_config();
|
||||
#endif //(XINCX_RF_TRANS_RATE == RATE_2M)
|
||||
|
||||
#ifdef DEBUG_LOG
|
||||
/* Register information printing */
|
||||
rf_dump_log();
|
||||
#endif // DEBUG_LOG
|
||||
|
||||
#if XINCX_RF_MODE
|
||||
/* ACK data packaging filling */
|
||||
rf_data_config(ack_buff, sizeof(ack_buff));
|
||||
|
||||
/* Fill in TX FIFO */
|
||||
rf_ackpayload_tx_fifo(ack_buff, sizeof(ack_buff));
|
||||
|
||||
/* Receive timeout setting :ms */
|
||||
timer_init(RF_RX_TIMERx, RECV_TIMERMS_OUT);
|
||||
|
||||
/* RX enters receiver */
|
||||
CE_CTL_HIGH;
|
||||
#else
|
||||
/* Launch data packaging filling */
|
||||
rf_data_config(rf_data.buff, sizeof(rf_data.buff));
|
||||
|
||||
/* Set emission interval */
|
||||
timer_init(RF_TX_TIMERx, SEND_TIMERMS_CNT);
|
||||
#endif // XINCX_RF_MODE
|
||||
|
||||
for (;;) {
|
||||
#if XINCX_RF_MODE
|
||||
/* receive */
|
||||
rf_rx_manage(&rf_data);
|
||||
#else
|
||||
/* sending */
|
||||
rf_data.cnt = rf_tx_manage(&rf_data);
|
||||
#endif // XINCX_RF_MODE
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,12 @@
|
||||
|
||||
FUNC void Initialization(void)
|
||||
{
|
||||
SP = _RDWORD(0x10000000);
|
||||
PC = _RDWORD(0x10000004);
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
LOAD %L INCREMENTAL
|
||||
Initialization();
|
||||
@@ -0,0 +1,84 @@
|
||||
|
||||
|
||||
|
||||
FUNC void InitGpio(void)
|
||||
{
|
||||
// Config IOMUX
|
||||
/*
|
||||
gpio_mux_ctl_u(33,1);//d2
|
||||
gpio_mux_ctl_u(34,1);//d3
|
||||
gpio_mux_ctl_u(35,2);//clk
|
||||
gpio_mux_ctl_u(36,2);//cs
|
||||
gpio_mux_ctl_u(37,2);//d0 rx
|
||||
gpio_mux_ctl_u(38,2);//d1 tx
|
||||
*/
|
||||
_WDWORD(0x4000019c, 0x00002A94);
|
||||
}
|
||||
FUNC void InitFlash(void)
|
||||
{
|
||||
|
||||
}
|
||||
FUNC void InitXIP(void)
|
||||
{
|
||||
|
||||
_WDWORD(0x40000104,0x040000);//reset ssi0
|
||||
_WDWORD(0x40000104,0x040004);//reset ssi0
|
||||
_WDWORD(0x40000050,0x110000);//close spi0 mclk
|
||||
_WDWORD(0x40000070,0x1000000);//close spi0 pclk
|
||||
|
||||
|
||||
//config fmc
|
||||
_WDWORD(0x40000270, 0x0503);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x40000270, 0x3503);
|
||||
//config cache
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x52000000, 0x0);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x52000000, 0x21);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
|
||||
|
||||
//config xip spi
|
||||
_WDWORD(0x51000008, 0); //disable spi
|
||||
|
||||
_WDWORD(0x5100002c,0); //close IE
|
||||
_WDWORD(0x51000000,0x1F); //32bit SPI data
|
||||
_WDWORD(0x51000010,0x01); //enable select slave -- SE
|
||||
_WDWORD(0x51000018,0x0); //TXFTL be set 0
|
||||
_WDWORD(0x5100001c,0x0); //RXFTL be set 0
|
||||
|
||||
_WDWORD(0x5100010c, 0x01);//enable select slave
|
||||
_WDWORD(0x51000114, 0xFF);//XIP time out
|
||||
|
||||
_WDWORD(0x51000014, 0x2);//div 2
|
||||
|
||||
//quad
|
||||
_WDWORD(0x51000108, (2)|(6<<4)|(2<<9)|(1<<22)|(1<<29)|(1<<23)|(0<<24)|(8<<13));
|
||||
_WDWORD(0x51000100, 0x6b);//quad read cmd
|
||||
_WDWORD(0x51000104, 0x6b);//quad read cmd
|
||||
|
||||
|
||||
// //dual
|
||||
// _WDWORD(0x51000108, (1)|(6<<4)|(2<<9)|(1<<22)|(1<<29)|(1<<23)|(0)|(8<<13));
|
||||
// _WDWORD(0x51000100, 0x3b);//dual read cmd
|
||||
// _WDWORD(0x51000104, 0x3b);//dual read cmd
|
||||
|
||||
|
||||
_WDWORD(0x51000008, 1); //enable spi
|
||||
}
|
||||
|
||||
FUNC void Initialization(void)
|
||||
{
|
||||
InitGpio();
|
||||
InitFlash();
|
||||
InitXIP();
|
||||
SP = _RDWORD(0x11001000);
|
||||
PC = _RDWORD(0x11001004);
|
||||
_WDWORD(0x4000013C, 0x11001001);
|
||||
}
|
||||
LOAD %L INCREMENTAL
|
||||
Initialization();
|
||||
@@ -0,0 +1,18 @@
|
||||
|
||||
LOAD 0x10000000
|
||||
{
|
||||
EXE 0x10000000
|
||||
{
|
||||
startup_xinc.o (RESET, +FIRST)
|
||||
* (+RO)
|
||||
|
||||
}
|
||||
|
||||
RW +0000
|
||||
{
|
||||
* (+RW,+ZI)
|
||||
}
|
||||
|
||||
ScatterAssert(ImageLength(RW) < 1024 * 28)
|
||||
}
|
||||
|
||||
@@ -0,0 +1,17 @@
|
||||
|
||||
|
||||
LOAD 0x11001000
|
||||
{
|
||||
EXE 0x11001000
|
||||
{
|
||||
startup_xinc.o (RESET, +FIRST)
|
||||
* (+RO)
|
||||
|
||||
}
|
||||
|
||||
RW 0x10002000
|
||||
{
|
||||
* (+RW,+ZI)
|
||||
*(ram_code)
|
||||
}
|
||||
}
|
||||
Binary file not shown.
@@ -0,0 +1 @@
|
||||
Xincboot_tool.exe 0_ram.bin 1_ram_download.bin 0 0 0 0 1
|
||||
Binary file not shown.
@@ -0,0 +1 @@
|
||||
.\Tools\xinchip_xip_tool.exe .\Output\0_ram.bin .\Output\xip_dual .\Output\rf24_ack_Payload_xip.bin
|
||||
File diff suppressed because it is too large
Load Diff
Binary file not shown.
@@ -0,0 +1,59 @@
|
||||
#!/usr/bin/env python
|
||||
#-*- coding:UTF-8 -*-
|
||||
import socket
|
||||
from select import select
|
||||
import time
|
||||
import os
|
||||
import sys
|
||||
import threading
|
||||
import json
|
||||
import struct
|
||||
import binascii
|
||||
import time
|
||||
import re
|
||||
import fileinput
|
||||
|
||||
|
||||
|
||||
def dump_addr(addr):
|
||||
file_asm = "./Xinc_ble_sdk_asm"
|
||||
cur_func = ""
|
||||
with open(file_asm, 'r') as fd:
|
||||
for line in fd:
|
||||
if re.match(r" \w+", line) != None:
|
||||
cur_func = line.strip()
|
||||
#
|
||||
if re.search("^ 0x", line) != None and re.search(addr, line) != None:
|
||||
print(addr, cur_func)
|
||||
break
|
||||
fd.close()
|
||||
|
||||
if __name__ == "__main__":
|
||||
file_in = "./dump.txt"
|
||||
|
||||
for line in fileinput.input(file_in):
|
||||
# 处理 PC 指针信息
|
||||
if re.search("PC = ", line) != None:
|
||||
pc_addr = line.split("PC = ")[1].split(",")[0]
|
||||
#print(hex(int(pc_addr, 16)))
|
||||
dump_addr(hex(int(pc_addr, 16)))
|
||||
|
||||
# 处理 栈信息
|
||||
if re.search("^[0-9]",line) != None:
|
||||
#print(line)
|
||||
stack = line.split('=')[1].replace('\n', '').split(' ')
|
||||
for addr in stack:
|
||||
if addr == ' ' or re.search("^1", addr) == None:
|
||||
continue
|
||||
#print(addr, hex(int(addr,16)-1))
|
||||
dump_addr(hex(int(addr,16)-1))
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
Binary file not shown.
@@ -0,0 +1,552 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rf24_ack_payload</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>0</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>7</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>0</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\UL2CM3.DLL</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Target>
|
||||
<TargetName>rf24_ack_payload_xip_demo</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>7</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>0</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\UL2CM3.DLL</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Startup</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\CMSIS\core_cm0.h</PathWithFileName>
|
||||
<FilenameWithoutPath>core_cm0.h</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>2</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\Startup\xc60xx\startup_xinc.s</PathWithFileName>
|
||||
<FilenameWithoutPath>startup_xinc.s</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>3</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\Startup\system_xinc.c</PathWithFileName>
|
||||
<FilenameWithoutPath>system_xinc.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>4</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\Startup\system_it_xinc.c</PathWithFileName>
|
||||
<FilenameWithoutPath>system_it_xinc.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>Application</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>5</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\src\main.c</PathWithFileName>
|
||||
<FilenameWithoutPath>main.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>RF_Config</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>6</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\app\rf_config\rf_config.h</PathWithFileName>
|
||||
<FilenameWithoutPath>rf_config.h</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>RF_Drivers</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>4</GroupNumber>
|
||||
<FileNumber>7</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\rf24\Drivers\xc6xxx_rf_2_4g\xc6xxx_rf_2_4g.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc6xxx_rf_2_4g.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>Drivers</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>8</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\ringbuffer.c</PathWithFileName>
|
||||
<FilenameWithoutPath>ringbuffer.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>9</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_clock.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_clock.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>10</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_dma.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_dma.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>11</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_gpio.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_gpio.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>12</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_systick.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_systick.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>13</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_timer.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_timer.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>14</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_uart.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_uart.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>15</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_pwr.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_pwr.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>5</GroupNumber>
|
||||
<FileNumber>16</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\..\component\xc6xx_drivers\Drivers\xc_driver\xc_drv_fmc_spi.c</PathWithFileName>
|
||||
<FilenameWithoutPath>xc_drv_fmc_spi.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,234 @@
|
||||
|
||||
;/*****************************************************************************
|
||||
; * @file: startup_xinc.s
|
||||
; * @purpose: CMSIS Cortex-M0 Core Device Startup File for the
|
||||
; * Device xinc.
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000600
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
; ToDo: Add here the vectors for the device specific external interrupts handler
|
||||
DCD 0 ; 0 BLE Handler
|
||||
DCD DMAS_Handler ; 1
|
||||
DCD CPR_Handler ; 2
|
||||
DCD GPIO_Handler ; 3
|
||||
DCD RTC_Handler ; 4
|
||||
DCD TIMER0_Handler ; 5
|
||||
DCD TIMER1_Handler
|
||||
DCD TIMER2_Handler
|
||||
DCD TIMER3_Handler
|
||||
DCD WDT_Handler
|
||||
DCD I2C_Handler
|
||||
DCD UART0_Handler
|
||||
DCD UART1_Handler
|
||||
DCD SPI0_Handler
|
||||
DCD SPI1_Handler
|
||||
DCD 0
|
||||
DCD 0
|
||||
DCD GADC_Handler ; 17
|
||||
DCD 0 ; 18
|
||||
DCD 0 ; 19
|
||||
DCD 0 ; 20
|
||||
DCD 0 ; 21
|
||||
DCD RF24G_Handler ; 22
|
||||
DCD PWM_Handler ; 23
|
||||
DCD BOR_Handler ; 24
|
||||
DCD 0 ; 25
|
||||
DCD 0 ; 26
|
||||
DCD AOTIMER0_Handler ; 27
|
||||
DCD AOTIMER1_Handler ; 28
|
||||
DCD CMP_Handler ; 29
|
||||
DCD FMC_Handler ; 30
|
||||
DCD CAN_Handler ; 31
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR r0, =0x4000013C ; remap
|
||||
LDR r1, =0x10000001
|
||||
STR r1, [r0]
|
||||
|
||||
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
;EXPORT BLE_Handler [WEAK]
|
||||
EXPORT DMAS_Handler [WEAK]
|
||||
EXPORT CPR_Handler [WEAK]
|
||||
EXPORT GPIO_Handler [WEAK]
|
||||
EXPORT RTC_Handler [WEAK]
|
||||
EXPORT TIMER0_Handler [WEAK]
|
||||
EXPORT TIMER1_Handler [WEAK]
|
||||
EXPORT TIMER2_Handler [WEAK]
|
||||
EXPORT TIMER3_Handler [WEAK]
|
||||
EXPORT WDT_Handler [WEAK]
|
||||
EXPORT I2C_Handler [WEAK]
|
||||
EXPORT UART0_Handler [WEAK]
|
||||
EXPORT UART1_Handler [WEAK]
|
||||
EXPORT SPI0_Handler [WEAK]
|
||||
EXPORT SPI1_Handler [WEAK]
|
||||
;EXPORT KBS_Handler [WEAK]
|
||||
;EXPORT QDEC_Handler [WEAK]
|
||||
EXPORT GADC_Handler [WEAK]
|
||||
EXPORT AOTIMER0_Handler [WEAK]
|
||||
EXPORT AOTIMER1_Handler [WEAK]
|
||||
EXPORT CMP_Handler [WEAK]
|
||||
EXPORT FMC_Handler [WEAK]
|
||||
EXPORT CAN_Handler [WEAK]
|
||||
;EXPORT SIM_Handler [WEAK]
|
||||
;EXPORT AES_Handler [WEAK]
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
EXPORT RF24G_Handler [WEAK]
|
||||
EXPORT PWM_Handler [WEAK]
|
||||
EXPORT BOR_Handler [WEAK]
|
||||
|
||||
PendSV_Handler
|
||||
SysTick_Handler
|
||||
;BLE_Handler
|
||||
DMAS_Handler
|
||||
CPR_Handler
|
||||
GPIO_Handler
|
||||
RTC_Handler
|
||||
TIMER0_Handler
|
||||
TIMER1_Handler
|
||||
TIMER2_Handler
|
||||
TIMER3_Handler
|
||||
WDT_Handler
|
||||
I2C_Handler
|
||||
UART0_Handler
|
||||
UART1_Handler
|
||||
SPI0_Handler
|
||||
SPI1_Handler
|
||||
;KBS_Handler
|
||||
;QDEC_Handler
|
||||
GADC_Handler
|
||||
;SIM_Handler
|
||||
;AES_Handler
|
||||
AOTIMER0_Handler
|
||||
AOTIMER1_Handler
|
||||
CMP_Handler
|
||||
FMC_Handler
|
||||
CAN_Handler
|
||||
RF24G_Handler
|
||||
PWM_Handler
|
||||
BOR_Handler
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
ALIGN
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, = (Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
END
|
||||
|
||||
@@ -0,0 +1,232 @@
|
||||
/*!
|
||||
* \file system_it_xinc.c
|
||||
*
|
||||
* \brief Target system interruption implementation
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "system_it_xinc.h"
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Func Prototype
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles NMI exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END NonMaskableInt_IRQn */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Hard Fault exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END HardFault_IRQn */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Memory Manage exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Bus Fault exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Usage Fault exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles SVCall exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVCall_IRQn */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END SVCall_IRQn */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles Debug Monitor exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief This function handles PendSVC exception.
|
||||
*
|
||||
* @param[in]
|
||||
* @param[in]
|
||||
****************************************************************************************
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn */
|
||||
DEBUG("%s\n", __func__);
|
||||
/* USER CODE END PendSV_IRQn */
|
||||
while (1)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/****************************** Hard Fault Handler Functions *******************************/
|
||||
/*------------------------------------------------------------------------------------
|
||||
Private Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
void HardFault_Handler_c(unsigned int * HardFault_args)
|
||||
{
|
||||
/*栈帧里面内容：*/
|
||||
unsigned int stack_r0; //压栈的 R0
|
||||
unsigned int stack_r1; //压栈的 R1
|
||||
unsigned int stack_r2; //压栈的 R2
|
||||
unsigned int stack_r3; //压栈的 R3
|
||||
unsigned int stack_r12; //压栈的 R12
|
||||
unsigned int stack_lr; //压栈的 lr
|
||||
unsigned int stack_pc; //压栈的 pc
|
||||
unsigned int stack_psr; //压栈的 psr
|
||||
|
||||
stack_r0 = ((unsigned int)HardFault_args[0]);
|
||||
stack_r1 = ((unsigned int)HardFault_args[1]);
|
||||
stack_r2 = ((unsigned int)HardFault_args[2]);
|
||||
stack_r3 = ((unsigned int)HardFault_args[3]);
|
||||
stack_r12 = ((unsigned int)HardFault_args[4]);
|
||||
stack_lr = ((unsigned int)HardFault_args[5]);
|
||||
stack_pc = ((unsigned int)HardFault_args[6]);
|
||||
stack_psr = ((unsigned int)HardFault_args[7]);
|
||||
|
||||
DEBUG("----%s----\n", __func__);
|
||||
DEBUG("R0=%x\n",stack_r0);
|
||||
DEBUG("R1=%x\n",stack_r1);
|
||||
DEBUG("R2=%x\n",stack_r2);
|
||||
DEBUG("R3=%x\n",stack_r3);
|
||||
DEBUG("R12=%x\n",stack_r12);
|
||||
DEBUG("LR[R14]=%x\n",stack_lr);
|
||||
DEBUG("PC[R15]=%x\n",stack_pc);
|
||||
DEBUG("PSR=%x\n",stack_psr);
|
||||
DEBUG("SCB_SHCSR=%x\n",SCB->SHCSR);
|
||||
DEBUG("---------------------------\n");
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*******************************************************************************************/
|
||||
|
||||
@@ -0,0 +1,58 @@
|
||||
/*!
|
||||
* \file system_it_xinc.h
|
||||
*
|
||||
* \brief The header of system_it_xinc.c
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __SYSTEM_IT_XINC_H__
|
||||
#define __SYSTEM_IT_XINC_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "xc6xxx.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Exported Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
void NMI_Handler( void );
|
||||
void HardFault_Handler( void );
|
||||
void MemManage_Handler( void );
|
||||
void BusFault_Handler( void );
|
||||
void UsageFault_Handler( void );
|
||||
void SVC_Handler( void );
|
||||
void DebugMon_Handler( void );
|
||||
void PendSV_Handler( void );
|
||||
|
||||
void HardFault_Handler_c(unsigned int * HardFault_args);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __SYSTEM_IT_XINC_H__ */
|
||||
|
||||
@@ -0,0 +1,117 @@
|
||||
/**
|
||||
* Initialize the system
|
||||
*
|
||||
* @param none
|
||||
* @return none
|
||||
*
|
||||
* @brief Setup the microcontroller system
|
||||
*
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include <stdio.h>
|
||||
|
||||
#include "xc6xxx.h"
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
#define __DEBUG_OUT_PORT 0
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
#define VECTOR_NUM 48
|
||||
|
||||
void set_vector(void)
|
||||
{
|
||||
#if (USE_XIP == 1)
|
||||
__disable_irq();
|
||||
for (uint32_t i = 0, *Pvector = (uint32_t *)(0x11001000 + 0),
|
||||
*_vector_table = (uint32_t *)(0x10000000);
|
||||
i < VECTOR_NUM; i++) // copy vertor table
|
||||
{
|
||||
_vector_table[i] = *Pvector++;
|
||||
}
|
||||
|
||||
*((volatile unsigned int *)(0x4000013C)) =
|
||||
0x10000001; // inter vertor table remap
|
||||
__enable_irq();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
static void WDT_ResetInit(void)
|
||||
{
|
||||
cpr_ctlapbclken_grctl__wdt_pclk_en__setf(ENABLE);
|
||||
|
||||
cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_ENABLE);
|
||||
cpr_rstctl_ctlapb_sw__wdt_rstn__setf(RSTCTL_DISABLE);
|
||||
|
||||
cpr_rstctl_wdtrst_mask_set(
|
||||
(WDT_SYS_RSTN_MASK_DISABLE | WDT_M0_RSTN_MASK_ENABLE));
|
||||
|
||||
cpr_lp_ctl__wdt_tclk_en__setf(ENABLE);
|
||||
wdt_cr__wdt_en__setf(DISABLE);
|
||||
}
|
||||
|
||||
void SystemInit(void)
|
||||
{
|
||||
|
||||
WDT_ResetInit();
|
||||
|
||||
#if (USE_XIP == 1)
|
||||
|
||||
set_vector();
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
__RAM_CODE int sendchar(int c)
|
||||
{
|
||||
unsigned int status;
|
||||
#if (__DEBUG_OUT_PORT == 1)
|
||||
for (;;) {
|
||||
status = (*((volatile unsigned *)(0x40011000 + 0x14)));
|
||||
status &= 0x20;
|
||||
if (status == 0x20)
|
||||
break;
|
||||
}
|
||||
(*((volatile unsigned *)(0x40011000 + 0x00))) = c;
|
||||
return (1);
|
||||
#else
|
||||
for (;;) {
|
||||
status = (*((volatile unsigned *)(0x40010000 + 0x14)));
|
||||
status &= 0x20;
|
||||
if (status == 0x20)
|
||||
break;
|
||||
}
|
||||
(*((volatile unsigned *)(0x40010000 + 0x00))) = c;
|
||||
return (1);
|
||||
#endif
|
||||
}
|
||||
|
||||
struct __FILE
|
||||
{
|
||||
int handle; /* Add whatever you need here */
|
||||
};
|
||||
|
||||
FILE __stdout;
|
||||
__RAM_CODE int fputc(int ch, FILE *f) { return (sendchar(ch)); }
|
||||
|
||||
int ferror(FILE *f)
|
||||
{
|
||||
/* Your implementation of ferror */
|
||||
return EOF;
|
||||
}
|
||||
|
||||
void _ttywrch(int ch) { sendchar(ch); }
|
||||
|
||||
void _sys_exit(int return_code)
|
||||
{
|
||||
label:
|
||||
goto label; /* endless loop */
|
||||
}
|
||||
@@ -0,0 +1,256 @@
|
||||
|
||||
;/*****************************************************************************
|
||||
; * @file: startup_xinc.s
|
||||
; * @purpose: CMSIS Cortex-M0 Core Device Startup File for the
|
||||
; * Device xinc.
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00001000
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
; ToDo: Add here the vectors for the device specific external interrupts handler
|
||||
DCD BLE_Handler ; 0
|
||||
DCD DMA_Handler ; 1
|
||||
DCD CPR_Handler ; 2
|
||||
DCD GPIO_Handler ; 3
|
||||
DCD RTC_Handler ; 4
|
||||
DCD TIMER0_Handler ; 5
|
||||
DCD TIMER1_Handler ; 6
|
||||
DCD TIMER2_Handler ; 7
|
||||
DCD TIMER3_Handler ; 8
|
||||
DCD WDT_Handler ; 9
|
||||
DCD I2C_Handler ; 10
|
||||
DCD UART0_Handler ; 11
|
||||
DCD UART1_Handler ; 12
|
||||
DCD SPI0_Handler ; 13
|
||||
DCD SPI1_Handler ; 14
|
||||
DCD 0 ; 15
|
||||
DCD 0 ; 16
|
||||
DCD GADC_Handler ; 17
|
||||
DCD PWM_Handler ; 18
|
||||
DCD AES_Handler ; 19
|
||||
DCD USB_Handler ; 20
|
||||
DCD AUDIO_Handler ; 21
|
||||
DCD RF24G_Handler ; 22
|
||||
DCD SPI2_Handler ; 23
|
||||
DCD 0 ; 24
|
||||
DCD UART2_Handler ; 25
|
||||
DCD I2S_Handler ; 26
|
||||
DCD AOTIMER0_Handler ; 27
|
||||
DCD AOTIMER1_Handler ; 28
|
||||
DCD CMP_Handler ; 29
|
||||
DCD FMC_Handler ; 30
|
||||
DCD CAN_Handler ; 31
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR r0, =0x4000013C ; remap
|
||||
LDR r1, =0x10000001
|
||||
STR r1, [r0]
|
||||
|
||||
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
IMPORT HardFault_Handler_c ;函数声明
|
||||
movs r0, #4 ;判断主栈指针还是进程栈指针
|
||||
mov r1, lr
|
||||
tst r0, r1
|
||||
beq hf_used_msp ;如果是主栈指针
|
||||
mrs r0, psp ;否则是进程栈指针,把进程栈指针地址付给 R0
|
||||
ldr r1, =HardFault_Handler_c ;跳转到 HardFault 中断程序
|
||||
bx r1
|
||||
hf_used_msp
|
||||
mrs r0, msp ;把主栈指针地址赋给 R0
|
||||
ldr r1, =HardFault_Handler_c
|
||||
bx r1
|
||||
;EXPORT HardFault_Handler [WEAK]
|
||||
;B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
EXPORT BLE_Handler [WEAK]
|
||||
EXPORT DMA_Handler [WEAK]
|
||||
EXPORT CPR_Handler [WEAK]
|
||||
EXPORT GPIO_Handler [WEAK]
|
||||
EXPORT RTC_Handler [WEAK]
|
||||
EXPORT TIMER0_Handler [WEAK]
|
||||
EXPORT TIMER1_Handler [WEAK]
|
||||
EXPORT TIMER2_Handler [WEAK]
|
||||
EXPORT TIMER3_Handler [WEAK]
|
||||
EXPORT WDT_Handler [WEAK]
|
||||
EXPORT I2C_Handler [WEAK]
|
||||
EXPORT UART0_Handler [WEAK]
|
||||
EXPORT UART1_Handler [WEAK]
|
||||
EXPORT SPI0_Handler [WEAK]
|
||||
EXPORT SPI1_Handler [WEAK]
|
||||
;EXPORT KBS_Handler [WEAK]
|
||||
;EXPORT QDEC_Handler [WEAK]
|
||||
EXPORT GADC_Handler [WEAK]
|
||||
EXPORT PWM_Handler [WEAK]
|
||||
EXPORT AES_Handler [WEAK]
|
||||
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
|
||||
EXPORT USB_Handler [WEAK];20
|
||||
EXPORT AUDIO_Handler [WEAK];21
|
||||
EXPORT RF24G_Handler [WEAK];22
|
||||
EXPORT SPI2_Handler [WEAK];23
|
||||
;EXPORT MPU_Handler [WEAK];24
|
||||
EXPORT UART2_Handler [WEAK];25
|
||||
EXPORT I2S_Handler [WEAK];26
|
||||
EXPORT AOTIMER0_Handler [WEAK];27
|
||||
EXPORT AOTIMER1_Handler [WEAK];28
|
||||
EXPORT CMP_Handler [WEAK];29
|
||||
EXPORT FMC_Handler [WEAK];30
|
||||
EXPORT CAN_Handler [WEAK];31
|
||||
|
||||
PendSV_Handler
|
||||
SysTick_Handler
|
||||
BLE_Handler
|
||||
RF24G_Handler
|
||||
DMA_Handler
|
||||
CPR_Handler
|
||||
GPIO_Handler
|
||||
RTC_Handler
|
||||
TIMER0_Handler
|
||||
TIMER1_Handler
|
||||
TIMER2_Handler
|
||||
TIMER3_Handler
|
||||
WDT_Handler
|
||||
I2C_Handler
|
||||
I2S_Handler
|
||||
UART0_Handler
|
||||
UART1_Handler
|
||||
UART2_Handler
|
||||
SPI0_Handler
|
||||
SPI1_Handler
|
||||
SPI2_Handler
|
||||
;KBS_Handler
|
||||
;QDEC_Handler
|
||||
GADC_Handler
|
||||
PWM_Handler
|
||||
AUDIO_Handler
|
||||
;SIM_Handler
|
||||
AES_Handler
|
||||
AOTIMER0_Handler
|
||||
AOTIMER1_Handler
|
||||
CMP_Handler
|
||||
FMC_Handler
|
||||
CAN_Handler
|
||||
USB_Handler
|
||||
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
ALIGN
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, = (Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
END
|
||||
@@ -0,0 +1,79 @@
|
||||
/*!
|
||||
* \file main.h
|
||||
*
|
||||
* \brief The head file of main.c
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MAIN_H__
|
||||
#define __MAIN_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
|
||||
#include "xc6xxx.h"
|
||||
#include "clock.h"
|
||||
#include "rf_adv_config.h"
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
#define DEBUG_LOG
|
||||
#define TEST_DATA
|
||||
|
||||
#define RF_ADV_BASE 2400U
|
||||
#define RF_ADV_CHANNEL_37 2
|
||||
#define RF_ADV_CHANNEL_38 26
|
||||
#define RF_ADV_CHANNEL_39 80
|
||||
|
||||
#define ADV_BUFF_LEN XINCX_ADV_PIPE0_LEN
|
||||
/*------------------------------------------------------------------------------------
|
||||
TypeDef
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Global Variables
|
||||
-------------------------------------------------------------------------------------*/
|
||||
extern uint8_t recv_len;
|
||||
extern uint8_t recv_adv_buf[ADV_BUFF_LEN];
|
||||
extern bool rf24g_handler_flag;
|
||||
/*------------------------------------------------------------------------------------
|
||||
Exported Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
void rf_adv_tx_evevt(void);
|
||||
void rf_adv_rx_evevt(void);
|
||||
void rf_2_4g_dump_log(void);
|
||||
void rf_2M_config(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H__ */
|
||||
|
||||
@@ -0,0 +1,146 @@
|
||||
#include "func.h"
|
||||
#include "check.h"
|
||||
|
||||
/****************************** 校验相关操作 ******************************/
|
||||
void f_addcrc(uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint16_t crc = CRC16_MODBUS(data, length-2);
|
||||
data[length-2] = crc & 0xFF;
|
||||
data[length-1] = crc >> 8;
|
||||
}
|
||||
|
||||
uint8_t f_checkcrc(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint16_t crc = CRC16_MODBUS(data, length-2);
|
||||
if(((crc&0xFF) == data[length-2])&&(((crc>>8)&0xFF) == data[length-1]))
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************** 内存相关操作 ******************************/
|
||||
//内存拷贝
|
||||
void f_memcpy(uint8_t *dest, const uint8_t *src, uint16_t size)
|
||||
{
|
||||
while(size--)
|
||||
{
|
||||
*dest++ = *src++;
|
||||
}
|
||||
}
|
||||
|
||||
//内存赋值
|
||||
void f_memset(uint8_t *data, uint8_t val, uint16_t size)
|
||||
{
|
||||
while(size--)
|
||||
{
|
||||
*data++ = val;
|
||||
}
|
||||
}
|
||||
|
||||
//内存比较
|
||||
uint8_t f_memcmp(const uint8_t *data1, const uint8_t *data2, uint16_t size)
|
||||
{
|
||||
while(size--)
|
||||
{
|
||||
if(*data1++ != *data2++)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
/****************************** 字符串相关操作 ******************************/
|
||||
//字符比较
|
||||
uint8_t f_chrcmp(const uint8_t *data, uint8_t val, uint16_t size)
|
||||
{
|
||||
while(size--)
|
||||
{
|
||||
if(*data++ != val)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
//字符串比较
|
||||
uint8_t f_strcmp(const uint8_t *str1, const uint8_t *str2)
|
||||
{
|
||||
while(*str1 == *str2)
|
||||
{
|
||||
if(*str1 == 0) //比较结束
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
str1++;
|
||||
str2++;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
//字符串查找，查找str1中是否有str2
|
||||
uint8_t f_strstr(const uint8_t *str1, const uint8_t *str2)
|
||||
{
|
||||
uint8_t *p, *q;
|
||||
while(*str1)
|
||||
{
|
||||
p = (uint8_t *)str1;
|
||||
q = (uint8_t *)str2;
|
||||
if(*p == *q)
|
||||
{
|
||||
while(*q && (*p == *q))
|
||||
{
|
||||
p++;
|
||||
q++;
|
||||
}
|
||||
if(*q == 0)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
str1++;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
//查找字符串中某字符第一次出现的位置
|
||||
int8_t f_strchr(const uint8_t *str, uint8_t ch)
|
||||
{
|
||||
uint16_t loc = 0;
|
||||
while(*str != 0 && *str != ch)
|
||||
{
|
||||
str++;
|
||||
loc++;
|
||||
}
|
||||
return ((*str == ch) ? loc : -1);
|
||||
}
|
||||
|
||||
/******************************* 计算相关操作 *******************************/
|
||||
//计算两个数的差值
|
||||
float f_delta(const float aa, const float bb)
|
||||
{
|
||||
if(aa > bb)
|
||||
{
|
||||
return (aa - bb);
|
||||
}
|
||||
else
|
||||
{
|
||||
return (bb - aa);
|
||||
}
|
||||
}
|
||||
|
||||
//计算两个数差的绝对值
|
||||
uint32_t f_abs(const uint32_t aa, const uint32_t bb)
|
||||
{
|
||||
if(aa > bb)
|
||||
{
|
||||
return (aa - bb);
|
||||
}
|
||||
else
|
||||
{
|
||||
return (bb - aa);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,31 @@
|
||||
#ifndef __FUNC_H
|
||||
#define __FUNC_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
//位变量按字节对齐
|
||||
#define SWAP(a, b, type) {type temp = a; a = b; b = temp;}
|
||||
#define bytealign(bits) ((bits + 7) & 0xF8)
|
||||
|
||||
typedef union {uint32_t value; uint8_t data[4];}WORD_T;
|
||||
typedef union {float value; uint8_t data[4];}FLOAT_T;
|
||||
|
||||
|
||||
/****************************** 校验相关操作 ******************************/
|
||||
extern void f_addcrc(uint8_t *data, uint16_t length);
|
||||
extern uint8_t f_checkcrc(const uint8_t *data, uint16_t length);
|
||||
/****************************** 内存相关操作 ******************************/
|
||||
extern void f_memcpy(uint8_t *dest, const uint8_t *src, uint16_t size);
|
||||
extern void f_memset(uint8_t *data, uint8_t val, uint16_t size);
|
||||
extern uint8_t f_memcmp(const uint8_t *data1, const uint8_t *data2, uint16_t size);
|
||||
/***************************** 字符串相关操作 *****************************/
|
||||
extern uint8_t f_chrcmp(const uint8_t *data, uint8_t val, uint16_t size);
|
||||
extern uint8_t f_strcmp(const uint8_t *str1, const uint8_t *str2);
|
||||
extern uint8_t f_strstr(const uint8_t *str1, const uint8_t *str2);
|
||||
extern int8_t f_strchr(const uint8_t *str, uint8_t ch);
|
||||
|
||||
/******************************* 计算相关操作 *******************************/
|
||||
extern float f_delta(const float aa, const float bb);
|
||||
extern uint32_t f_abs(const uint32_t val1, const uint32_t val2);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,84 @@
|
||||
#include "hal_api.h"
|
||||
#include "xc_hal.h"
|
||||
#include "xc_24g.h"
|
||||
#include "radar.h"
|
||||
#include "uart.h"
|
||||
|
||||
|
||||
void api_delayms(uint32_t wait)
|
||||
{
|
||||
hal_delayms(wait);
|
||||
}
|
||||
|
||||
void api_pwm_out(uint16_t light, uint16_t *color)
|
||||
{
|
||||
hal_pwm_set(0, light);
|
||||
}
|
||||
|
||||
uint32_t api_random(void)
|
||||
{
|
||||
return hal_random();
|
||||
}
|
||||
|
||||
/************************ FLASHÇý¶¯½Ó¿Ú *****************************/
|
||||
void api_flash_init(uint8_t idnum)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
uint8_t api_flash_check(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint8_t api_flash_erase(uint8_t id)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint8_t api_flash_read(uint8_t id, uint8_t *data, uint16_t size)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint8_t api_flash_write(uint8_t id, uint8_t *data, uint16_t size)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/************************* À×´ïÇý¶¯½Ó¿Ú ****************************/
|
||||
uint8_t api_radar_init(uint32_t setbase, uint16_t setper, uint8_t save)
|
||||
{
|
||||
return radar_init(setbase, setper, save);
|
||||
}
|
||||
|
||||
uint8_t api_radar_setbase(uint32_t setbase)
|
||||
{
|
||||
return radar_setbase(setbase);
|
||||
}
|
||||
|
||||
void api_radar_read(uint16_t *data)
|
||||
{
|
||||
radar_readval(data);
|
||||
}
|
||||
|
||||
void api_radar_getper(uint8_t *data)
|
||||
{
|
||||
radar_getper(data);
|
||||
}
|
||||
|
||||
void api_radar_getcfg(uint8_t *data)
|
||||
{
|
||||
radar_getcfg(data);
|
||||
}
|
||||
|
||||
__RAM_CODE void api_uart_recv(void (*func)(uint8_t *, uint8_t))
|
||||
{
|
||||
uart_recv(func);
|
||||
}
|
||||
|
||||
|
||||
void api_led_set(uint8_t value)
|
||||
{
|
||||
hal_led_set(value);
|
||||
}
|
||||
@@ -0,0 +1,63 @@
|
||||
#ifndef __API_H
|
||||
#define __API_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
#define DEVICE_TYPE 2
|
||||
|
||||
#define LAMP_TYPE 1
|
||||
|
||||
#define RF_SYNCWORD 0x58adc86e
|
||||
#define RF_TXPOWER 0x1D
|
||||
|
||||
|
||||
#define MSEC(x) (x)
|
||||
#define SEC(x) (x*1000)
|
||||
#define MIN(x) (x*60000)
|
||||
|
||||
|
||||
#ifndef BIT
|
||||
#define BIT(x) (1<<x)
|
||||
#endif
|
||||
|
||||
#ifndef NULL
|
||||
#define NULL 0
|
||||
#endif
|
||||
|
||||
extern uint8_t chipuid[12];
|
||||
extern uint8_t deviceaddr[4];
|
||||
|
||||
//api_mcu
|
||||
extern uint8_t api_mcu_init(void);
|
||||
extern void api_delayms(uint32_t wait);
|
||||
extern void api_pwm_out(uint16_t light, uint16_t *color);
|
||||
extern void api_wdt_feed(void);
|
||||
extern uint32_t api_random(void);
|
||||
extern uint32_t api_nowtick(void);
|
||||
|
||||
//api_rf
|
||||
extern void api_rf_init(uint32_t syncword, uint8_t txpa);
|
||||
extern void api_rf_send(uint8_t *data, uint8_t length);
|
||||
extern uint8_t api_rf_recv(uint8_t *data, uint8_t *rssi);
|
||||
extern uint8_t api_rf_istxpower(uint8_t txpa);
|
||||
|
||||
//api_nvm.c
|
||||
extern void api_flash_init(uint8_t idnum);
|
||||
extern uint8_t api_flash_check(void);
|
||||
extern uint8_t api_flash_erase(uint8_t id);
|
||||
extern uint8_t api_flash_read(uint8_t id, uint8_t *data, uint16_t size);
|
||||
extern uint8_t api_flash_write(uint8_t id, uint8_t *data, uint16_t size);
|
||||
|
||||
//api_radar.c
|
||||
extern uint8_t api_radar_init(uint32_t setbase, uint16_t setper, uint8_t save);
|
||||
extern uint8_t api_radar_setbase(uint32_t setbase);
|
||||
extern void api_radar_read(uint16_t *data);
|
||||
extern void api_radar_getper(uint8_t *data);
|
||||
extern void api_radar_getcfg(uint8_t *data);
|
||||
|
||||
//api_port
|
||||
extern void api_uart_recv(void (*func)(uint8_t *, uint8_t));
|
||||
extern void api_led_set(uint8_t value);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,121 @@
|
||||
#include "xc_hal.h"
|
||||
#include "uart.h"
|
||||
#include "radar.h"
|
||||
|
||||
uint8_t rad_txbuff[16] = {0};
|
||||
uint8_t rad_rxbuff[16] = {0};
|
||||
|
||||
uint8_t rad_flag = 1;
|
||||
uint8_t rad_ccc = 1;
|
||||
uint16_t rad_aaa = 100;
|
||||
uint32_t rad_bbb = 30;
|
||||
|
||||
static uint8_t cmd_setval(uint32_t setval, uint8_t save)
|
||||
{
|
||||
rad_txbuff[0] = 0xA1;
|
||||
rad_txbuff[1] = 0x07;
|
||||
rad_txbuff[2] = setval >> 8;
|
||||
rad_txbuff[3] = setval & 0xFF;
|
||||
rad_txbuff[4] = 0x00;
|
||||
rad_txbuff[5] = 0x02;
|
||||
rad_txbuff[6] = 0x00;
|
||||
rad_txbuff[7] = 0x00;
|
||||
rad_txbuff[8] = (save!=0)?1:0;
|
||||
return uart_trx(rad_txbuff, rad_rxbuff);
|
||||
}
|
||||
|
||||
static uint8_t cmd_getval(uint32_t *getval)
|
||||
{
|
||||
rad_txbuff[0] = 0xA2;
|
||||
rad_txbuff[1] = 0x00;
|
||||
if(uart_trx(rad_txbuff, rad_rxbuff))
|
||||
{
|
||||
*getval = rad_rxbuff[2]<<8|rad_rxbuff[3];
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint8_t cmd_setflag(uint8_t flag)
|
||||
{
|
||||
rad_txbuff[0] = 0xA3;
|
||||
rad_txbuff[1] = 0x01;
|
||||
rad_txbuff[2] = flag;
|
||||
return uart_trx(rad_txbuff, rad_rxbuff);
|
||||
}
|
||||
|
||||
static uint8_t cmd_getflag(uint8_t *data)
|
||||
{
|
||||
rad_txbuff[0] = 0xA4;
|
||||
rad_txbuff[1] = 0x00;
|
||||
if(uart_trx(rad_txbuff, rad_rxbuff))
|
||||
{
|
||||
*data = rad_rxbuff[2];
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
//À×´ï³õʼ»¯
|
||||
uint8_t radar_init(uint32_t setbase, uint16_t setper, uint8_t save)
|
||||
{
|
||||
uint8_t enable = 0;
|
||||
uint32_t setval = 0;
|
||||
|
||||
rad_flag = save;
|
||||
if(setper & 0x8000)
|
||||
{
|
||||
enable = 0;
|
||||
setval = 255;
|
||||
}
|
||||
else
|
||||
{
|
||||
enable = 1;
|
||||
setval = (uint64_t)(setbase * setper) / 100;
|
||||
if(setval > 255) setval = 255;
|
||||
}
|
||||
if(!cmd_setflag(enable))
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
rad_ccc = enable;
|
||||
delay_ms(40);
|
||||
if(!cmd_setval(setval, save))
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
rad_bbb = setval;
|
||||
rad_aaa = setper;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
uint8_t radar_setbase(uint32_t setbase)
|
||||
{
|
||||
return radar_init(setbase, rad_aaa, rad_flag);
|
||||
}
|
||||
|
||||
void radar_readval(uint16_t *data)
|
||||
{
|
||||
data[0] = (hal_rad_get())?1023:0;
|
||||
data[1] = data[0];
|
||||
}
|
||||
|
||||
void radar_getper(uint8_t *data)
|
||||
{
|
||||
data[0] = rad_aaa & 0xFF;
|
||||
data[1] = rad_aaa >> 8;
|
||||
}
|
||||
|
||||
void radar_getcfg(uint8_t *data)
|
||||
{
|
||||
cmd_getval(&rad_bbb);
|
||||
cmd_getflag(&rad_ccc);
|
||||
data[0] = rad_ccc;
|
||||
data[1] = (rad_bbb >> 0) & 0xFF;
|
||||
data[2] = (rad_bbb >> 8) & 0xFF;
|
||||
data[3] = (rad_bbb >> 16) & 0xFF;
|
||||
data[4] = (rad_bbb >> 24) & 0xFF;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,12 @@
|
||||
#ifndef __RADAR_H
|
||||
#define __RADAR_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
extern uint8_t radar_init(uint32_t setbase, uint16_t setper, uint8_t save);
|
||||
extern uint8_t radar_setbase(uint32_t setbase);
|
||||
extern void radar_readval(uint16_t *data);
|
||||
extern void radar_getper(uint8_t *data);
|
||||
extern void radar_getcfg(uint8_t *data);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,364 @@
|
||||
#include "app.h"
|
||||
|
||||
const configa_t configa = {
|
||||
.light1 = 70,
|
||||
.light0 = 5,
|
||||
.time = 3,
|
||||
.uidx = 10,
|
||||
.didx = 12,
|
||||
.ctemp = 50,
|
||||
.weight = 3500,
|
||||
.color1 = {255, 255, 255, 255, 255},
|
||||
.color0 = {255, 255, 255, 255, 255},
|
||||
};
|
||||
|
||||
const configb_t configb = {
|
||||
.a = 50,
|
||||
.b = 100,
|
||||
};
|
||||
|
||||
|
||||
const configc_t configc = {
|
||||
.a = 30,
|
||||
.b = 720,
|
||||
.c = 24,
|
||||
.d = 0,
|
||||
.e = 1,
|
||||
.f = 100,
|
||||
.g = 0x1D,
|
||||
.h = 10,
|
||||
};
|
||||
|
||||
|
||||
const configd_t configd = {
|
||||
.a = 20000,
|
||||
.b = 3,
|
||||
.c = 16,
|
||||
.d = 8,
|
||||
.e = 10,
|
||||
.f = 25,
|
||||
.g1 = 12,
|
||||
.g2 = 0,
|
||||
};
|
||||
|
||||
|
||||
const confige_t confige = {
|
||||
.a = 200,
|
||||
.b = 100,
|
||||
.c = 3,
|
||||
.d = 1,
|
||||
.e = 60,
|
||||
.f = 60,
|
||||
};
|
||||
|
||||
const roles_t init_aa = {
|
||||
ROLE_A,
|
||||
};
|
||||
|
||||
|
||||
const status_t init_bb = {
|
||||
STAT_1,
|
||||
};
|
||||
|
||||
param_t param;
|
||||
setting_t settinga = {0};
|
||||
setting_t settingb = {0};
|
||||
setting_t settingc = {0};
|
||||
cfga_t cfga = {0};
|
||||
cfgb_t cfgb = {0};
|
||||
cfgc_t cfgc = {0};
|
||||
|
||||
uint16_t save_mask = 0;
|
||||
uint16_t save_count = 0;
|
||||
uint16_t wmap_wait = 0;
|
||||
|
||||
|
||||
void store_init(void)
|
||||
{
|
||||
api_flash_read(ID_MAP2, (uint8_t *)¶m, sizeof(param));
|
||||
api_flash_read(ID_MAP3, (uint8_t *)&settinga.list, sizeof(settinga.list));
|
||||
api_flash_read(ID_MAP4, (uint8_t *)&settingb.list, sizeof(settingb.list));
|
||||
api_flash_read(ID_MAP5, (uint8_t *)&settingc.list, sizeof(settingc.list));
|
||||
|
||||
if(param.aa != LAMPTYPE)
|
||||
{
|
||||
api_flash_erase(ID_MAP2);
|
||||
store_clear_map(ID_MAP3);
|
||||
store_clear_map(ID_MAP4);
|
||||
store_clear_map(ID_MAP5);
|
||||
|
||||
f_memset((uint8_t *)¶m, 0xFF, sizeof(param));
|
||||
param.aa = LAMPTYPE;
|
||||
param.bb = init_bb;
|
||||
param.cc = init_aa;
|
||||
param.ca = configa;
|
||||
param.cb = configb;
|
||||
param.cd = configc;
|
||||
param.ce = configd;
|
||||
param.cf = confige;
|
||||
api_flash_write(ID_MAP2, (uint8_t *)¶m, sizeof(param));
|
||||
}
|
||||
|
||||
for(uint8_t i = 0; i < NUM_DEVICES; i++)
|
||||
{
|
||||
if(settinga.list[i].aa > 0 && settinga.list[i].aa < param.ce.a)
|
||||
{
|
||||
settinga.number++;
|
||||
}
|
||||
if(settingb.list[i].aa > 0 && settingb.list[i].aa < param.ce.a)
|
||||
{
|
||||
settingb.number++;
|
||||
}
|
||||
if(!f_chrcmp(settingc.list[i].addr, 0xFF, 4) && !f_chrcmp(settingc.list[i].addr, 0x00, 4))
|
||||
{
|
||||
settingc.number++;
|
||||
}
|
||||
}
|
||||
f_memset((uint8_t *)&cfga.list, 0xFF, sizeof(cfga.list));
|
||||
f_memset((uint8_t *)&cfgb.list, 0xFF, sizeof(cfgb.list));
|
||||
f_memset((uint8_t *)&cfgc.list, 0xFF, sizeof(cfgc.list));
|
||||
}
|
||||
|
||||
|
||||
void store_process_100ms(void)
|
||||
{
|
||||
if(save_mask & (1<<ID_MAP2))
|
||||
{
|
||||
save_mask &= ~(1<<ID_MAP2);
|
||||
api_flash_write(ID_MAP2, (uint8_t *)¶m, sizeof(param));
|
||||
}
|
||||
|
||||
if(wmap_wait > 0 && --wmap_wait == 0)
|
||||
{
|
||||
api_flash_write(ID_MAP5, (uint8_t *)&settingc.list, sizeof(settingc.list));
|
||||
}
|
||||
|
||||
if(++save_count >= 6000)
|
||||
{
|
||||
save_count = 0;
|
||||
if(save_mask & (1<<ID_MAP3))
|
||||
{
|
||||
save_mask &= ~(1<<ID_MAP3);
|
||||
api_flash_write(ID_MAP3, (uint8_t *)&settinga.list, sizeof(settinga.list));
|
||||
}
|
||||
if(save_mask & (1<<ID_MAP4))
|
||||
{
|
||||
save_mask &= ~(1<<ID_MAP4);
|
||||
api_flash_write(ID_MAP4, (uint8_t *)&settingb.list, sizeof(settingb.list));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void store_write_param(uint8_t type, uint8_t *data)
|
||||
{
|
||||
switch(type)
|
||||
{
|
||||
case PARAM1:
|
||||
save_mask |= (1<<ID_MAP2);
|
||||
break;
|
||||
case PARAM2:
|
||||
if(param.bb != data[0])
|
||||
{
|
||||
param.bb = data[0];
|
||||
save_mask |= (1<<ID_MAP2);
|
||||
}
|
||||
break;
|
||||
case PARAM3:
|
||||
if(param.cc != data[0])
|
||||
{
|
||||
param.cc = data[0];
|
||||
save_mask |= (1<<ID_MAP2);
|
||||
}
|
||||
break;
|
||||
case PARAM4:
|
||||
if(param.dd != data[0])
|
||||
{
|
||||
param.dd = data[0];
|
||||
save_mask |= (1<<ID_MAP2);
|
||||
}
|
||||
break;
|
||||
case PARAM5:
|
||||
if(!f_memcmp(param.ee, data, 4))
|
||||
{
|
||||
f_memcpy(param.ee, data, 4);
|
||||
save_mask |= (1<<ID_MAP2);
|
||||
}
|
||||
break;
|
||||
case PARAM6:
|
||||
if(!f_memcmp(param.ff, data, 4))
|
||||
{
|
||||
f_memcpy(param.ff, data, 4);
|
||||
save_mask |= (1<<ID_MAP2);
|
||||
}
|
||||
break;
|
||||
case PARAM7:
|
||||
if(!f_memcmp(param.gg, data, 12))
|
||||
{
|
||||
f_memcpy(param.gg, data, 12);
|
||||
api_flash_write(ID_MAP2, (uint8_t *)¶m, sizeof(param));
|
||||
}
|
||||
break;
|
||||
case PARAM8:
|
||||
if(!f_memcmp(param.ca.data, data, sizeof(param.ca)))
|
||||
{
|
||||
f_memcpy(param.ca.data, data, sizeof(param.ca));
|
||||
save_mask |= (1<<ID_MAP2);
|
||||
}
|
||||
break;
|
||||
case PARAM9:
|
||||
if(!f_memcmp(param.cb.data, data, 4))
|
||||
{
|
||||
f_memcpy(param.cb.data, data, 4);
|
||||
save_mask |= (1<<ID_MAP2);
|
||||
}
|
||||
break;
|
||||
case PARAM10:
|
||||
if(!f_memcmp(param.cd.data, data, 12))
|
||||
{
|
||||
f_memcpy(param.cd.data, data, 12);
|
||||
api_flash_write(ID_MAP2, (uint8_t *)¶m, sizeof(param));
|
||||
}
|
||||
break;
|
||||
case PARAM11:
|
||||
if(!f_memcmp(param.ce.data, data, 8))
|
||||
{
|
||||
f_memcpy(param.ce.data, data, 8);
|
||||
save_mask |= (1<<ID_MAP2);
|
||||
}
|
||||
break;
|
||||
case PARAM12:
|
||||
if(!f_memcmp(param.cf.data, data, 6))
|
||||
{
|
||||
f_memcpy(param.cf.data, data, 6);
|
||||
save_mask |= (1<<ID_MAP2);
|
||||
}
|
||||
break;
|
||||
case PARAM13:
|
||||
if(data[0] < 8 && !f_memcmp(param.cg[data[0]], data+1, 4))
|
||||
{
|
||||
f_memcpy(param.cg[data[0]], data+1, 4);
|
||||
save_mask |= (1<<ID_MAP2);
|
||||
}
|
||||
else if(data[0] >= 8)
|
||||
{
|
||||
f_memset((uint8_t *)¶m.cg, 0xFF, sizeof(param.cg));
|
||||
save_mask |= (1<<ID_MAP2);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
//Çå³ý±í
|
||||
void store_clear_map(uint8_t mapid)
|
||||
{
|
||||
switch(mapid)
|
||||
{
|
||||
case ID_MAP3:
|
||||
settinga.number = 0;
|
||||
if(!f_chrcmp((uint8_t *)&settinga.list, 0xFF, sizeof(settinga.list)))
|
||||
{
|
||||
api_flash_erase(ID_MAP3);
|
||||
f_memset((uint8_t *)&settinga.list, 0xFF, sizeof(settinga.list));
|
||||
}
|
||||
break;
|
||||
case ID_MAP4:
|
||||
settingb.number = 0;
|
||||
if(!f_chrcmp((uint8_t *)&settingb.list, 0xFF, sizeof(settingb.list)))
|
||||
{
|
||||
api_flash_erase(ID_MAP4);
|
||||
f_memset((uint8_t *)&settingb.list, 0xFF, sizeof(settingb.list));
|
||||
}
|
||||
break;
|
||||
case ID_MAP5:
|
||||
settingc.number = 0;
|
||||
if(!f_chrcmp((uint8_t *)&settingc.list, 0xFF, sizeof(settingc.list)))
|
||||
{
|
||||
api_flash_erase(ID_MAP5);
|
||||
f_memset((uint8_t *)&settingc.list, 0xFF, sizeof(settingc.list));
|
||||
}
|
||||
break;
|
||||
case ID_MAP7:
|
||||
cfgb.number = 0;
|
||||
f_memset((uint8_t *)&cfgb.list, 0xFF, sizeof(cfgb.list));
|
||||
break;
|
||||
case ID_MAP6:
|
||||
cfga.number = 0;
|
||||
f_memset((uint8_t *)&cfga.list, 0xFF, sizeof(cfga.list));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
//дÈë±í
|
||||
void store_write_map(uint8_t mapid, uint8_t *data)
|
||||
{
|
||||
save_mask |= (1<<mapid);
|
||||
switch(mapid)
|
||||
{
|
||||
case ID_MAP5:
|
||||
if(data[0] < NUM_DEVICES) {
|
||||
settingc.number = data[0]+1;
|
||||
f_memcpy((uint8_t *)&settingc.list[data[0]], data+1, 6);
|
||||
wmap_wait = 30;
|
||||
} else {
|
||||
store_clear_map(ID_MAP5);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void store_read_map(uint8_t mapid, uint8_t *data)
|
||||
{
|
||||
switch(mapid)
|
||||
{
|
||||
case ID_MAP3:
|
||||
if(data[0] < NUM_DEVICES) {
|
||||
f_memcpy(data+1, (uint8_t *)&settinga.list[data[0]], 8);
|
||||
}
|
||||
break;
|
||||
case ID_MAP4:
|
||||
if(data[0] < NUM_DEVICES) {
|
||||
f_memcpy(data+1, (uint8_t *)&settingb.list[data[0]], 8);
|
||||
}
|
||||
break;
|
||||
case ID_MAP5:
|
||||
if(data[0] < NUM_DEVICES) {
|
||||
f_memcpy(data+1, (uint8_t *)&settingc.list[data[0]], 6);
|
||||
}
|
||||
break;
|
||||
case ID_MAP6:
|
||||
if(data[0] < NUM_DEVICES) {
|
||||
f_memcpy(data+1, cfga.list[data[0]].addr, 4);
|
||||
data[5] = cfga.list[data[0]].a;
|
||||
data[6] = cfga.list[data[0]].b;
|
||||
data[7] = cfga.list[data[0]].c;
|
||||
data[8] = cfga.list[data[0]].d & 0xFF;
|
||||
data[9] = cfga.list[data[0]].d >> 8;
|
||||
data[10] = cfga.list[data[0]].e & 0xFF;
|
||||
data[11] = cfga.list[data[0]].e >> 8;
|
||||
}
|
||||
break;
|
||||
case ID_MAP7:
|
||||
if(data[0] < NUM_cfgb) {
|
||||
f_memcpy(data+1, (uint8_t *)&cfgb.list[data[0]], 8);
|
||||
}
|
||||
break;
|
||||
case ID_MAP8:
|
||||
if(data[0] < NUM_cfgc) {
|
||||
f_memcpy(data+1, (uint8_t *)&cfgc.list[data[0]], 5);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void store_setfl(uint8_t number)
|
||||
{
|
||||
store_clear_map(ID_MAP4);
|
||||
param.cb.a = 65535;
|
||||
param.cb.b = 65535;
|
||||
f_memset((uint8_t *)¶m.cg, 0xFF, sizeof(param.cg));
|
||||
for(uint8_t i = 0; i < number && number <= 8; i++)
|
||||
{
|
||||
f_memcpy(param.cg[i], settinga.list[i].addr, 4);
|
||||
}
|
||||
api_flash_write(ID_MAP2, (uint8_t *)¶m, sizeof(param));
|
||||
}
|
||||
@@ -0,0 +1,232 @@
|
||||
#include "uart.h"
|
||||
#include "xc_hal.h"
|
||||
#include "check.h"
|
||||
|
||||
|
||||
#define RAD_HEAD1 0xFA
|
||||
#define RAD_HEAD2 0x3C
|
||||
#define RAD_REAR1 0x3D
|
||||
#define RAD_REAR2 0xFB
|
||||
|
||||
#define TEST_HEAD1 0x2B
|
||||
#define TEST_HEAD2 0x2B
|
||||
#define TEST_REAR1 0xE4
|
||||
#define TEST_REAR2 0xC7
|
||||
|
||||
//数据协议类型
|
||||
#define TYPE_RAD 1
|
||||
#define TYPE_TEST 2
|
||||
|
||||
uint8_t port_txbuff[40] = {0};
|
||||
uint8_t port_rxdata[32] = {0};
|
||||
|
||||
volatile uint8_t rxcnt = 0;
|
||||
volatile uint8_t rxstat = 0;
|
||||
volatile uint8_t rxtype = 0;
|
||||
volatile uint8_t rxflag = 0;
|
||||
volatile uint8_t rxwait = 0;
|
||||
volatile uint8_t radar_wait = 0;
|
||||
|
||||
void uart_tick(void)
|
||||
{
|
||||
if(rxwait > 0 && --rxwait == 0)
|
||||
{
|
||||
rxstat = 0;
|
||||
}
|
||||
if(radar_wait > 0)
|
||||
{
|
||||
radar_wait--;
|
||||
}
|
||||
}
|
||||
|
||||
//端口接收中断
|
||||
void uart_rxbyte(uint8_t byte)
|
||||
{
|
||||
switch(rxstat)
|
||||
{
|
||||
case 0: //接收帧头1
|
||||
if(byte == RAD_HEAD1)
|
||||
{
|
||||
rxtype = TYPE_RAD;
|
||||
rxstat = 1;
|
||||
}
|
||||
else if(byte == TEST_HEAD1)
|
||||
{
|
||||
rxtype = TYPE_TEST;
|
||||
rxstat = 11;
|
||||
}
|
||||
break;
|
||||
case 1: //接收帧头2
|
||||
rxstat = (byte==RAD_HEAD2) ? 2 : 0;
|
||||
break;
|
||||
case 2:
|
||||
port_rxdata[0] = byte;
|
||||
rxstat = 3;
|
||||
break;
|
||||
case 3:
|
||||
rxstat = (byte==0) ? 4 : 0;
|
||||
break;
|
||||
case 4:
|
||||
rxcnt = 0;
|
||||
port_rxdata[1] = byte;
|
||||
rxstat = (byte!=0)?5:6;
|
||||
break;
|
||||
case 5:
|
||||
port_rxdata[2+rxcnt] = byte;
|
||||
if(++rxcnt >= port_rxdata[1] || rxcnt >= 30)
|
||||
{
|
||||
rxstat = 6;
|
||||
}
|
||||
break;
|
||||
case 6:
|
||||
rxstat = 7;
|
||||
break;
|
||||
case 7:
|
||||
rxstat = (byte==RAD_REAR1) ? 8 : 0;
|
||||
break;
|
||||
case 8:
|
||||
if(byte == RAD_REAR2)
|
||||
{
|
||||
rxflag = 1;
|
||||
}
|
||||
rxstat = 0;
|
||||
break;
|
||||
case 11:
|
||||
rxstat = (byte==TEST_HEAD2) ? 12 : 0;
|
||||
break;
|
||||
case 12:
|
||||
port_rxdata[0] = byte;
|
||||
rxstat = 13;
|
||||
break;
|
||||
case 13:
|
||||
rxcnt = 0;
|
||||
port_rxdata[1] = byte;
|
||||
rxstat = (byte!=0)?14:15;
|
||||
break;
|
||||
case 14:
|
||||
port_rxdata[2+rxcnt] = byte;
|
||||
if(++rxcnt >= port_rxdata[1])
|
||||
{
|
||||
rxstat = 15;
|
||||
}
|
||||
break;
|
||||
case 15:
|
||||
rxstat = (byte==TEST_REAR1) ? 16 : 0;
|
||||
break;
|
||||
case 16:
|
||||
if(byte == TEST_REAR2)
|
||||
{
|
||||
rxflag = 1;
|
||||
}
|
||||
rxstat = 0;
|
||||
break;
|
||||
}
|
||||
rxwait = 10;
|
||||
}
|
||||
|
||||
void uart_send(uint8_t *pdata, uint8_t type)
|
||||
{
|
||||
uint8_t txcnt = 0;
|
||||
|
||||
rxflag = 0;
|
||||
if(type == TYPE_RAD)
|
||||
{
|
||||
port_txbuff[txcnt++] = RAD_HEAD1;
|
||||
port_txbuff[txcnt++] = RAD_HEAD2;
|
||||
port_txbuff[txcnt++] = pdata[0];
|
||||
port_txbuff[txcnt++] = 0x00;
|
||||
port_txbuff[txcnt++] = pdata[1];
|
||||
for(uint8_t i = 0; i < pdata[1]; i++)
|
||||
{
|
||||
port_txbuff[txcnt++] = pdata[2+i];
|
||||
}
|
||||
port_txbuff[txcnt++] = CRC8_SAE(port_txbuff+2, pdata[1]+3);
|
||||
port_txbuff[txcnt++] = RAD_REAR1;
|
||||
port_txbuff[txcnt++] = RAD_REAR2;
|
||||
}
|
||||
else if(type == TYPE_TEST)
|
||||
{
|
||||
port_txbuff[txcnt++] = TEST_HEAD1;
|
||||
port_txbuff[txcnt++] = TEST_HEAD2;
|
||||
port_txbuff[txcnt++] = pdata[0];
|
||||
port_txbuff[txcnt++] = pdata[1];
|
||||
for(uint8_t i = 0; i < pdata[1]; i++)
|
||||
{
|
||||
port_txbuff[txcnt++] = pdata[2+i];
|
||||
}
|
||||
port_txbuff[txcnt++] = TEST_REAR1;
|
||||
port_txbuff[txcnt++] = TEST_REAR2;
|
||||
}
|
||||
hal_uart_send(port_txbuff, txcnt);
|
||||
}
|
||||
|
||||
uint8_t radcmd_map[] = {0x11, 0x12, 0xB3, 0x14, 0x15, 0x16, 0x17};
|
||||
uint8_t tstcmd_map[] = {0x01, 0x02, 0x03};
|
||||
|
||||
static uint8_t check_radcmd(uint8_t cmd)
|
||||
{
|
||||
for(uint8_t i = 0; i < sizeof(radcmd_map); i++)
|
||||
{
|
||||
if(cmd == radcmd_map[i])
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint8_t check_tstcmd(uint8_t cmd)
|
||||
{
|
||||
for(uint8_t i = 0; i < sizeof(tstcmd_map); i++)
|
||||
{
|
||||
if(cmd == tstcmd_map[i])
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
void uart_recv(void (*func)(uint8_t *, uint8_t))
|
||||
{
|
||||
if(rxflag != 0)
|
||||
{
|
||||
rxflag = 0;
|
||||
if(rxtype == TYPE_RAD && check_radcmd(port_rxdata[0]))
|
||||
{
|
||||
(*func)(port_rxdata, rxtype);
|
||||
if(port_rxdata[0] != 0x12)
|
||||
{
|
||||
uart_send(port_rxdata, TYPE_RAD);
|
||||
}
|
||||
}
|
||||
if(rxtype == TYPE_TEST && check_tstcmd(port_rxdata[0]))
|
||||
{
|
||||
(*func)(port_rxdata, rxtype);
|
||||
uart_send(port_rxdata, TYPE_TEST);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t uart_trx(uint8_t *txdata, uint8_t *rxdata)
|
||||
{
|
||||
uart_send(txdata, TYPE_RAD);
|
||||
|
||||
rxflag = 0;
|
||||
rxtype = 0;
|
||||
radar_wait = 200;
|
||||
while(radar_wait != 0)
|
||||
{
|
||||
if((rxflag != 0) && (rxtype == TYPE_RAD))
|
||||
{
|
||||
rxflag = 0;
|
||||
for(int i = 0; i < port_rxdata[1]+2; i++)
|
||||
{
|
||||
rxdata[i] = port_rxdata[i];
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
//rxflag = 0;
|
||||
return 0;
|
||||
}
|
||||
@@ -0,0 +1,11 @@
|
||||
#ifndef __UART_H
|
||||
#define __UART_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
extern void uart_tick(void);
|
||||
extern void uart_recv(void (*func)(uint8_t *, uint8_t));
|
||||
extern void uart_rxbyte(uint8_t data);
|
||||
extern uint8_t uart_trx(uint8_t *txdata, uint8_t *rxdata);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,690 @@
|
||||
#include "xc_24g_register.h"
|
||||
#include "xc60xx.h"
|
||||
#include "xc_24g.h"
|
||||
|
||||
static volatile uint8_t nrf_tx_status = 0; //发送完成中断
|
||||
|
||||
//定义接收队列
|
||||
uint8_t rxfifo[8][RF_BUFF_LEN+2]; //包含1RSSI+1字节包长度
|
||||
uint8_t rxread = 0, rxwrite = 0;
|
||||
|
||||
//定义RF配置
|
||||
struct _rf_cfg_t
|
||||
{
|
||||
uint16_t tx_chan; //发射信道
|
||||
uint16_t rx_chan; //接收信道
|
||||
uint32_t tx_addr; //发射地址
|
||||
uint32_t rx_addr; //接收地址
|
||||
}rf_cfg = { RF_BLE_CHN37, RF_BLE_CHN37, RF_BLE_ADDR, RF_BLE_ADDR };
|
||||
|
||||
static void nop_cnt(uint32_t cnt)
|
||||
{
|
||||
for (uint32_t i = 0; i < cnt; i++)
|
||||
__nop();
|
||||
}
|
||||
|
||||
static void nrf_rc_calib(void)
|
||||
{
|
||||
static uint8_t calib_flag = false;
|
||||
if (calib_flag)
|
||||
return;
|
||||
|
||||
uint16_t r_val = 0;
|
||||
XC_BT_RF->rccal_reg_l &= ~(0x7 << 8);
|
||||
XC_BT_RF->rccal_reg_l |= (0x5 << 8);
|
||||
delay_us(20);
|
||||
XC_BT_RF->rccal_reg_l |= (0x1 << 5); //RG_RCCAL_RESETN = 1
|
||||
delay_us(20);
|
||||
XC_BT_RF->rccal_reg_l &= ~(0x1 << 3); //RG_RCCAL_SEL = 0
|
||||
delay_us(20);
|
||||
XC_BT_RF->rccal_reg_l |= (0x1 << 2); //RG_RCCAL_EN = 1
|
||||
delay_us(02);
|
||||
XC_BT_RF->rccal_reg_l |= (0x1 << 4); //RG_RCCAL_START = 1
|
||||
delay_us(20);
|
||||
r_val = XC_BT_RF->rccal_rslt_l;
|
||||
// Waiting for AD_RCCAL_FINISH raises the calibration value AD_RCCAL_
|
||||
while (!(r_val & 0x8000)) { r_val = XC_BT_RF->rccal_rslt_l; }
|
||||
r_val = (XC_BT_RF->rccal_rslt_l & 0x7FFF) >> 10;
|
||||
XC_BT_RF->rccal_reg_l |= (0x1 << 3); //RG_RCCAL_SEL = 1
|
||||
XC_BT_RF->rccal_reg_l &= ~(0x1 << 2); //RG_RCCAL_EN = 0
|
||||
XC_BT_RF->rccal_reg_l &= ~(0x1 << 4); //RG_RCCAL_START = 0
|
||||
XC_BT_RF->rccal_reg_l &= ~(0x1F << 11);
|
||||
XC_BT_RF->rccal_reg_l |= r_val << 11;
|
||||
calib_flag = true;
|
||||
}
|
||||
|
||||
static void rf_freq_ctune(uint8_t val)
|
||||
{
|
||||
uint32_t value = cprao_aon_rf_aonreg_get();
|
||||
cprao_aon_rf_aonreg_set((value & (~(0x3f << 20))) | ((val & 0x3f) << 20));
|
||||
}
|
||||
|
||||
static void rf_reset(void)
|
||||
{
|
||||
uint32_t value = cpr_rf_reg1_get();
|
||||
cpr_rf_reg1_set(value & ~(1 << 21));
|
||||
delay_ms(2);
|
||||
cpr_rf_reg1_set(value | (1 << 21));
|
||||
delay_ms(1);
|
||||
}
|
||||
|
||||
static void nrf_modem_init(void)
|
||||
{
|
||||
cpr_bt_clk_ctl__bt_clk_en__setf(ENABLE); //BT_CLK clock control register
|
||||
cpr_bt_modem_clk_ctl__bt_modem_clk_en__setf(ENABLE); //BT_MODEM_CLK clock control register
|
||||
cpr_ctlapbclken_grctl__bt_pclk_en__setf(ENABLE); //Configure BT_PCLK_EN enable
|
||||
cprao_aon_coreldo_en_set(ENABLE);
|
||||
XC_BT_RF->ana18_reg_l &= ~((0x7 << 3) | (0x7));
|
||||
XC_BT_RF->ana18_reg_l |= (0x1 << 3);
|
||||
}
|
||||
|
||||
static void nrf_24g_config(void)
|
||||
{
|
||||
// Set sel_24G_rfchan, sel_24G_rfldoen, sel_24G_rampout regs to use 2.4G signal
|
||||
XC_BT_RF->BT.rx_ctrl_sel_l |= 0xE000;
|
||||
|
||||
#if (XINCX_RF_RATE == RATE_1M)
|
||||
XC_BT_RF->ana21_reg_l = (XC_BT_RF->ana21_reg_l & (0xFFFF8FFF)) | 0x3000;
|
||||
#elif (XINCX_RF_RATE == DR_2M)
|
||||
XC_BT_RF->ana21_reg_l = (XC_BT_RF->ana21_reg_l & (0xFFFF8FFF)) | 0x2000;
|
||||
XC_BT_RF->ana3_reg_l |= 0x01;
|
||||
#else
|
||||
XC_BT_RF->ana21_reg_l = (XC_BT_RF->ana21_reg_l & (0xFFFF8FFF)) | 0x6000;
|
||||
#endif
|
||||
|
||||
XC_BT_RF->ana29_reg_l |= 0x02; // Manual afc
|
||||
XC_BT_RF->ana28_reg_l |= 0x01; // Afc pulse
|
||||
|
||||
rf_reset(); //reset
|
||||
// enable 2.4G_mclk 2.4G_hclk 2div of 32MHz
|
||||
cpr_rf_reg1__rf24g_mclk_div__setf(1);
|
||||
cpr_rf_reg1__rf24g_hclk_en__setf(ENABLE);
|
||||
cpr_rf_reg1__rf24g_mclk_en__setf(ENABLE);
|
||||
// set 2.4G agc and iq from 2.4 modem
|
||||
cpr_rf_reg0__sel__24g_agc__setf(ENABLE);
|
||||
cpr_rf_reg0__sel__24g_hwpin__setf(ENABLE);
|
||||
|
||||
*BLE_COMN_RF24G_CTRL |= 0x700;
|
||||
|
||||
XC_BT_RF->BT.rf_ctrl1_l |= (1 << 13);
|
||||
XC_BT_RF->BT.rf_ctrl1_l &= ~(1 << 12);
|
||||
XC_BT_RF->ana2_reg_l &= ~((0xf << 5) | (0x7 << 13));
|
||||
XC_BT_RF->ana2_reg_l |= (0x9 << 5) | (0x3 << 13);
|
||||
}
|
||||
|
||||
static void nrf_set_dynpd(uint8_t dynpd)
|
||||
{
|
||||
XC_RF_2_4G->DYNPD = dynpd;
|
||||
}
|
||||
|
||||
static void nrf_set_feature(uint8_t long_pld, uint8_t fec, uint8_t whiten, uint8_t dpl, uint8_t ack_pay, uint8_t dyn_ack)
|
||||
{
|
||||
XC_RF_2_4G->FEATURE = (XC_RF_2_4G->FEATURE & (~0x3f)) | (long_pld << 5) | (fec << 4) | (whiten << 3) | (dpl << 2) | (ack_pay << 1) | dyn_ack;
|
||||
}
|
||||
|
||||
static void nrf_set_compatility_featue(uint8_t guard_cfg, uint8_t long_pld_type, uint8_t preamble_num, uint8_t preamble_type,
|
||||
uint8_t crc_scope_header, uint8_t crc_scope_addr)
|
||||
{
|
||||
XC_RF_2_4G->FEATURE = (XC_RF_2_4G->FEATURE & ~(0xff<<8)) | (guard_cfg << 15) | (long_pld_type << 14) | (preamble_num << 12) |
|
||||
(preamble_type << 11) | (crc_scope_header << 9) | (crc_scope_addr << 8);
|
||||
}
|
||||
|
||||
static void nrf_set_preamble(uint32_t preamble_word)
|
||||
{
|
||||
if(XC_RF_2_4G->FEATURE & ~(1 << 11))
|
||||
{
|
||||
XC_RF_2_4G->PREAMBLE = preamble_word;
|
||||
}
|
||||
}
|
||||
|
||||
static void nrf_set_guard_word(uint16_t guard_word)
|
||||
{
|
||||
XC_RF_2_4G->GUARD = guard_word;
|
||||
}
|
||||
|
||||
static void nrf_set_cfg_top(void)
|
||||
{
|
||||
#if (XINCX_RF_RATE == RATE_2M)
|
||||
XC_RF_2_4G->CFG_TOP = (XC_RF_2_4G->CFG_TOP & (~0x1ffff3)) | 0x1b8672;
|
||||
#else
|
||||
XC_RF_2_4G->CFG_TOP = (XC_RF_2_4G->CFG_TOP & (~0x1ffff3)) | 0x0b8272;
|
||||
#endif
|
||||
}
|
||||
|
||||
static void nrf_set_crc(uint8_t enable, uint8_t crc_bit)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
if (crc_bit == CRC_1BIT)
|
||||
{
|
||||
XC_RF_2_4G->CFG_TOP = (XC_RF_2_4G->CFG_TOP & (~0x0c)) | (2 << 2);
|
||||
}
|
||||
else
|
||||
{
|
||||
XC_RF_2_4G->CFG_TOP = (XC_RF_2_4G->CFG_TOP & (~0x0c)) | (3 << 2);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
XC_RF_2_4G->CFG_TOP = (XC_RF_2_4G->CFG_TOP & (~0x0c)) | (1 << 2);
|
||||
}
|
||||
}
|
||||
|
||||
static void nrf_set_retr(uint8_t cnt, uint8_t delay)
|
||||
{
|
||||
XC_RF_2_4G->SETUP_RETR = cnt | (delay << 4);
|
||||
}
|
||||
|
||||
static void nrf_set_enaa(uint8_t enaa)
|
||||
{
|
||||
XC_RF_2_4G->EN_AA = (enaa << 0) | (enaa << 1) | (enaa << 2) | (enaa << 3) | (enaa << 4) | (enaa << 5);
|
||||
}
|
||||
|
||||
static void nrf_set_txaddr_width(uint8_t bytes)
|
||||
{
|
||||
switch (bytes)
|
||||
{
|
||||
case 3:
|
||||
XC_RF_2_4G->SETUP_AW = 0xa5;
|
||||
break;
|
||||
case 4:
|
||||
XC_RF_2_4G->SETUP_AW = 0xaa;
|
||||
break;
|
||||
case 5:
|
||||
XC_RF_2_4G->SETUP_AW = 0xaf;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void nrf_set_txaddr(uint32_t addr_l, uint32_t addr_h)
|
||||
{
|
||||
XC_RF_2_4G->TX_ADDR_L = addr_l;
|
||||
XC_RF_2_4G->TX_ADDR_H = (XC_RF_2_4G->TX_ADDR_H & 0xFF00) | (addr_h & 0xFF);
|
||||
}
|
||||
|
||||
static void nrf_set_rxaddr(uint32_t addr_l, uint32_t addr_h)
|
||||
{
|
||||
XC_RF_2_4G->RX_ADDR_P0_L = addr_l;
|
||||
XC_RF_2_4G->RX_ADDR_P0_H = addr_h & 0xff;
|
||||
}
|
||||
|
||||
static void nrf_set_rxlen(uint8_t len)
|
||||
{
|
||||
XC_RF_2_4G->RX_PW_Px_L = len | (0 << 8) | (0 << 16) | (0 << 24);
|
||||
XC_RF_2_4G->RX_PW_Px_H = 0 | (0 << 8);
|
||||
}
|
||||
|
||||
static void nrf_set_data_rate(uint8_t rate)
|
||||
{
|
||||
XC_RF_2_4G->SETUP_RF = rate;
|
||||
}
|
||||
|
||||
static void nrf_rssi_init(void)
|
||||
{
|
||||
uint8_t agc_map[5] = {0x44, 0x3a, 0x30, 0x26, 0x1c};
|
||||
|
||||
XC_RF_2_4G->RSSI = 1 << 6; //使能
|
||||
XC_RF_2_4G->AGC_SETTING &= ~(0xf << 16);
|
||||
XC_RF_2_4G->AGC_SETTING |= (2 << 16);
|
||||
delay_us(1);
|
||||
XC_RF_2_4G->PGA_SETTING = agc_map[0] | (agc_map[1] << 8) | (agc_map[2] << 16) | (agc_map[3] << 24);
|
||||
XC_RF_2_4G->TX_ADDR_H &= ~(0xFF << 8);
|
||||
XC_RF_2_4G->TX_ADDR_H |= (agc_map[4] << 8);
|
||||
}
|
||||
|
||||
//计算RSSI
|
||||
static uint8_t nrf_get_rssi(void)
|
||||
{
|
||||
int16_t rssi_dbm = 0;
|
||||
int16_t esti_dbm = (XC_RF_2_4G->RSSI >> 16) & 0xfff;
|
||||
uint16_t agc_gain = (XC_RF_2_4G->RSSI >> 8) & 0x7f;
|
||||
uint16_t agc = ((agc_gain >> 4) + 1) * 6 + (agc_gain & 0xf) * 2;
|
||||
|
||||
uint8_t loca_agc = (XC_RF_2_4G->PGA_SETTING >> 24) & 0xff;
|
||||
|
||||
if (loca_agc == agc) {
|
||||
rssi_dbm = ((esti_dbm * 100) / 16 - (87 + agc + 10) * 100) / 100;
|
||||
} else {
|
||||
rssi_dbm = ((esti_dbm * 100) / 16 - (87 + agc) * 100) / 100;
|
||||
}
|
||||
if (rssi_dbm <= (-90)) {
|
||||
rssi_dbm = rssi_dbm - (90 + rssi_dbm) / 2 - (90 + rssi_dbm) % 2;
|
||||
} else if ((rssi_dbm <= (-80)) && (rssi_dbm > (-90))) {
|
||||
rssi_dbm = rssi_dbm - (80 + rssi_dbm) / 2 - (80 + rssi_dbm) % 2;
|
||||
} else if ((rssi_dbm <= (-70)) && (rssi_dbm > (-80))) {
|
||||
rssi_dbm = rssi_dbm - (70 + rssi_dbm) / 2 - (70 + rssi_dbm) % 2;
|
||||
} else if ((rssi_dbm <= (-60)) && (rssi_dbm > (-70))) {
|
||||
rssi_dbm = rssi_dbm - (60 + rssi_dbm) / 2 - (60 + rssi_dbm) % 2;
|
||||
} else if ((rssi_dbm <= (-50)) && (rssi_dbm > (-60))) {
|
||||
rssi_dbm = rssi_dbm - (50 + rssi_dbm) / 2 - (50 + rssi_dbm) % 2;
|
||||
} else if (rssi_dbm <= (-40)) {
|
||||
rssi_dbm = rssi_dbm - (40 + rssi_dbm) / 2 - (40 + rssi_dbm) % 2;
|
||||
}
|
||||
return (uint8_t)(-rssi_dbm);
|
||||
}
|
||||
|
||||
void nrf_set_power(uint8_t tx_pwr)
|
||||
{
|
||||
XC_BT_RF->ana21_reg_l = (XC_BT_RF->ana21_reg_l & (~0xfc0)) | ((tx_pwr & 0x3f) << 6);
|
||||
XC_RF_2_4G->RF_CH = (XC_RF_2_4G->RF_CH & (~0x3f0000)) | (tx_pwr << 16);
|
||||
}
|
||||
|
||||
void nrf_set_channel(uint16_t channel)
|
||||
{
|
||||
#if (XINCX_RF_RATE == RATE_2M)
|
||||
XC_RF_2_4G->RF_CH = ((XC_RF_2_4G->CFG_TOP & 0x01) ? (channel - 2) : channel);
|
||||
#else
|
||||
XC_RF_2_4G->RF_CH = ((XC_RF_2_4G->CFG_TOP & 0x01) ? (channel - 1) : channel);
|
||||
#endif
|
||||
delay_us(2);
|
||||
XC_BT_RF->ana28_reg_l &= (~0x1); // Afc pulse
|
||||
delay_us(2);
|
||||
XC_BT_RF->ana28_reg_l |= 0x1; // Afc pulse
|
||||
delay_us(2);
|
||||
}
|
||||
|
||||
//L: standby, H: tx/rx mode
|
||||
#define NRF_CE_H (XC_RF_2_4G->CFG_TOP |= 0x4000)
|
||||
#define NRF_CE_L (XC_RF_2_4G->CFG_TOP &= ~0x4000)
|
||||
|
||||
void nrf_set_mode(uint8_t mode)
|
||||
{
|
||||
NRF_CE_L; //standby
|
||||
if(mode == TX_MODE)
|
||||
{
|
||||
XC_RF_2_4G->CFG_TOP &= ~0x01;
|
||||
XC_RF_2_4G->TX_ADDR_L = rf_cfg.tx_addr; //设置发射地址
|
||||
nrf_set_channel(rf_cfg.tx_chan); //设置发射信道
|
||||
}
|
||||
else if(mode == RX_MODE)
|
||||
{
|
||||
XC_RF_2_4G->CFG_TOP |= 0x01;
|
||||
XC_RF_2_4G->RX_ADDR_P0_L = rf_cfg.rx_addr; //设置接收地址
|
||||
nrf_set_channel(rf_cfg.rx_chan); //设置接收信道
|
||||
}
|
||||
NRF_CE_H; //trx mode
|
||||
}
|
||||
|
||||
__RAM_CODE uint8_t nrf_tx_event(uint8_t *buff, uint8_t len)
|
||||
{
|
||||
uint8_t sucess = 0;
|
||||
uint8_t timeout = 200; //2ms超时
|
||||
|
||||
nrf_tx_status = 0;
|
||||
__disable_irq();
|
||||
nrf_set_mode(TX_MODE); //设置发射模式
|
||||
XC_RF_2_4G->CMD_CFG = CMD_DONE | FLUSH_TX; //清除TX_FIFO
|
||||
XC_RF_2_4G->STATUS |= MASK_ALL_INTER; //清除所有中断
|
||||
for (uint8_t i = 0; i < SEND_CMD_CNT; i++)
|
||||
XC_RF_2_4G->CMD_CFG = CMD_DONE | W_TX_PLOAD;
|
||||
for (uint8_t i = 0; i < len; i++)
|
||||
XC_RF_2_4G->TX_FIFO_DATA = buff[i];
|
||||
delay_us(100);
|
||||
//等待发送完成
|
||||
while(timeout--)
|
||||
{
|
||||
delay_us(10);
|
||||
if((XC_RF_2_4G->STATUS & MASK_TX_DS) || (nrf_tx_status & MASK_TX_DS)) //发送完成
|
||||
{
|
||||
sucess = 1; //发送成功
|
||||
break;
|
||||
}
|
||||
else if((XC_RF_2_4G->STATUS & MASK_MAX_RT) || (nrf_tx_status & MASK_MAX_RT)) //到达最大重发次数
|
||||
{
|
||||
sucess = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
__enable_irq();
|
||||
XC_RF_2_4G->CMD_CFG = CMD_DONE | FLUSH_TX; //清除TX_FIFO
|
||||
XC_RF_2_4G->CMD_CFG = CMD_DONE | FLUSH_RX; //清空RX_FIFO
|
||||
//XC_RF_2_4G->STATUS |= MASK_TX_DS | MASK_MAX_RT;
|
||||
XC_RF_2_4G->STATUS |= MASK_ALL_INTER; //清除所有中断
|
||||
nrf_set_mode(RX_MODE); //设置接收模式
|
||||
|
||||
return sucess;
|
||||
}
|
||||
|
||||
__RAM_CODE uint8_t nrf_rx_event(uint8_t *buff, uint8_t *rssi)
|
||||
{
|
||||
uint8_t length = 0;
|
||||
|
||||
if (XC_RF_2_4G->STATUS & MASK_RX_DR) //接收到有效数据
|
||||
{
|
||||
XC_RF_2_4G->CMD_CFG = CMD_DONE | R_RX_PL_WID;
|
||||
length = XC_RF_2_4G->RX_FIFO_LEN & 0xff; //读接收长度
|
||||
if(length != 0)
|
||||
{
|
||||
for (uint8_t i = 0; i < RECV_CMD_CNT; i++)
|
||||
{
|
||||
nop_cnt(16);
|
||||
XC_RF_2_4G->CMD_CFG = CMD_DONE | R_RX_PLOAD;
|
||||
nop_cnt(16);
|
||||
}
|
||||
for (uint8_t i = 0; i < length; i++)
|
||||
{
|
||||
buff[i] = XC_RF_2_4G->RX_FIFO_DATA;
|
||||
}
|
||||
*rssi = nrf_get_rssi();
|
||||
}
|
||||
XC_RF_2_4G->CMD_CFG = CMD_DONE | FLUSH_RX; //清空RX_FIFO
|
||||
XC_RF_2_4G->STATUS |= MASK_RX_DR; //清空接收中断
|
||||
}
|
||||
return length;
|
||||
}
|
||||
|
||||
extern void rf_24g_handle(void); //测试接收中断
|
||||
|
||||
uint32_t regmap[32];
|
||||
void readreg(void)
|
||||
{
|
||||
uint8_t index = 0;
|
||||
|
||||
regmap[index++] = XC_RF_2_4G->CFG_TOP;
|
||||
regmap[index++] = XC_RF_2_4G->EN_AA;
|
||||
regmap[index++] = XC_RF_2_4G->EN_RXADDR;
|
||||
regmap[index++] = XC_RF_2_4G->SETUP_AW;
|
||||
regmap[index++] = XC_RF_2_4G->SETUP_RETR;
|
||||
regmap[index++] = XC_RF_2_4G->RF_CH;
|
||||
regmap[index++] = XC_RF_2_4G->SETUP_RF;
|
||||
regmap[index++] = XC_RF_2_4G->STATUS;
|
||||
regmap[index++] = XC_RF_2_4G->OBSERVE_TX; //
|
||||
regmap[index++] = XC_RF_2_4G->RSSI;
|
||||
regmap[index++] = XC_RF_2_4G->RX_ADDR_P0_H;
|
||||
regmap[index++] = XC_RF_2_4G->RX_ADDR_P0_L;
|
||||
regmap[index++] = XC_RF_2_4G->RX_ADDR_P1_H;
|
||||
regmap[index++] = XC_RF_2_4G->RX_ADDR_P1_L;
|
||||
regmap[index++] = XC_RF_2_4G->RX_ADDR_P2TOP5;
|
||||
regmap[index++] = XC_RF_2_4G->BER_ERR_CNT;
|
||||
regmap[index++] = XC_RF_2_4G->BER_RECV_CNT;
|
||||
regmap[index++] = XC_RF_2_4G->AGC_SETTING;
|
||||
regmap[index++] = XC_RF_2_4G->TX_ADDR_H;
|
||||
regmap[index++] = XC_RF_2_4G->TX_ADDR_L;
|
||||
regmap[index++] = XC_RF_2_4G->PGA_SETTING;
|
||||
regmap[index++] = XC_RF_2_4G->RX_PW_Px_H;
|
||||
regmap[index++] = XC_RF_2_4G->RX_PW_Px_L;
|
||||
regmap[index++] = XC_RF_2_4G->STATUS_FIFO;
|
||||
regmap[index++] = XC_RF_2_4G->RSSIREC; //
|
||||
regmap[index++] = XC_RF_2_4G->TXPROC_CFG;
|
||||
regmap[index++] = XC_RF_2_4G->RXPROC_CFG_H;
|
||||
regmap[index++] = XC_RF_2_4G->RXPROC_CFG_L;
|
||||
regmap[index++] = XC_RF_2_4G->DYNPD;
|
||||
regmap[index++] = XC_RF_2_4G->FEATURE;
|
||||
}
|
||||
|
||||
//接收中断
|
||||
__RAM_CODE void RF24G_Handler(void)
|
||||
{
|
||||
// NRF_CE_L;
|
||||
if(XC_RF_2_4G->STATUS & MASK_RX_DR) //接收中断
|
||||
{
|
||||
rf_24g_handle();
|
||||
|
||||
rxfifo[rxwrite][1] = nrf_rx_event(rxfifo[rxwrite]+2, rxfifo[rxwrite]);
|
||||
if(rxfifo[rxwrite][1] == RF_BUFF_LEN)
|
||||
{
|
||||
if(((rxwrite + 1) & 7) == rxread)
|
||||
{
|
||||
rxread = (rxread + 1) & 7;
|
||||
}
|
||||
rxwrite = (rxwrite + 1) & 7;
|
||||
}
|
||||
XC_RF_2_4G->STATUS |= MASK_RX_DR;
|
||||
}
|
||||
if(XC_RF_2_4G->STATUS & (MASK_TX_DS|MASK_MAX_RT)) //发射中断
|
||||
{
|
||||
nrf_tx_status = XC_RF_2_4G->STATUS;
|
||||
XC_RF_2_4G->CMD_CFG = CMD_DONE | FLUSH_TX;
|
||||
XC_RF_2_4G->STATUS |= MASK_TX_DS|MASK_MAX_RT;
|
||||
}
|
||||
nop_cnt(4);
|
||||
|
||||
}
|
||||
|
||||
void nrf_24g_init(uint32_t addr, uint16_t chan)
|
||||
{
|
||||
rf_cfg.tx_addr = addr;
|
||||
rf_cfg.rx_addr = addr;
|
||||
rf_cfg.tx_chan = chan;
|
||||
rf_cfg.rx_chan = chan;
|
||||
|
||||
/* Rf modem init*/
|
||||
nrf_modem_init();
|
||||
/* Set up 2.4G RF modem*/
|
||||
nrf_24g_config();
|
||||
/* Set up crystal oscillator capacitor array */
|
||||
rf_freq_ctune(XINCX_RF_CRY_CPT_ARRAY);
|
||||
/* Set up dynamic load */
|
||||
nrf_set_dynpd(XINCX_RF_DYNPD);
|
||||
/* Set retransmission delay and retransmission frequency */
|
||||
nrf_set_retr(XINCX_RF_ARC, XINCX_RF_ARD);
|
||||
/* Set address width */
|
||||
nrf_set_txaddr_width(XINCX_RF_TX_ADDR_WIDTH);
|
||||
/* Set PTX address */
|
||||
nrf_set_txaddr(RF_BLE_ADDR, XINCX_RF_ADDR_H);
|
||||
/* Set PRX address */
|
||||
nrf_set_rxaddr(RF_BLE_ADDR, XINCX_RF_ADDR_H);
|
||||
/* Set transfer rate */
|
||||
nrf_set_data_rate(XINCX_RF_RATE);
|
||||
/* Set CFG_TOP */
|
||||
nrf_set_cfg_top();
|
||||
/* Set CRC */
|
||||
nrf_set_crc(XINCX_RF_CRC_ENABLE, XINCX_RF_CRC_BYTE);
|
||||
/* Set data frame format */
|
||||
nrf_set_feature(XINCX_RF_LONG_PLD, XINCX_RF_FEC, XINCX_RF_WHITEN, XINCX_RF_DPL, XINCX_RF_ACK_PAY,
|
||||
XINCX_RF_DYN_ACK);
|
||||
nrf_set_compatility_featue(XINCX_RF_GUARD_CFG, XINCX_RF_LONG_PLD_TYPE, XINCX_RF_PREAMBLE_NUM,
|
||||
XINCX_RF_PREAMBLE_TYPE, XINCX_RF_CRC_SCOPE_HEADER, XINCX_RF_CRC_SCOPE_ADDR);
|
||||
/* Set the leading code */
|
||||
nrf_set_preamble(XINCX_RF_PREAMBLE);
|
||||
/* Set guard field */
|
||||
nrf_set_guard_word(XINCX_RF_GUARD);
|
||||
/* Set Payload */
|
||||
nrf_set_rxlen(XINCX_RF_PIPE_LEN);
|
||||
/*Set ack pipe*/
|
||||
nrf_set_enaa(XINCX_RF_PIPE_ENAA);
|
||||
/* RC filtering calibration */
|
||||
nrf_rc_calib();
|
||||
|
||||
nrf_set_power(XINCX_RF_POWER); //设置功率
|
||||
nrf_set_mode(RX_MODE); //设置接收模式
|
||||
|
||||
nrf_rssi_init();
|
||||
|
||||
#if (1 == XINCX_RF_NVIC_MODE)
|
||||
NVIC_EnableIRQ(RF24G_IRQn); //开启中断
|
||||
#endif
|
||||
}
|
||||
|
||||
//蓝牙模式初始化
|
||||
void nrf_ble_init(uint32_t addr, uint16_t chan)
|
||||
{
|
||||
rf_cfg.tx_addr = addr;
|
||||
rf_cfg.rx_addr = addr;
|
||||
rf_cfg.tx_chan = chan;
|
||||
rf_cfg.rx_chan = chan;
|
||||
|
||||
/* Rf modem init*/
|
||||
nrf_modem_init();
|
||||
/* Set up 2.4G RF modem*/
|
||||
nrf_24g_config();
|
||||
nrf_set_dynpd(XINCX_RF_DYNPD);
|
||||
/* Set PTX address */
|
||||
nrf_set_txaddr(RF_BLE_ADDR, XINCX_RF_ADDR_H);
|
||||
/* Set PRX address */
|
||||
nrf_set_rxaddr(RF_BLE_ADDR, XINCX_RF_ADDR_H);
|
||||
/* Set address width */
|
||||
nrf_set_txaddr_width(XINCX_RF_TX_ADDR_WIDTH);
|
||||
/* Set transfer rate */
|
||||
nrf_set_data_rate(XINCX_RF_RATE);
|
||||
/* Set CFG_TOP */
|
||||
nrf_set_cfg_top();
|
||||
/* Set CRC */
|
||||
nrf_set_crc(XINCX_RF_CRC_ENABLE, XINCX_RF_CRC_BYTE);
|
||||
/* Set data frame format */
|
||||
nrf_set_feature(XINCX_RF_LONG_PLD, XINCX_RF_FEC, XINCX_RF_WHITEN,
|
||||
XINCX_RF_DPL, XINCX_RF_ACK_PAY, XINCX_RF_DYN_ACK);
|
||||
/* Set Payload */
|
||||
nrf_set_rxlen(XINCX_RF_PIPE_LEN);
|
||||
/*Set ack pipe*/
|
||||
nrf_set_enaa(XINCX_RF_PIPE_ENAA);
|
||||
/* RC filtering calibration */
|
||||
nrf_rc_calib();
|
||||
|
||||
//XC_RF_2_4G->TXPROC_CFG = (XC_RF_2_4G->TXPROC_CFG & (~0xFF)) | 0xEE;
|
||||
|
||||
nrf_rssi_init();
|
||||
|
||||
nrf_set_power(XINCX_RF_POWER); //设置功率
|
||||
nrf_set_mode(RX_MODE); //设置接收模式
|
||||
|
||||
#if (1 == XINCX_RF_NVIC_MODE) //开启中断
|
||||
NVIC_EnableIRQ(RF24G_IRQn);
|
||||
#endif
|
||||
}
|
||||
|
||||
/********************************* 伪蓝牙白化及CRC校验 ***************************************/
|
||||
//字节高地位反转
|
||||
static uint8_t reverseBits(uint8_t input)
|
||||
{
|
||||
uint8_t temp = 0;
|
||||
if(input & 0x80) temp |= 0x01;
|
||||
if(input & 0x40) temp |= 0x02;
|
||||
if(input & 0x20) temp |= 0x04;
|
||||
if(input & 0x10) temp |= 0x08;
|
||||
if(input & 0x08) temp |= 0x10;
|
||||
if(input & 0x04) temp |= 0x20;
|
||||
if(input & 0x02) temp |= 0x40;
|
||||
if(input & 0x01) temp |= 0x80;
|
||||
return temp;
|
||||
}
|
||||
|
||||
//白化
|
||||
static void ble_whiten(uint8_t *data, uint8_t len, uint16_t freq)
|
||||
{
|
||||
uint8_t chan = (freq == RF_BLE_CHN38) ? 38 : ((freq == RF_BLE_CHN37) ? 37 : 39);
|
||||
uint8_t coeff = reverseBits(chan) | 2;
|
||||
|
||||
for (uint8_t i = 0; i < len; i++)
|
||||
{
|
||||
for (uint8_t m = 1; m; m <<= 1)
|
||||
{
|
||||
if (coeff & 0x80)
|
||||
{
|
||||
coeff ^= 0x11;
|
||||
data[i] ^= m;
|
||||
}
|
||||
coeff <<= 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//计算CRC
|
||||
static void ble_crc(uint8_t *data, uint8_t len, uint8_t *dst)
|
||||
{
|
||||
dst[0] = dst[1] = dst[2] = 0x55;
|
||||
|
||||
uint8_t temp, tempData;
|
||||
for (uint8_t i = 0; i < len; i++)
|
||||
{
|
||||
tempData = data[i];
|
||||
for (uint8_t b = 0; b < 8; b++, tempData >>= 1)
|
||||
{
|
||||
temp = dst[0] >> 7;
|
||||
dst[0] <<= 1;
|
||||
if (dst[1] & 0x80) {
|
||||
dst[0] |= 1;
|
||||
}
|
||||
dst[1] <<= 1;
|
||||
if (dst[2] & 0x80) {
|
||||
dst[1] |= 1;
|
||||
}
|
||||
dst[2] <<= 1;
|
||||
if (temp != (tempData & 1)) {
|
||||
dst[2] ^= 0x5B;
|
||||
dst[1] ^= 0x06;
|
||||
}
|
||||
}
|
||||
}
|
||||
dst[2] = reverseBits(dst[2]);
|
||||
dst[1] = reverseBits(dst[1]);
|
||||
dst[0] = reverseBits(dst[0]);
|
||||
}
|
||||
|
||||
uint8_t ble_buff[RF_BUFF_LEN]; //BLE数据包
|
||||
|
||||
//发送数据
|
||||
//type: 0-EMN数据包，1-BLE广播包
|
||||
uint8_t nrf_ble_send(uint8_t *data, uint8_t txlen)
|
||||
{
|
||||
uint8_t length = 0;
|
||||
|
||||
if(txlen > (RF_BUFF_LEN - 5)) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
ble_buff[0] = 0;
|
||||
ble_buff[1] = txlen; //data length
|
||||
for(uint8_t i = 0; i < txlen; i++)
|
||||
{
|
||||
ble_buff[2+i] = data[i];
|
||||
}
|
||||
length = ble_buff[1] + 5; //head(1) + len(1) + data(len) + crc(3)
|
||||
//添加BLE_CRC和白化
|
||||
ble_crc(ble_buff, length - 3, ble_buff + length - 3);
|
||||
ble_whiten(ble_buff, length, rf_cfg.tx_chan);
|
||||
for(int i = 0; i < length; i++)
|
||||
{
|
||||
ble_buff[i] = reverseBits(ble_buff[i]);
|
||||
}
|
||||
return nrf_tx_event(ble_buff, length); //发送数据包
|
||||
}
|
||||
|
||||
//接收数据
|
||||
uint8_t nrf_ble_recv(uint8_t *data, uint8_t *rssi)
|
||||
{
|
||||
uint8_t length = 0;
|
||||
uint32_t blecrc = 0;
|
||||
|
||||
#if (1 == XINCX_RF_NVIC_MODE) //开启中断
|
||||
if(rxread != rxwrite)
|
||||
{
|
||||
*rssi = rxfifo[rxread][0]; //RSSI
|
||||
length = rxfifo[rxread][1];//数据包长度
|
||||
for(uint8_t i = 0; i < length; i++)
|
||||
{
|
||||
ble_buff[i] = rxfifo[rxread][2+i];
|
||||
}
|
||||
rxread = (rxread + 1) & 7;
|
||||
}
|
||||
#else
|
||||
length = nrf_rx_event(ble_buff, rssi);
|
||||
#endif
|
||||
|
||||
if(length != 0)
|
||||
{
|
||||
//反白化
|
||||
for(int i = 0; i < length; i++)
|
||||
{
|
||||
ble_buff[i] = reverseBits(ble_buff[i]);
|
||||
}
|
||||
ble_whiten(ble_buff, length, rf_cfg.rx_chan);
|
||||
//计算有效数据长度
|
||||
length = ble_buff[1] + 5; //head(1) + len(1) + data(len) + crc(3)
|
||||
//CRC校验
|
||||
blecrc = (ble_buff[length-1]<<16) + (ble_buff[length-2]<<8) + ble_buff[length-3];
|
||||
ble_crc(ble_buff, length-3, ble_buff+length-3);
|
||||
if(blecrc != ((ble_buff[length-1] << 16) + (ble_buff[length-2]<<8) + ble_buff[length-3]))
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
length = ble_buff[1]; //数据长度
|
||||
for(uint8_t i = 0; i < length; i++)
|
||||
{
|
||||
data[i] = ble_buff[2+i];
|
||||
}
|
||||
}
|
||||
|
||||
return length;
|
||||
}
|
||||
@@ -0,0 +1,276 @@
|
||||
#ifndef __RF_2_4G_H__
|
||||
#define __RF_2_4G_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "xc6xxx.h"
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>\n
|
||||
|
||||
// <h> XINCX_RF_ADDR - 设置地址/同步字
|
||||
//==========================================================
|
||||
// <o> XINCX_RF_ADDR_L - 地址/同步字高4字节
|
||||
#ifndef XINCX_RF_ADDR_L
|
||||
#define XINCX_RF_ADDR_L 0x1AB51376 //EMN地址
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_ADDR_H - 地址/同步字低1字节
|
||||
#ifndef XINCX_RF_ADDR_H
|
||||
#define XINCX_RF_ADDR_H 0x00
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_TX_ADDR_WIDTH - 地址/同步字宽度
|
||||
// <3=> 3 Bytes
|
||||
// <4=> 4 Bytes
|
||||
// <5=> 5 Bytes
|
||||
#ifndef XINCX_RF_TX_ADDR_WIDTH
|
||||
#define XINCX_RF_TX_ADDR_WIDTH 4
|
||||
#endif
|
||||
//==========================================================
|
||||
// </h>
|
||||
|
||||
// <o> XINCX_RF_CHANNEL - 设置频率/信道
|
||||
// <2402=> ADV_CHANNEL_37
|
||||
// <2426=> ADV_CHANNEL_38
|
||||
// <2480=> ADV_CHANNEL_39
|
||||
#ifndef XINCX_RF_CHANNEL
|
||||
#define XINCX_RF_CHANNEL 2402 //EMN工作在37信道
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_POWER - 设置发射功率
|
||||
//4 - 17对应-4dBm - 8dBm
|
||||
#ifndef XINCX_RF_POWER
|
||||
#define XINCX_RF_POWER 8 //3.6dBm
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_RATE - 设置传输速率
|
||||
// <0x02=> 1M
|
||||
// <0x0A=> 2M
|
||||
// <0x22=> 250k
|
||||
// <0x2A=> 125k
|
||||
#ifndef XINCX_RF_RATE
|
||||
#define XINCX_RF_RATE 0x02
|
||||
#endif
|
||||
|
||||
// <q> XINCX_RF_WHITEN - 使能2.4g白化
|
||||
#ifndef XINCX_RF_WHITEN
|
||||
#define XINCX_RF_WHITEN 0 //0-禁止2.4g白化, BLE使用软件白化, 1-使能2.4G白化
|
||||
#endif
|
||||
|
||||
// <q> XINCX_RF_FEC - 使能前向纠错
|
||||
#ifndef XINCX_RF_FEC
|
||||
#define XINCX_RF_FEC 0 //0-蓝牙广播不使能, 1-2.4G使能
|
||||
#endif
|
||||
|
||||
// <q> XINCX_RF_LONG_PLD - 动态长包类型
|
||||
#ifndef XINCX_RF_LONG_PLD_TYPE
|
||||
#define XINCX_RF_LONG_PLD_TYPE 1 //0-最大支持128byte, 1-最大64字节
|
||||
#endif
|
||||
|
||||
// <q> XINCX_RF_LONG_PLD - 使能动态长包
|
||||
#ifndef XINCX_RF_LONG_PLD
|
||||
#define XINCX_RF_LONG_PLD 1
|
||||
#endif
|
||||
|
||||
// <e> XINCX_RF_DPL - 使能动态负载长度
|
||||
#ifndef XINCX_RF_DPL
|
||||
#define XINCX_RF_DPL 0 //不带ACK模式，不使用动态负载长度
|
||||
#endif
|
||||
// <o> XINCX_RF_DYNPD - 使能各个PIPE动态负载长度
|
||||
#ifndef XINCX_RF_DYNPD
|
||||
#define XINCX_RF_DYNPD 0x00//0x3f
|
||||
#endif
|
||||
// </e>
|
||||
|
||||
// <e> XINCX_RF_CRC_ENABLE - 使能硬件CRC
|
||||
#ifndef XINCX_RF_CRC_ENABLE
|
||||
#define XINCX_RF_CRC_ENABLE 0 //BLE模式不使能硬件CRC，使用软件CRC
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_CRC_BYTE - CRC字节长度
|
||||
// <1=> 1 Byte
|
||||
// <2=> 2 Bytes
|
||||
#ifndef XINCX_RF_CRC_BYTE
|
||||
#define XINCX_RF_CRC_BYTE 2
|
||||
#endif
|
||||
|
||||
// <q> XINCX_RF_CRC_SCOPE_HEADER - 2.4g CRC Scope Header
|
||||
#ifndef XINCX_RF_CRC_SCOPE_HEADER
|
||||
#define XINCX_RF_CRC_SCOPE_HEADER 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_RF_CRC_SCOPE_ADDR - 2.4g CRC Scope Addr
|
||||
#ifndef XINCX_RF_CRC_SCOPE_ADDR
|
||||
#define XINCX_RF_CRC_SCOPE_ADDR 1
|
||||
#endif
|
||||
// </e>
|
||||
|
||||
// <e> XINCX_RF_Auto ACK - 使能ACK负载
|
||||
#ifndef XINCX_RF_ACK_PAY
|
||||
#define XINCX_RF_ACK_PAY 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_RF_DYN_ACK - 使能命令W_TX_PAYLOAD_NOACK
|
||||
#ifndef XINCX_RF_DYN_ACK
|
||||
#define XINCX_RF_DYN_ACK 1 //使能不带ACK的TX包
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_ARC - 设置自动重发次数
|
||||
#ifndef XINCX_RF_ARC
|
||||
#define XINCX_RF_ARC 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_ARD - 设置自动重发延时
|
||||
#ifndef XINCX_RF_ARD
|
||||
#define XINCX_RF_ARD 0
|
||||
#endif
|
||||
// </e>
|
||||
|
||||
// <h> XINCX_RF_PIPE - 设置数据PIPE
|
||||
//==========================================================
|
||||
// <o> XINCX_RF_PIPE_LEN - 数据PIPE长度
|
||||
#ifndef XINCX_RF_PIPE_LEN
|
||||
#define XINCX_RF_PIPE_LEN 32
|
||||
#endif
|
||||
|
||||
// <q> XINCX_RF_PIPE_ENAA - 使能PIPE自动ACK
|
||||
#ifndef XINCX_RF_PIPE_ENAA
|
||||
#define XINCX_RF_PIPE_ENAA 0
|
||||
#endif
|
||||
//==========================================================
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_RF_PREAMBLE - 设置前导码
|
||||
//==========================================================
|
||||
// <o> XINCX_RF_PREAMBLE - 设置前导码内容
|
||||
#ifndef XINCX_RF_PREAMBLE
|
||||
#define XINCX_RF_PREAMBLE 0x710f5555 //BLE前导码为10101010或01010101
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_PREAMBLE_NUM - 设置前导码长度
|
||||
// <0=> 1 Byte
|
||||
// <1=> 2 Bytes
|
||||
// <2=> 3 Bytes
|
||||
// <3=> 4 Bytes
|
||||
#ifndef XINCX_RF_PREAMBLE_NUM
|
||||
#define XINCX_RF_PREAMBLE_NUM 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_PREAMBLE_TYPE - 设置前导码类型
|
||||
#ifndef XINCX_RF_PREAMBLE_TYPE
|
||||
#define XINCX_RF_PREAMBLE_TYPE 0
|
||||
#endif
|
||||
//==========================================================
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_RF_GUARD - 设置保护字
|
||||
//==========================================================
|
||||
// <o> XINCX_RF_GUARD - 保护字内容
|
||||
#ifndef XINCX_RF_GUARD
|
||||
#define XINCX_RF_GUARD 0x8fc9
|
||||
#endif
|
||||
|
||||
// <q> XINCX_RF_GUARD_CFG - 保护字配置
|
||||
#ifndef XINCX_RF_GUARD_CFG
|
||||
#define XINCX_RF_GUARD_CFG 0
|
||||
#endif
|
||||
//==========================================================
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_RF_CRY_CPT_ARRAY - 设置晶振电容
|
||||
//==========================================================
|
||||
// <o> XINCX_RF_CRY_CPT_ARRAY - 设置晶振电容
|
||||
#ifndef XINCX_RF_CRY_CPT_ARRAY
|
||||
#define XINCX_RF_CRY_CPT_ARRAY 0x36
|
||||
#endif
|
||||
//==========================================================
|
||||
// </h>
|
||||
|
||||
// <q> XINCX_RF_NVIC_MODE - 使能中断
|
||||
#ifndef XINCX_RF_NVIC_MODE
|
||||
#define XINCX_RF_NVIC_MODE 1
|
||||
#endif
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
|
||||
/**************************** RF Command Code *******************************/
|
||||
#define R_REG 0x00 //寄存器读操作
|
||||
#define W_REG 0x20 //寄存器写操作
|
||||
#define R_RX_PL_WID 0x60 //从FIFO读取收到的数据长度
|
||||
#define R_RX_PLOAD 0x61 //从FIFO读取收到的数据
|
||||
#define W_TX_PLOAD 0xA0 //向FIFO写入发送的数据
|
||||
#define W_TX_PLOAD_NOACK 0xB0 //向FIFO写入发送的数据，不带ACK
|
||||
#define W_ACK_PLOAD 0xA8 //向FIFO写入发送ACK数据
|
||||
#define FLUSH_TX 0xE1 //清空TX FIFO
|
||||
#define FLUSH_RX 0xE2 //清空RX FIFO
|
||||
#define REUSE_TX_PL 0xE3
|
||||
|
||||
#define CMD_NOP 0xFF //空操作
|
||||
#define CMD_DONE 0x100
|
||||
|
||||
/* 状态寄存器 */
|
||||
#define STAT_TX_REUSE (1 << 6)
|
||||
#define STAT_TX_FULL (1 << 5) //TX_FIFO满标志
|
||||
#define STAT_TX_EMPTY (1 << 4) //TX_FIFO空标志
|
||||
#define STAT_RX_FULL (1 << 1) //RX_FIFO满标志
|
||||
#define STAT_RX_EMPTY (1 << 0) //RX_FIFO满标志
|
||||
|
||||
/* 中断状态位 */
|
||||
#define MASK_RX_DR (1 << 6) //RX_FIFO有效标志位，写1清除
|
||||
#define MASK_TX_DS (1 << 5) //发射完成中断，写1清除
|
||||
#define MASK_MAX_RT (1 << 4) //达到最大重发次数，写1清除
|
||||
#define MASK_ALL_INTER (MASK_RX_DR | MASK_TX_DS| MASK_MAX_RT)
|
||||
|
||||
/* CRC校验位 */
|
||||
#define CRC_1BIT 1
|
||||
#define CRC_2BIT 2
|
||||
|
||||
/* 工作模式 */
|
||||
#define TX_MODE 0
|
||||
#define RX_MODE 1
|
||||
|
||||
/* 速率设置 */
|
||||
#define RATE_1M 0x02
|
||||
#define RATE_2M 0x0A
|
||||
#define RATE_250K 0x22
|
||||
#define RATE_125K 0x2A
|
||||
|
||||
#define SEND_CMD_CNT 6
|
||||
#define RECV_CMD_CNT 4
|
||||
|
||||
#define RF_BUFF_LEN XINCX_RF_PIPE_LEN
|
||||
|
||||
#define RF_BLE_ADDR 0x1AB51376
|
||||
|
||||
#define RF_BLE_CHN37 2402
|
||||
#define RF_BLE_CHN38 2426
|
||||
#define RF_BLE_CHN39 2480
|
||||
|
||||
|
||||
//BLE广播Head
|
||||
#define BLE_ADV_IND 0x00 //通用广播指示
|
||||
#define BLE_ADV_DIRECT_IND 0x01 //定向连接指示
|
||||
#define BLE_ADV_NONCONN_IND 0x02 //不可连接指示
|
||||
#define BLE_SCAN_REQ 0x03 //主动扫描请求
|
||||
#define BLE_SCAN_RSP 0x04 //主动扫描响应
|
||||
#define BLE_CONNECT_REQ 0x05 //连接请求
|
||||
#define BLE_ADV_SCAN_IND 0x06 //可扫描指示
|
||||
|
||||
#define LOGI(...) printf(__VA_ARGS__)
|
||||
|
||||
extern void nrf_24g_init(uint32_t addr, uint16_t chan);
|
||||
extern void nrf_ble_init(uint32_t addr, uint16_t chan);
|
||||
extern void nrf_set_power(uint8_t tx_pwr);
|
||||
extern void nrf_set_channel(uint16_t channel);
|
||||
extern uint8_t nrf_ble_send(uint8_t *data, uint8_t txlen);
|
||||
extern uint8_t nrf_ble_recv(uint8_t *data, uint8_t *rssi);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __RF_2_4G__ */
|
||||
@@ -0,0 +1,190 @@
|
||||
/*
|
||||
* @Descripttion:
|
||||
* @version:
|
||||
* @Author: sueRimn
|
||||
* @Date: 2024-03-21 10:47:04
|
||||
* @LastEditors: sueRimn
|
||||
* @LastEditTime: 2024-03-21 13:50:06
|
||||
*/
|
||||
#ifndef __XC_RF_24G_REGISTER_H__
|
||||
#define __XC_RF_24G_REGISTER_H__
|
||||
#include "xc60xx.h"
|
||||
#include <stdint.h>
|
||||
|
||||
/* ===========================================================================================================================
|
||||
*/
|
||||
/* ================ BT RF ================ */
|
||||
/* ===========================================================================================================================
|
||||
*/
|
||||
/* BT RF Register Typedef */
|
||||
typedef struct
|
||||
{
|
||||
__IOM uint16_t ana0_reg_l; /* RF analog0 Reg (0x000) */
|
||||
__IOM uint16_t ana0_reg_h;
|
||||
__IOM uint16_t ana1_reg_l; /* RF analog1 Reg (0x004) */
|
||||
__IOM uint16_t ana1_reg_h;
|
||||
__IOM uint16_t ana2_reg_l; /* RF analog2 Reg (0x008) */
|
||||
__IOM uint16_t ana2_reg_h;
|
||||
__IOM uint16_t ana3_reg_l; /* RF analog3 Reg (0x00C) */
|
||||
__IOM uint16_t ana3_reg_h;
|
||||
__IOM uint16_t ana4_reg_l; /* RF analog4 Reg (0x010) */
|
||||
__IOM uint16_t ana4_reg_h;
|
||||
__IOM uint16_t ana5_reg_l; /* RF analog5 Reg (0x014) */
|
||||
__IOM uint16_t ana5_reg_h;
|
||||
__IOM uint16_t ana6_reg_l; /* RF analog6 Reg (0x018) */
|
||||
__IOM uint16_t ana6_reg_h;
|
||||
__IOM uint16_t ana7_reg_l; /* RF analog7 Reg (0x01C) */
|
||||
__IOM uint16_t ana7_reg_h;
|
||||
__IOM uint16_t ana8_reg_l; /* RF analog8 Reg (0x020) */
|
||||
__IOM uint16_t ana8_reg_h;
|
||||
__IOM uint16_t ana9_reg_l; /* RF analog9 Reg (0x024) */
|
||||
__IOM uint16_t ana9_reg_h;
|
||||
__IOM uint16_t ana10_reg_l; /* RF analog10 Reg (0x028) */
|
||||
__IOM uint16_t ana10_reg_h;
|
||||
__IOM uint16_t ana11_reg_l; /* RF analog11 Reg (0x02C) */
|
||||
__IOM uint16_t ana11_reg_h;
|
||||
__IOM uint16_t ana12_reg_l; /* RF analog12 Reg (0x030) */
|
||||
__IOM uint16_t ana12_reg_h;
|
||||
__IOM uint16_t ana13_reg_l; /* RF analog13 Reg (0x034) */
|
||||
__IOM uint16_t ana13_reg_h;
|
||||
__IOM uint16_t ana14_reg_l; /* RF analog14 Reg (0x038) */
|
||||
__IOM uint16_t ana14_reg_h;
|
||||
__IOM uint16_t ana15_reg_l; /* RF analog15 Reg (0x03C) */
|
||||
__IOM uint16_t ana15_reg_h;
|
||||
__IOM uint16_t ana16_reg_l; /* RF analog16 Reg (0x040) */
|
||||
__IOM uint16_t ana16_reg_h;
|
||||
__IOM uint16_t ana17_reg_l; /* RF analog17 Reg (0x044) */
|
||||
__IOM uint16_t ana17_reg_h;
|
||||
__IOM uint16_t ana18_reg_l; /* RF analog18 Reg (0x048) */
|
||||
__IOM uint16_t ana18_reg_h;
|
||||
__IOM uint16_t ana19_reg_l; /* RF analog19 Reg (0x04C) */
|
||||
__IOM uint16_t ana19_reg_h;
|
||||
__IOM uint16_t ana20_reg_l; /* RF analog20 Reg (0x050) */
|
||||
__IOM uint16_t ana20_reg_h;
|
||||
__IOM uint16_t ana21_reg_l; /* RF analog21 Reg (0x054) */
|
||||
__IOM uint16_t ana21_reg_h;
|
||||
__IOM uint32_t reserved1[1]; /* Reserved (0x058) - (0x05c) */
|
||||
__IOM uint16_t ana23_reg_l;
|
||||
__IOM uint16_t ana23_reg_h;
|
||||
__IOM uint16_t ana24_reg_l; /* RF analog24 Reg (0x060) */
|
||||
__IOM uint16_t ana24_reg_h;
|
||||
__IOM uint16_t ana25_reg_l; /* RF analog25 Reg (0x064) */
|
||||
__IOM uint16_t ana25_reg_h;
|
||||
__IOM uint16_t ana26_reg_l; /* RF analog26 Reg (0x068) */
|
||||
__IOM uint16_t ana26_reg_h;
|
||||
__IOM uint16_t ana27_reg_l; /* RF analog27 Reg (0x06C) */
|
||||
__IOM uint16_t ana27_reg_h;
|
||||
__IOM uint16_t ana28_reg_l; /* RF analog28 Reg (0x070) */
|
||||
__IOM uint16_t ana28_reg_h;
|
||||
__IOM uint16_t ana29_reg_l; /* RF analog29 Reg (0x074) */
|
||||
__IOM uint16_t ana29_reg_h;
|
||||
__IOM uint16_t ana30_reg_l; /* RF analog30 Reg (0x078) */
|
||||
__IOM uint16_t ana30_reg_h;
|
||||
__IOM uint16_t ana31_reg_l; /* RF analog31 Reg (0x07C) */
|
||||
__IOM uint16_t ana31_reg_h;
|
||||
__IOM uint16_t rccal_reg_l; /* RF rccal Reg (0x080) */
|
||||
__IOM uint16_t rccal_reg_h;
|
||||
__IOM uint16_t rccal_rslt_l; /* RF rccal result Reg (0x084) */
|
||||
__IOM uint16_t rccal_rslt_h;
|
||||
struct
|
||||
{
|
||||
__IOM uint16_t rx_lna_map0_l; /* BT rx lna map0 Reg (0x088) */
|
||||
__IOM uint16_t rx_lna_map0_h;
|
||||
__IOM uint16_t rx_lna_map1_l; /* BT rx lna map1 Reg (0x08C) */
|
||||
__IOM uint16_t rx_lna_map1_h;
|
||||
__IOM uint16_t rx_vga_map0_l; /* BT rx vga map0 Reg (0x090) */
|
||||
__IOM uint16_t rx_vga_map0_h;
|
||||
__IOM uint16_t rx_vga_map1_l; /* BT rx vga map1 Reg (0x094) */
|
||||
__IOM uint16_t rx_vga_map1_h;
|
||||
__IOM uint16_t rx_vga_map2_l; /* BT rx vga map2 Reg (0x098) */
|
||||
__IOM uint16_t rx_vga_map2_h;
|
||||
__IOM uint16_t rx_vga_map3_l; /* BT rx vga map3 Reg (0x09C) */
|
||||
__IOM uint16_t rx_vga_map3_h;
|
||||
__IOM uint16_t rx_vga_map4_l; /* BT rx vga map4 Reg (0x0A0) */
|
||||
__IOM uint16_t rx_vga_map4_h;
|
||||
__IOM uint16_t rx_vga_map5_l; /* BT rx vga map5 Reg (0x0A4) */
|
||||
__IOM uint16_t rx_vga_map5_h;
|
||||
__IOM uint16_t rx_vga_map6_l; /* BT rx vga map6 Reg (0x0A8) */
|
||||
__IOM uint16_t rx_vga_map6_h;
|
||||
__IOM uint16_t rx_vga_map7_l; /* BT rx vga map7 Reg (0x0AC) */
|
||||
__IOM uint16_t rx_vga_map7_h;
|
||||
__IOM uint16_t rx_pm_reg_l; /* BT rx pm Reg (0x0B0) */
|
||||
__IOM uint16_t rx_pm_reg_h;
|
||||
__IOM uint16_t rx_chan_reg_l; /* BT rx chan Reg (0x0B4) */
|
||||
__IOM uint16_t rx_chan_reg_h;
|
||||
__IOM uint16_t rx_ctrl_sel_l; /* BT rx control select Reg (0x0B8) */
|
||||
__IOM uint16_t rx_ctrl_sel_h;
|
||||
__IOM uint16_t rf_ctrl1_l;
|
||||
__IOM uint16_t rf_ctrl1_h;
|
||||
} BT;
|
||||
} BT_RF_TypeDef;
|
||||
|
||||
/* ===========================================================================================================================
|
||||
*/
|
||||
/* ================ 2.4G ================ */
|
||||
/* ===========================================================================================================================
|
||||
*/
|
||||
/* RF 2.4G Module Register Typedef */
|
||||
typedef struct
|
||||
{
|
||||
__IOM uint32_t CFG_TOP; /*!< Top-level configuration (0x000) */
|
||||
__IOM uint32_t EN_AA; /*!< Auto-acknowledgement settings (0x004) */
|
||||
__IOM uint32_t EN_RXADDR; /*!< Enable RX addresses (0x008) */
|
||||
__IOM uint32_t SETUP_AW; /*!< Address width & timing stup (0x00C) */
|
||||
__IOM uint32_t SETUP_RETR; /*!< Automatic retransmission setup (0x010) */
|
||||
__IOM uint32_t RF_CH; /*!< RF channel (0x014) */
|
||||
__IOM uint32_t SETUP_RF; /*!< RF settings (0x018) */
|
||||
__IOM uint32_t STATUS; /*!< Status, SDO output may be adjusted (0x01C) */
|
||||
__IOM uint32_t OBSERVE_TX; /*!< Transmission observation (0x020) */
|
||||
__IOM uint32_t RSSI; /*!< TSSI and RSSI indicator/control (0x024) */
|
||||
__IOM uint32_t RX_ADDR_P0_L; /*!< RX address low 32bit for data pipe 0 (0x028) */
|
||||
__IOM uint32_t RX_ADDR_P0_H; /*!< RX address high 8bit for data pipe 0 (0x02C) */
|
||||
__IOM uint32_t RX_ADDR_P1_L; /*!< RX address low 32bit for data pipe 1 (0x030) */
|
||||
__IOM uint32_t RX_ADDR_P1_H; /*!< RX address high 8bit for data pipe 1 (0x034) */
|
||||
__IOM uint32_t RX_ADDR_P2TOP5; /*!< Only LSB are set, MSB use RX_ADDR_P1 (0x038) */
|
||||
__IOM uint32_t BER_RECV_CNT; /*!< Receive total Bit Counter for BER Test (0x03C) */
|
||||
__IOM uint32_t BER_ERR_CNT; /*!< Receive error Bit Counter for BER Test (0x040) */
|
||||
__IOM uint32_t AGC_SETTING; /*!< AGC setting (0x044) */
|
||||
__IOM uint32_t PGA_SETTING; /*!< PGA setting (0x048) */
|
||||
__IOM uint32_t TX_ADDR_L; /*!< TX address low 32bit (0x04C) */
|
||||
__IOM uint32_t TX_ADDR_H; /*!< TX address high 8bit (0x050) */
|
||||
__IOM uint32_t RX_PW_Px_L; /*!< Number of bytes in data pipe0~3 (0x054) */
|
||||
__IOM uint32_t RX_PW_Px_H; /*!< Number of bytes in data pipe4~5 (0x058) */
|
||||
__IOM uint32_t ANALOG_CFG0_L; /*!< Analog register 0 low 32bit (0x05C) */
|
||||
__IOM uint32_t ANALOG_CFG0_H; /*!< Analog register 0 high 32bit (0x060) */
|
||||
__IOM uint32_t ANALOG_CFG1_L; /*!< Analog register 1 low 32bit (0x064) */
|
||||
__IOM uint32_t ANALOG_CFG1_H; /*!< Analog register 1 high 32bit (0x068) */
|
||||
__IOM uint32_t ANALOG_CFG2_L; /*!< Analog register 2 low 32bit (0x06C) */
|
||||
__IOM uint32_t ANALOG_CFG2_H; /*!< Analog register 2 high 32bit (0x070) */
|
||||
__IOM uint32_t ANALOG_CFG3_L; /*!< Analog register 3 low 32bit (0x074) */
|
||||
__IOM uint32_t ANALOG_CFG3_H; /*!< Analog register 3 high 32bit (0x078) */
|
||||
__IM uint32_t Reserved1; /*!< Reserved1 (0x07C) */
|
||||
__IOM uint32_t STATUS_FIFO; /*!< FIFO status (0x080) */
|
||||
__IOM uint32_t RSSIREC; /*!< RSSI recorder feature (0x084) */
|
||||
__IOM uint32_t TXPROC_CFG; /*!< TX Process configuration (0x088) */
|
||||
__IOM uint32_t RXPROC_CFG_L; /*!< RX Process configuration (0x08C) */
|
||||
__IM uint32_t Reserved2; /*!< Reserved2 (0x090) */
|
||||
__IOM uint32_t DYNPD; /*!< Dynamic payload length (0x094) */
|
||||
__IOM uint32_t FEATURE; /*!< Features (0x098) */
|
||||
__IM uint32_t Reserved3[3]; /*!< Reserved3 (0x09C - 0x0A4) */
|
||||
__IOM uint32_t RXPROC_CFG_H; /*!< PA Ramp Configuration (0x0A8) */
|
||||
__IOM uint32_t Reserved4; /*!< Reserved4 (0x0AC) */
|
||||
__IOM uint32_t PREAMBLE; /*!< PREAMBLE (0x0B0) */
|
||||
__IOM uint32_t GUARD; /*!< PA Ramp Configuration (0x0B4) */
|
||||
__IM uint32_t Reserved5[2]; /*!< Reserved4 (0x0B8 - 0x0BC) */
|
||||
__IOM uint32_t CMD_CFG; /*!< Command Configuration (0x0C0) */
|
||||
__IOM uint32_t TX_FIFO_DATA; /*!< Tx Fifo Data (0x0C4) */
|
||||
__IOM uint32_t RX_FIFO_DATA; /*!< Rx Fifo Data (0x0C8) */
|
||||
__IOM uint32_t RX_FIFO_LEN; /*!< Tx Fifo Data Len (0x0CC) */
|
||||
} RF_2_4G_TypeDef;
|
||||
|
||||
#define XC_BT_RF_BASE 0x53021000UL
|
||||
#define XC_RF_2_4G_BASE 0x53023000UL
|
||||
|
||||
#define XC_BT_RF ((BT_RF_TypeDef *)XC_BT_RF_BASE)
|
||||
#define XC_RF_2_4G ((RF_2_4G_TypeDef *)XC_RF_2_4G_BASE)
|
||||
|
||||
#define BLE_COMMON_BASE 0x53022000UL
|
||||
#define BLE_COMN_RF24G_CTRL ((volatile uint32_t *)(BLE_COMMON_BASE + 0x40))
|
||||
|
||||
#endif //__XC_RF_24G_REGISTER_H__
|
||||
@@ -0,0 +1,285 @@
|
||||
#include "xc6xxx.h"
|
||||
#include "xc_hal.h"
|
||||
#include "uart.h"
|
||||
|
||||
uint8_t chipuid[12];
|
||||
uint8_t deviceaddr[4];
|
||||
|
||||
volatile uint32_t tick_count = 0;
|
||||
|
||||
extern void app_tick_handler(void);
|
||||
|
||||
//系统时钟初始化
|
||||
void hal_clock_init(void)
|
||||
{
|
||||
CLOCK_InitCfg_t clock_cfg;
|
||||
|
||||
clock_cfg.hfclk_src = CLOCK_HFCLK_SRC_XTAL;
|
||||
clock_cfg.hfclk_in = CLOCK_HFCLK_IN_32M;
|
||||
clock_cfg.lfclk_src = CLOCK_LFCLK_SRC_RC;
|
||||
if (clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_XTAL) {
|
||||
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32768;
|
||||
} else if (clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_RC) {
|
||||
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32K;
|
||||
}
|
||||
xc_clock_init_cfg(&clock_cfg);
|
||||
}
|
||||
|
||||
//看门狗初始化
|
||||
static void hal_wdt_init(void)
|
||||
{
|
||||
#if defined(ENABLE_WDT)
|
||||
WDT_InitCfg_t wdt_cfg ;
|
||||
|
||||
//wdt_cfg.WorkMode = WDT_WORK_MODE0; //模式0：超时复位
|
||||
wdt_cfg.WorkMode = WDT_WORK_MODE1; //模式1：超时中断喂狗，两次未中断复位
|
||||
wdt_cfg.ReloadValue = WDT_ReloadValue_0xFFFF; //约2秒
|
||||
wdt_cfg.PclkSel = WDT_WORK_32K;
|
||||
|
||||
xc_wdt_init(&wdt_cfg);
|
||||
xc_wdt_start(); //启动看门狗
|
||||
|
||||
NVIC_EnableIRQ(WDT_IRQn); //使能看门狗中断
|
||||
#endif
|
||||
}
|
||||
|
||||
//定时器初始化
|
||||
static void hal_timer_init(void)
|
||||
{
|
||||
Timer_InitCfg_t timer_cfg;
|
||||
|
||||
timer_cfg.timer_src_clk = TIMER_CLK_SRC_32M_DIV; //定时器时钟源
|
||||
timer_cfg.timer_div_clk = TIMER_DIV_CLK_16MHzOr16K; //分频系数
|
||||
timer_cfg.timer_mode = TIMER_MODE_CYCLE; //运行模式
|
||||
|
||||
xc_timer_init(TIMER0_IDX, &timer_cfg);
|
||||
xc_timer_set_value(TIMER0_IDX, 1000); //设置定时时间
|
||||
xc_timer_start(TIMER0_IDX); //启动定时器
|
||||
}
|
||||
|
||||
//定时器中断
|
||||
void timer0_callback(void *context)
|
||||
{
|
||||
tick_count++;
|
||||
uart_tick();
|
||||
app_tick_handler();
|
||||
}
|
||||
|
||||
//串口初始化
|
||||
static void hal_uart_init(void)
|
||||
{
|
||||
GPIO_InitCfg_t gpio_cfg = {0};
|
||||
|
||||
//UART0_TXD引脚
|
||||
gpio_cfg.Pin = GPIO_18;
|
||||
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
|
||||
gpio_cfg.Pull = GPIO_PULLUP;
|
||||
gpio_cfg.Mux = GPIO_Mux0;
|
||||
gpio_cfg.FunSel = UART0_TX;
|
||||
gpio_cfg.Int = NOT_INT;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
//UART0_RXD引脚
|
||||
gpio_cfg.Pin = GPIO_19;
|
||||
gpio_cfg.Dir = GPIO_DIR_INPUT;
|
||||
gpio_cfg.FunSel = UART0_RX;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
UART_InitCfg_t uart_cfg = {0};
|
||||
|
||||
uart_cfg.BaudRate = UART_BAUDRATE_115200;
|
||||
uart_cfg.Parity = UART_PARITY_DISABLE;
|
||||
uart_cfg.StopBits = UART_STOP_1_BITS;
|
||||
uart_cfg.WordLength = UART_DATA_8_BITS;
|
||||
uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE;
|
||||
xc_uart_init(UART0_IDX, &uart_cfg);
|
||||
xc_uart_enable_rx_it(UART0_IDX);
|
||||
|
||||
NVIC_EnableIRQ(UART0_IRQn);
|
||||
}
|
||||
|
||||
//串口接收中断
|
||||
void uart_receive_cb(uint8_t reg_idx, uint8_t val)
|
||||
{
|
||||
if(reg_idx == UART0_IDX)
|
||||
{
|
||||
uart_rxbyte(val);
|
||||
}
|
||||
}
|
||||
|
||||
//PWM初始化
|
||||
static void hal_pwm_init(void)
|
||||
{
|
||||
PWM_InitCfg_t pwm_cfg;
|
||||
|
||||
pwm_cfg.DutyCycleAcc = 8000; //调整占空比精度
|
||||
pwm_cfg.DutyCycle = 4000; //调整占空比
|
||||
pwm_cfg.Period = 0; //调整时钟周期参数：0-255
|
||||
pwm_cfg.OutputPin = GPIO_2; //输出引脚
|
||||
pwm_cfg.OutputInvertPin = GPIO_3; //互补输出引脚
|
||||
pwm_cfg.InvertEnable = false; //互补输出使能
|
||||
pwm_cfg.InvertDelay = 0x17; //互补死区时间
|
||||
pwm_cfg.Mode = PWM_EN_MODE_EDGE_ALIGNED;
|
||||
pwm_cfg.SrcClk = PWM_CLK_SRC_32M_DIV; //时钟源
|
||||
pwm_cfg.SrcEnable = PWM_EN_SEL_ALL; //使能源选择
|
||||
xc_pwm_init(PWM0_IDX, &pwm_cfg);
|
||||
//xc_pwm_start(PWM0_IDX); //使能指定PWM
|
||||
xc_pwm_start_all(); //使能所有PWM
|
||||
}
|
||||
|
||||
//ADC初始化
|
||||
static void hal_adc_init(void)
|
||||
{
|
||||
GPIO_InitCfg_t GPIO_InitCfg;
|
||||
|
||||
GPIO_InitCfg.Pin = GPIO_1;
|
||||
GPIO_InitCfg.Dir = GPIO_DIR_INPUT;
|
||||
GPIO_InitCfg.Pull = GPIO_NOPULL;
|
||||
GPIO_InitCfg.Mux = GPIO_Mux0;
|
||||
GPIO_InitCfg.FunSel = GPIO_Dx;
|
||||
GPIO_InitCfg.Int = NOT_INT;
|
||||
xc_gpio_init(&GPIO_InitCfg);
|
||||
|
||||
ADC_InitCfg_t adc_cfg;
|
||||
|
||||
adc_cfg.Freq = ADC_FREQ_500K; //采样频率，最高采样率1M
|
||||
adc_cfg.RefVol = ADC_REF_VOL_3_3V; //参考电压
|
||||
adc_cfg.SampEdge = ADC_SAMPEDGE_RISE; //内部采样触发沿
|
||||
adc_cfg.ExtDataMode = ADC_EXT_DATA_MODE_32BIT; //采集数据模式
|
||||
adc_cfg.ExtEdgeSel = ADC_EXT_EDGE_SEL_INTER; //数据采样触发源：内部自动采样
|
||||
adc_cfg.ExtSampleNum = ADC_EXT_SAMPLE_NUM_8; //外部触发采集数目
|
||||
adc_cfg.ExtTriggerSel = ADC_EXT_TRIGGER_SEL_PWM0; //外部触发信号源
|
||||
xc_adc_init(&adc_cfg);
|
||||
}
|
||||
|
||||
uint8_t configdata[4096];
|
||||
|
||||
//获取设备地址
|
||||
static void hal_addr_init(void)
|
||||
{
|
||||
uint8_t ruid[16];
|
||||
|
||||
xc_fmc_spi_init_oprt();
|
||||
xc_fmc_spi_flash_wake_up();
|
||||
|
||||
xc_fmc_spi_flash_ruid(ruid);
|
||||
for(uint8_t i = 0; i < 12; i++)
|
||||
{
|
||||
chipuid[i] = ruid[0];
|
||||
}
|
||||
xc_fmc_spi_flash_read(0x0001E000, deviceaddr, 4); //读取设备地址
|
||||
if((deviceaddr[0]==0xFF && deviceaddr[1]==0xFF && deviceaddr[2]==0xFF && deviceaddr[3]==0xFF))
|
||||
{
|
||||
//FLASH中没有写入设备地址时，使用chipuid前字节
|
||||
for(uint8_t i = 0; i < 4; i++)
|
||||
{
|
||||
deviceaddr[i] = chipuid[i];
|
||||
}
|
||||
}
|
||||
xc_fmc_spi_flash_read(0x00010000, configdata, 4096); //这里存储的是应用程序配置
|
||||
}
|
||||
|
||||
//GPIO初始化
|
||||
static void hal_gpio_init(void)
|
||||
{
|
||||
GPIO_InitCfg_t GPIO_InitCfg = {0};
|
||||
|
||||
//LED->GPIO0
|
||||
GPIO_InitCfg.Pin = GPIO_0;
|
||||
GPIO_InitCfg.Dir = GPIO_DIR_OUTPUT;//端口方向控制
|
||||
GPIO_InitCfg.Pull = GPIO_PULLUP;//上下拉控制
|
||||
GPIO_InitCfg.Mux = GPIO_Mux0; //一级复用
|
||||
GPIO_InitCfg.FunSel = GPIO_Dx; //二级复用
|
||||
GPIO_InitCfg.Int = NOT_INT; //中断控制
|
||||
xc_gpio_init(&GPIO_InitCfg);
|
||||
xc_gpio_write_pin(GPIO_0, GPIO_PIN_SET);
|
||||
|
||||
//RAD->GPIO5
|
||||
GPIO_InitCfg.Pin = GPIO_5;
|
||||
GPIO_InitCfg.Dir = GPIO_DIR_INPUT;//端口方向控制
|
||||
GPIO_InitCfg.Pull = GPIO_PULLDOWN;//上下拉控制
|
||||
GPIO_InitCfg.Mux = GPIO_Mux0; //一级复用
|
||||
GPIO_InitCfg.FunSel = GPIO_Dx; //二级复用
|
||||
GPIO_InitCfg.Int = NOT_INT; //中断控制
|
||||
xc_gpio_init(&GPIO_InitCfg);
|
||||
}
|
||||
|
||||
//MCU初始化
|
||||
void hal_mcu_init(void)
|
||||
{
|
||||
hal_clock_init();
|
||||
hal_wdt_init();
|
||||
hal_timer_init();
|
||||
hal_uart_init();
|
||||
hal_pwm_init();
|
||||
hal_adc_init();
|
||||
hal_addr_init();
|
||||
hal_gpio_init();
|
||||
}
|
||||
|
||||
//喂狗
|
||||
void hal_wdt_feed(void)
|
||||
{
|
||||
#if defined(ENABLE_WDT)
|
||||
//xc_wdt_reload();
|
||||
#endif
|
||||
}
|
||||
|
||||
//延时
|
||||
void hal_delayms(uint32_t ms)
|
||||
{
|
||||
delay_ms(ms);
|
||||
}
|
||||
|
||||
void hal_led_set(uint8_t val)
|
||||
{
|
||||
xc_gpio_write_pin(GPIO_0, val?GPIO_PIN_SET:GPIO_PIN_RESET);
|
||||
}
|
||||
|
||||
uint8_t hal_rad_get(void)
|
||||
{
|
||||
return xc_gpio_read_pin(GPIO_5);
|
||||
}
|
||||
|
||||
//设置PWM输出
|
||||
void hal_pwm_set(uint8_t pwm_idx, uint16_t duty)
|
||||
{
|
||||
uint16_t freq = 2000;
|
||||
uint32_t acc = 16000000 / freq;
|
||||
|
||||
xc_pwm_dutycycle_set(pwm_idx,acc, ((acc * duty) / 65535));
|
||||
}
|
||||
|
||||
//读取ADC值
|
||||
uint16_t hal_adc_get(void)
|
||||
{
|
||||
uint16_t value = 0;
|
||||
xc_adc_start_get_value(ADC_CH5_PIN1, &value); //获取采样值
|
||||
return value;
|
||||
}
|
||||
|
||||
//串口发送
|
||||
void hal_uart_send(uint8_t *data, uint16_t length)
|
||||
{
|
||||
xc_uart_send_data(UART0_IDX, data, length);
|
||||
}
|
||||
|
||||
//串口发送
|
||||
void hal_uart_sendbyte(uint8_t byte)
|
||||
{
|
||||
xc_uart_send_byte(UART0_IDX, byte);
|
||||
}
|
||||
|
||||
uint32_t hal_tickcount(void)
|
||||
{
|
||||
return tick_count;
|
||||
}
|
||||
|
||||
//获取8位随机数
|
||||
uint32_t hal_random(void)
|
||||
{
|
||||
srand(tick_count);
|
||||
return rand();
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,19 @@
|
||||
#ifndef __HAL_H
|
||||
#define __HAL_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include "xc_drv_gpio.h"
|
||||
|
||||
extern void hal_mcu_init(void);
|
||||
extern void hal_wdt_feed(void);
|
||||
extern void hal_delayms(uint32_t ms);
|
||||
extern void hal_led_set(uint8_t val);
|
||||
extern void hal_uart_send(uint8_t *data, uint16_t length);
|
||||
extern void hal_uart_sendbyte(uint8_t byte);
|
||||
extern void hal_pwm_set(uint8_t pwm_idx, uint16_t duty);
|
||||
extern uint8_t hal_rad_get(void);
|
||||
extern uint16_t hal_adc_get(void);
|
||||
extern uint32_t hal_tickcount(void);
|
||||
extern uint32_t hal_random(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,178 @@
|
||||
|
||||
#ifndef SDK_ADV_CONFIG_H
|
||||
#define SDK_ADV_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>\n
|
||||
|
||||
// <h> Xinc_RF
|
||||
|
||||
// <o> XINCX_ADV_MODE - RF Tx or Rx Mode
|
||||
// <0=> TX Mode
|
||||
// <1=> RX Mode
|
||||
#ifndef XINCX_ADV_MODE
|
||||
#define XINCX_ADV_MODE 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_ADV_ADDR_L - rf Address Set
|
||||
#ifndef XINCX_ADV_ADDR_L
|
||||
#define XINCX_ADV_ADDR_L 0x71917d6b
|
||||
#endif
|
||||
|
||||
// <o> XINCX_ADV_ADDR_H - rf Address Set
|
||||
#ifndef XINCX_ADV_ADDR_H
|
||||
#define XINCX_ADV_ADDR_H 0x00
|
||||
#endif
|
||||
|
||||
// <o> XINCX_ADV_CHANNEL - ADV Channel Set
|
||||
// <2402=> ADV_CHANNEL_37
|
||||
// <2426=> ADV_CHANNEL_38
|
||||
// <2480=> ADV_CHANNEL_39
|
||||
|
||||
#ifndef XINCX_ADV_CHANNEL
|
||||
#define XINCX_ADV_CHANNEL 2480
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_POWER - rf Power Set
|
||||
#ifndef XINCX_POWER
|
||||
#define XINCX_POWER 0x08
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_NVIC_MODE - RF NVIC Mode
|
||||
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_RF_ADV_NVIC_MODE
|
||||
#define XINCX_RF_ADV_NVIC_MODE 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_TX_ADDR_WIDTH - RF Tx Addr Width
|
||||
// <4=> 4 Bytes
|
||||
#ifndef XINCX_RF_TX_ADDR_WIDTH
|
||||
#define XINCX_RF_TX_ADDR_WIDTH 4
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_TRANS_RATE - RF Transmission Rate Config
|
||||
|
||||
// <0x02=> 1M
|
||||
#ifndef XINCX_RF_TRANS_RATE
|
||||
#define XINCX_RF_TRANS_RATE 0x02
|
||||
#endif
|
||||
|
||||
// <e> XINCX_RF_CRC_ENABLE - RF CRC Enable
|
||||
//==========================================================
|
||||
#ifndef XINCX_RF_CRC_ENABLE
|
||||
#define XINCX_RF_CRC_ENABLE 0
|
||||
#endif
|
||||
// </e>
|
||||
// <o> XINCX_2_4G_CRC_BYTE - 2.4g CRC Bytes Set
|
||||
|
||||
// <1=> 1 Byte
|
||||
// <2=> 2 Bytes
|
||||
#ifndef XINCX_2_4G_CRC_BYTE
|
||||
#define XINCX_2_4G_CRC_BYTE 2
|
||||
#endif
|
||||
|
||||
|
||||
// <h> XINCX_ADV_FEATURE_PARAM - ADV Feature Parameters
|
||||
//==========================================================
|
||||
// <q> XINCX_ADV_LONG_PLD - ADV Long Payload Feature
|
||||
#ifndef XINCX_ADV_LONG_PLD
|
||||
#define XINCX_ADV_LONG_PLD 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_ADV_FEC - ADV FEC&Interleave Feature
|
||||
#ifndef XINCX_ADV_FEC
|
||||
#define XINCX_ADV_FEC 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_ADV_WHITEN - ADV Whiten Feature
|
||||
#ifndef XINCX_ADV_WHITEN
|
||||
#define XINCX_ADV_WHITEN 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_ADV_DPL - ADV Dynamic Payload Length Feature
|
||||
#ifndef XINCX_ADV_DPL
|
||||
#define XINCX_ADV_DPL 0
|
||||
#endif
|
||||
// <q> XINCX_ADV_ACK_PAY - 2.4g Payload on ACK
|
||||
#ifndef XINCX_ADV_ACK_PAY
|
||||
#define XINCX_ADV_ACK_PAY 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_ADV_DYN_ACK - 2.4g W_TX_PAYLOAD_NOACK Command
|
||||
#ifndef XINCX_ADV_DYN_ACK
|
||||
#define XINCX_ADV_DYN_ACK 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// </h>
|
||||
// <h> XINCX_PIPE_PIPE_RX_PAYLEN - ADV Pipe Rx Payload Len
|
||||
//==========================================================
|
||||
// <o> XINCX_ADV_PIPE0_LEN - ADV Pipe0 Rx Payload Len
|
||||
#ifndef XINCX_ADV_PIPE0_LEN
|
||||
#define XINCX_ADV_PIPE0_LEN 42
|
||||
#endif
|
||||
|
||||
// <o> XINCX_ADV_PIPE1_LEN - ADV Pipe1 Rx Payload Len
|
||||
#ifndef XINCX_ADV_PIPE1_LEN
|
||||
#define XINCX_ADV_PIPE1_LEN 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_ADV_PIPE2_LEN - ADV Pipe2 Rx Payload Len
|
||||
#ifndef XINCX_ADV_PIPE2_LEN
|
||||
#define XINCX_ADV_PIPE2_LEN 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_ADV_PIPE3_LEN - ADV Pipe3 Rx Payload Len
|
||||
#ifndef XINCX_ADV_PIPE3_LEN
|
||||
#define XINCX_ADV_PIPE3_LEN 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_ADV_PIPE4_LEN - ADV Pipe4 Rx Payload Len
|
||||
#ifndef XINCX_ADV_PIPE4_LEN
|
||||
#define XINCX_ADV_PIPE4_LEN 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_ADV_PIPE5_LEN - ADV Pipe5 Rx Payload Len
|
||||
#ifndef XINCX_ADV_PIPE5_LEN
|
||||
#define XINCX_ADV_PIPE5_LEN 0
|
||||
#endif
|
||||
// </h>
|
||||
// <h> XINC_ADV_MAC_ADDR
|
||||
// <o> XINC_ADV_MAC_ADDR_0
|
||||
#ifndef XINC_ADV_MAC_ADDR_0
|
||||
#define XINC_ADV_MAC_ADDR_0 0xa6
|
||||
#endif
|
||||
|
||||
// <o> XINC_ADV_MAC_ADDR_1
|
||||
#ifndef XINC_ADV_MAC_ADDR_1
|
||||
#define XINC_ADV_MAC_ADDR_1 0xa5
|
||||
#endif
|
||||
|
||||
// <o> XINC_ADV_MAC_ADDR_2
|
||||
#ifndef XINC_ADV_MAC_ADDR_2
|
||||
#define XINC_ADV_MAC_ADDR_2 0xa4
|
||||
#endif
|
||||
|
||||
// <o> XINC_ADV_MAC_ADDR_3
|
||||
#ifndef XINC_ADV_MAC_ADDR_3
|
||||
#define XINC_ADV_MAC_ADDR_3 0xa3
|
||||
#endif
|
||||
|
||||
// <o> XINC_ADV_MAC_ADDR_4
|
||||
#ifndef XINC_ADV_MAC_ADDR_4
|
||||
#define XINC_ADV_MAC_ADDR_4 0xa2
|
||||
#endif
|
||||
|
||||
// <o> XINC_ADV_MAC_ADDR_5
|
||||
#ifndef XINC_ADV_MAC_ADDR_5
|
||||
#define XINC_ADV_MAC_ADDR_5 0xc1
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,288 @@
|
||||
|
||||
#ifndef SDK_CONFIG_H
|
||||
#define SDK_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>\n
|
||||
|
||||
// <h> Xinc_RF
|
||||
|
||||
// <o> XINCX_RF_MODE - RF Tx or Rx Mode
|
||||
// <0=> TX Mode
|
||||
// <1=> RX Mode
|
||||
#ifndef XINCX_RF_MODE
|
||||
#define XINCX_RF_MODE 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_ADDR_L - rf Address Set
|
||||
#ifndef XINCX_2_4G_ADDR_L
|
||||
#define XINCX_2_4G_ADDR_L 0xE7E7E7E6
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_ADDR_H - rf Address Set
|
||||
#ifndef XINCX_2_4G_ADDR_H
|
||||
#define XINCX_2_4G_ADDR_H 0xEA
|
||||
#endif
|
||||
// <h> XINCX_2_4G_AUTO_ACK - 2.4g Auto Acknowledgement
|
||||
//==========================================================
|
||||
// <o> XINCX_2_4G_PIPE0_ENAA - 2.4g Pipe0 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE0_ENAA
|
||||
#define XINCX_2_4G_PIPE0_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE1_ENAA - 2.4g Pipe1 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE1_ENAA
|
||||
#define XINCX_2_4G_PIPE1_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE2_ENAA - 2.4g Pipe2 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE2_ENAA
|
||||
#define XINCX_2_4G_PIPE2_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE3_ENAA - 2.4g Pipe3 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE3_ENAA
|
||||
#define XINCX_2_4G_PIPE3_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE4_ENAA - 2.4g Pipe4 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE4_ENAA
|
||||
#define XINCX_2_4G_PIPE4_ENAA 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE5_ENAA - 2.4g Pipe5 Auto Ack
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_2_4G_PIPE5_ENAA
|
||||
#define XINCX_2_4G_PIPE5_ENAA 1
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <o> XINCX_RF_POWER - rf Power Set
|
||||
#ifndef XINCX_POWER
|
||||
#define XINCX_POWER 0x00008
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_CHANNEL - 2.4g Channel Set
|
||||
#ifndef XINCX_2_4G_CHANNEL
|
||||
#define XINCX_2_4G_CHANNEL 2350
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_NVIC_MODE - RF NVIC Mode
|
||||
|
||||
// <0=> Disable
|
||||
// <1=> Enable
|
||||
#ifndef XINCX_RF_NVIC_MODE
|
||||
#define XINCX_RF_NVIC_MODE 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_TX_ADDR_WIDTH - RF Tx Addr Width
|
||||
|
||||
// <3=> 3 Bytes
|
||||
// <4=> 4 Bytes
|
||||
// <5=> 5 Bytes
|
||||
#ifndef XINCX_RF_TX_ADDR_WIDTH
|
||||
#define XINCX_RF_TX_ADDR_WIDTH 5
|
||||
#endif
|
||||
|
||||
// <o> XINCX_RF_TRANS_RATE - RF Transmission Rate Config
|
||||
|
||||
// <0x02=> 1M
|
||||
// <0x0A=> 2M
|
||||
// <0x22=> 250k
|
||||
// <0x2A=> 125k
|
||||
#ifndef XINCX_RF_TRANS_RATE
|
||||
#define XINCX_RF_TRANS_RATE 0x02
|
||||
#endif
|
||||
|
||||
// <e> XINCX_RF_CRC_ENABLE - RF CRC Enable
|
||||
//==========================================================
|
||||
#ifndef XINCX_RF_CRC_ENABLE
|
||||
#define XINCX_RF_CRC_ENABLE 1
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_CRC_BYTE - 2.4g CRC Bytes Set
|
||||
|
||||
// <1=> 1 Byte
|
||||
// <2=> 2 Bytes
|
||||
#ifndef XINCX_2_4G_CRC_BYTE
|
||||
#define XINCX_2_4G_CRC_BYTE 2
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// <h> XINCX_2_4G_FEATURE_PARAM - 2.4g Feature Parameters
|
||||
//==========================================================
|
||||
|
||||
|
||||
// <q> XINCX_2_4G_GUARD_CFG - 2.4g Long Payload Feature
|
||||
#ifndef XINCX_2_4G_GUARD_CFG
|
||||
#define XINCX_2_4G_GUARD_CFG 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_LONG_PLD_TYPE - 2.4g Long Pld Type
|
||||
#ifndef XINCX_2_4G_LONG_PLD_TYPE
|
||||
#define XINCX_2_4G_LONG_PLD_TYPE 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_PREAMBLE_NUM - 2.4g Preamble
|
||||
// <o> XINCX_2_4G_PREAMBLE_NUM
|
||||
// <0=> 1 Byte
|
||||
// <1=> 2 Bytes
|
||||
// <2=> 3 Bytes
|
||||
// <3=> 4 Bytes
|
||||
#ifndef XINCX_2_4G_PREAMBLE_NUM
|
||||
#define XINCX_2_4G_PREAMBLE_NUM 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_PREAMBLE_TYPE - 2.4g Preamble Type
|
||||
#ifndef XINCX_2_4G_PREAMBLE_TYPE
|
||||
#define XINCX_2_4G_PREAMBLE_TYPE 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_CRC_SCOPE_GUARD - 2.4g CRC Scope Guard
|
||||
#ifndef XINCX_2_4G_CRC_SCOPE_GUARD
|
||||
#define XINCX_2_4G_CRC_SCOPE_GUARD 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_CRC_SCOPE_HEADER - 2.4g CRC Scope Header
|
||||
#ifndef XINCX_2_4G_CRC_SCOPE_HEADER
|
||||
#define XINCX_2_4G_CRC_SCOPE_HEADER 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_CRC_SCOPE_ADDR - 2.4g CRC Scope Addr
|
||||
#ifndef XINCX_2_4G_CRC_SCOPE_ADDR
|
||||
#define XINCX_2_4G_CRC_SCOPE_ADDR 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_LONG_PLD - 2.4g Long Payload Feature
|
||||
#ifndef XINCX_2_4G_LONG_PLD
|
||||
#define XINCX_2_4G_LONG_PLD 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_FEC - 2.4g FEC&Interleave Feature
|
||||
#ifndef XINCX_2_4G_FEC
|
||||
#define XINCX_2_4G_FEC 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_WHITEN - 2.4g Whiten Feature
|
||||
#ifndef XINCX_2_4G_WHITEN
|
||||
#define XINCX_2_4G_WHITEN 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_DPL - 2.4g Dynamic Payload Length Feature
|
||||
#ifndef XINCX_2_4G_DPL
|
||||
#define XINCX_2_4G_DPL 1
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_ACK_PAY - 2.4g Payload on ACK
|
||||
#ifndef XINCX_2_4G_ACK_PAY
|
||||
#define XINCX_2_4G_ACK_PAY 0
|
||||
#endif
|
||||
|
||||
// <q> XINCX_2_4G_DYN_ACK - 2.4g W_TX_PAYLOAD_NOACK Command
|
||||
#ifndef XINCX_2_4G_DYN_ACK
|
||||
#define XINCX_2_4G_DYN_ACK 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_PREAMBLE - 2.4g preamble
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_PREAMBLE - 2.4g preamble
|
||||
#ifndef XINCX_2_4G_PREAMBLE
|
||||
#define XINCX_2_4G_PREAMBLE 0x710f5555
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_GUARD - 2.4g guard
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_GUARD - 2.4g guard
|
||||
#ifndef XINCX_2_4G_GUARD
|
||||
#define XINCX_2_4G_GUARD 0x8fc9
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
|
||||
// <h> XINCX_2_4G_DYNPD - 2.4g dynpd
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_DYNPD - 2.4g dynpd
|
||||
#ifndef XINCX_2_4G_DYNPD
|
||||
#define XINCX_2_4G_DYNPD 0x3f
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_CRY_CPT_ARRAY - 2.4g Crystal capacitor array
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_CRY_CPT_ARRAY - 2.4g Crystal capacitor array
|
||||
#ifndef XINCX_2_4G_CRY_CPT_ARRAY
|
||||
#define XINCX_2_4G_CRY_CPT_ARRAY 0x36
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> XINCX_2_4G_TRANS_PARAM - 2.4g Transmission Parameters
|
||||
//==========================================================
|
||||
|
||||
// <o> XINCX_2_4G_RETRANS_CNT - 2.4g Retransmit Count
|
||||
#ifndef XINCX_2_4G_RETRANS_CNT
|
||||
#define XINCX_2_4G_RETRANS_CNT 0
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_RETRANS_DELAY - 2.4g Retransmission Delay
|
||||
#ifndef XINCX_2_4G_RETRANS_DELAY
|
||||
#define XINCX_2_4G_RETRANS_DELAY 3
|
||||
#endif
|
||||
|
||||
// <h> XINCX_2_4G_PIPE_RX_PAYLEN - 2.4g Pipe Rx Payload Len
|
||||
//==========================================================
|
||||
// <o> - 2.4g Pipe0 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE0_LEN
|
||||
#define XINCX_2_4G_PIPE0_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE1_LEN - 2.4g Pipe1 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE1_LEN
|
||||
#define XINCX_2_4G_PIPE1_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE2_LEN - 2.4g Pipe2 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE2_LEN
|
||||
#define XINCX_2_4G_PIPE2_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE3_LEN - 2.4g Pipe3 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE3_LEN
|
||||
#define XINCX_2_4G_PIPE3_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE4_LEN - 2.4g Pipe4 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE4_LEN
|
||||
#define XINCX_2_4G_PIPE4_LEN 32
|
||||
#endif
|
||||
|
||||
// <o> XINCX_2_4G_PIPE5_LEN - 2.4g Pipe5 Rx Payload Len
|
||||
#ifndef XINCX_2_4G_PIPE5_LEN
|
||||
#define XINCX_2_4G_PIPE5_LEN 32
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// </h>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,103 @@
|
||||
#ifndef __APP_H
|
||||
#define __APP_H
|
||||
|
||||
#include "mtypes.h"
|
||||
#include "hal_api.h"
|
||||
#include "func.h"
|
||||
|
||||
#define LAMPTYPE 0x95
|
||||
|
||||
#define ID_MAP1 0
|
||||
#define ID_MAP2 0
|
||||
#define ID_MAP3 1
|
||||
#define ID_MAP4 2
|
||||
#define ID_MAP5 3
|
||||
#define ID_MAP6 4
|
||||
#define ID_MAP7 5
|
||||
#define ID_MAP8 6
|
||||
|
||||
|
||||
enum _param_type_t {
|
||||
PARAM1,
|
||||
PARAM2,
|
||||
PARAM3,
|
||||
PARAM4,
|
||||
PARAM5,
|
||||
PARAM6,
|
||||
PARAM7,
|
||||
PARAM8,
|
||||
PARAM9,
|
||||
PARAM10,
|
||||
PARAM11,
|
||||
PARAM12,
|
||||
PARAM13,
|
||||
};
|
||||
|
||||
|
||||
typedef struct _param_t {
|
||||
uint8_t aa;
|
||||
uint8_t bb;
|
||||
uint8_t cc;
|
||||
uint8_t dd;
|
||||
uint8_t ee[4];
|
||||
uint8_t ff[4];
|
||||
uint8_t gg[12];
|
||||
configa_t ca;
|
||||
configb_t cb;
|
||||
configc_t cd;
|
||||
configd_t ce;
|
||||
confige_t cf;
|
||||
uint8_t cg[8][4];
|
||||
}param_t;
|
||||
|
||||
|
||||
extern param_t param;
|
||||
extern setting_t settinga;
|
||||
extern setting_t settingb;
|
||||
extern setting_t settingc;
|
||||
extern cfga_t cfga;
|
||||
extern cfgb_t cfgb;
|
||||
extern cfgc_t cfgc;
|
||||
|
||||
|
||||
//main.c
|
||||
extern mftest_t mftest;
|
||||
extern uint16_t ccctime;
|
||||
extern uint8_t radar_setting(uint8_t *data, uint8_t save);
|
||||
|
||||
//app_light.c
|
||||
extern configa_t lampcfg;
|
||||
extern void light_init(void);
|
||||
extern void light_tick(void);
|
||||
extern void light_loop(void);
|
||||
extern void light_process_100ms(void);
|
||||
extern void light_set_mode(uint8_t *data, uint8_t save);
|
||||
extern void light_set_color(uint8_t *data, uint8_t save);
|
||||
extern void light_get_mode(uint8_t *data);
|
||||
extern void light_set_trig(void);
|
||||
extern void light_blink(uint32_t cycle, uint16_t times, uint8_t type);
|
||||
extern uint16_t light_nowout(void);
|
||||
|
||||
//app_rad.c
|
||||
extern uint16_t tttimes;
|
||||
extern void rad_init(void);
|
||||
extern void rad_tick(void);
|
||||
extern void rad_loop(void);
|
||||
extern void rad_100ms(void);
|
||||
extern void rad_minute(void);
|
||||
extern void rad_sethh(void);
|
||||
extern void rad_setout(uint8_t type, uint8_t wait);
|
||||
extern void rad_setled(uint16_t wait);
|
||||
extern uint8_t rad_getstat(void);
|
||||
extern uint32_t rad_getcount(void);
|
||||
|
||||
//app_store.h
|
||||
extern void store_init(void);
|
||||
extern void store_process_100ms(void);
|
||||
extern void store_write_param(uint8_t type, uint8_t *data);
|
||||
extern void store_clear_map(uint8_t mapid);
|
||||
extern void store_write_map(uint8_t mapid, uint8_t *data);
|
||||
extern void store_read_map(uint8_t mapid, uint8_t *data);
|
||||
extern void store_setfl(uint8_t number);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,494 @@
|
||||
#include "check.h"
|
||||
|
||||
//获取校验长度
|
||||
uint8_t check_size(uint8_t type)
|
||||
{
|
||||
uint8_t size = 0;
|
||||
|
||||
switch(type)
|
||||
{
|
||||
case CHECK_SUM8:
|
||||
case CHECK_XOR8:
|
||||
case CHECK_CRC8_MAXIM:
|
||||
size = 1;
|
||||
break;
|
||||
case CHECK_CRC16_MODBUS:
|
||||
size = 2;
|
||||
break;
|
||||
}
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
//获取校验值
|
||||
uint32_t check_value(check_t check, uint8_t *data)
|
||||
{
|
||||
uint32_t value = 0; //校验值
|
||||
|
||||
switch(check.type)
|
||||
{
|
||||
case CHECK_SUM8:
|
||||
value = CHECKSUM8(data+check.start, check.length);
|
||||
break;
|
||||
case CHECK_XOR8:
|
||||
value = XOR8(data+check.start, check.length);
|
||||
break;
|
||||
case CHECK_CRC8_MAXIM:
|
||||
value = CRC8_MAXIM(data+check.start, check.length);
|
||||
break;
|
||||
case CHECK_CRC16_MODBUS:
|
||||
value = CRC16_MODBUS(data+check.start, check.length);
|
||||
break;
|
||||
}
|
||||
|
||||
return value;
|
||||
}
|
||||
|
||||
//计算并比较校验
|
||||
uint8_t check_cmp(check_t check, uint8_t *data)
|
||||
{
|
||||
if(check.length > 0)
|
||||
{
|
||||
uint8_t size = check_size(check.type); //校验长度
|
||||
uint32_t value = check_value(check, data); //校验值
|
||||
|
||||
switch(size)
|
||||
{
|
||||
case 1: //1字节校验
|
||||
if(data[check.index] == (value&0xFF))
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
break;
|
||||
case 2: //2字节校验
|
||||
if((data[check.index] == (value&0xFF)) && (data[check.index+1] == ((value>>8)&0xFF)))
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
//计算并添加校验
|
||||
void check_add(check_t check, uint8_t *data)
|
||||
{
|
||||
if(check.length > 0)
|
||||
{
|
||||
uint8_t size = check_size(check.type); //校验长度
|
||||
uint32_t value = check_value(check, data); //校验值
|
||||
|
||||
switch(size)
|
||||
{
|
||||
case 1: //1字节校验
|
||||
data[check.index] = value & 0xFF;
|
||||
break;
|
||||
case 2: //2字节校验
|
||||
data[check.index] = value & 0xFF;
|
||||
data[check.index+1] = (value>>8) & 0xFF;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//校验和
|
||||
uint8_t CHECKSUM8(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint8_t sum = 0;
|
||||
while(length--)
|
||||
{
|
||||
sum += *data++;
|
||||
}
|
||||
return (sum);
|
||||
}
|
||||
|
||||
//异或校验
|
||||
uint8_t XOR8(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint8_t x = 0;
|
||||
while(length--)
|
||||
{
|
||||
x ^= *data++;
|
||||
}
|
||||
return (x);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-8: X8+X2+X+1
|
||||
* POLY: 0x07
|
||||
* INIT: 0x00
|
||||
* REFIN: FALSE
|
||||
* REFOUT: FALSE
|
||||
* XOROUT: 0x00
|
||||
**************************************************/
|
||||
uint8_t CRC8(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint8_t crc = 0x00;
|
||||
uint8_t poly = 0x07;
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= *data++;
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x80)
|
||||
crc = (crc << 1) ^ poly;
|
||||
else
|
||||
crc = crc << 1;
|
||||
}
|
||||
}
|
||||
return (crc);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-8/ITU: X8+X2+X+1
|
||||
* POLY: 0x07
|
||||
* INIT: 0x00
|
||||
* REFIN: FALSE
|
||||
* REFOUT: FALSE
|
||||
* XOROUT: 0x55
|
||||
**************************************************/
|
||||
uint8_t CRC8_ITU(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint8_t crc = 0x00;
|
||||
uint8_t poly = 0x07;
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= *data++;
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x80)
|
||||
crc = (crc << 1) ^ poly;
|
||||
else
|
||||
crc = crc << 1;
|
||||
}
|
||||
}
|
||||
return (crc ^ 0x55);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-8/ROHC: X8+X2+X+1
|
||||
* POLY: 0x07
|
||||
* INIT: 0xFF
|
||||
* REFIN: TRUE
|
||||
* REFOUT: TRUE
|
||||
* XOROUT: 0x00
|
||||
**************************************************/
|
||||
uint8_t CRC8_ROHC(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint8_t crc = 0xFF;
|
||||
uint8_t poly = 0xE0; //0x07字节颠倒后为0xE0
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= *data++;
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x01)
|
||||
crc = (crc >> 1) ^ poly;
|
||||
else
|
||||
crc = crc >> 1;
|
||||
}
|
||||
}
|
||||
return (crc);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-8/MAXIM: X8+X2+X+1
|
||||
* POLY: 0x31
|
||||
* INIT: 0x00
|
||||
* REFIN: TRUE
|
||||
* REFOUT: TRUE
|
||||
* XOROUT: 0x00
|
||||
**************************************************/
|
||||
uint8_t CRC8_MAXIM(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint8_t crc = 0x00;
|
||||
uint8_t poly = 0x8C; //0x31字节颠倒后为0x8C
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= *data++;
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x01)
|
||||
crc = (crc >> 1) ^ poly;
|
||||
else
|
||||
crc = crc >> 1;
|
||||
}
|
||||
}
|
||||
return (crc);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-8: X8+X4+X3+X2+1
|
||||
* POLY: 0x1D
|
||||
* INIT: 0x00
|
||||
* REFIN: FALSE
|
||||
* REFOUT: FALSE
|
||||
* XOROUT: 0x00
|
||||
**************************************************/
|
||||
uint8_t CRC8_SAE(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint8_t crc = 0x00;
|
||||
uint8_t poly = 0x1D;
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= *data++;
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x80)
|
||||
crc = (crc << 1) ^ poly;
|
||||
else
|
||||
crc = crc << 1;
|
||||
}
|
||||
}
|
||||
return (crc);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-16/CCITT: X16+X12+X5+1
|
||||
* POLY: 0x1021
|
||||
* INIT: 0x0000
|
||||
* REFIN: TRUE
|
||||
* REFOUT: TRUE
|
||||
* XOROUT: 0x0000
|
||||
**************************************************/
|
||||
uint16_t CRC16_CCITT(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint16_t crc = 0x0000;
|
||||
uint16_t poly = 0x8408; //0x1021字节颠倒后为0x8408
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= *data++;
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x01)
|
||||
crc = (crc >> 1) ^ poly;
|
||||
else
|
||||
crc = crc >> 1;
|
||||
}
|
||||
}
|
||||
return (crc);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-16/CCITT-FALSE: X16+X12+X5+1
|
||||
* POLY: 0x1021
|
||||
* INIT: 0xFFFF
|
||||
* REFIN: FALSE
|
||||
* REFOUT: FALSE
|
||||
* XOROUT: 0x0000
|
||||
**************************************************/
|
||||
uint16_t CRC16_CCITT_FALSE(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint16_t crc = 0xFFFF;
|
||||
uint16_t poly = 0x1021;
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= ((*data++) << 8);
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x8000)
|
||||
crc = (crc << 1) ^ poly;
|
||||
else
|
||||
crc = crc << 1;
|
||||
}
|
||||
}
|
||||
return (crc);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-16/XMODEM: X16+X12+X5+1
|
||||
* POLY: 0x1021
|
||||
* INIT: 0x0000
|
||||
* REFIN: FALSE
|
||||
* REFOUT: FALSE
|
||||
* XOROUT: 0x0000
|
||||
**************************************************/
|
||||
uint16_t CRC16_XMODEM(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint16_t crc = 0x0000;
|
||||
uint16_t poly = 0x1021;
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= ((*data++) << 8);
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x8000)
|
||||
crc = (crc << 1) ^ poly;
|
||||
else
|
||||
crc = crc << 1;
|
||||
}
|
||||
}
|
||||
return (crc);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-16/X25: X16+X12+X5+1
|
||||
* POLY: 0x1021
|
||||
* INIT: 0xFFFF
|
||||
* REFIN: TRUE
|
||||
* REFOUT: TRUE
|
||||
* XOROUT: 0xFFFF
|
||||
**************************************************/
|
||||
uint16_t CRC16_X25(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint16_t crc = 0xFFFF;
|
||||
uint16_t poly = 0x8408; //0x1021字节颠倒后为0x8408
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= *data++;
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x01)
|
||||
crc = (crc >> 1) ^ poly;
|
||||
else
|
||||
crc = crc >> 1;
|
||||
}
|
||||
}
|
||||
return (crc^0xFFFF);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-16/MODBUS: X16+X12+X5+1
|
||||
* POLY: 0x8005
|
||||
* INIT: 0xFFFF
|
||||
* REFIN: TRUE
|
||||
* REFOUT: TRUE
|
||||
* XOROUT: 0x0000
|
||||
**************************************************/
|
||||
uint16_t CRC16_MODBUS(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint16_t crc = 0xFFFF;
|
||||
uint16_t poly = 0xA001; //0x8005字节颠倒后为0xA001
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= *data++;
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x01)
|
||||
crc = (crc >> 1) ^ poly;
|
||||
else
|
||||
crc = crc >> 1;
|
||||
}
|
||||
}
|
||||
return (crc);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-16/IBM: X16+X12+X5+1
|
||||
* POLY: 0x8005
|
||||
* INIT: 0x0000
|
||||
* REFIN: TRUE
|
||||
* REFOUT: TRUE
|
||||
* XOROUT: 0x0000
|
||||
**************************************************/
|
||||
uint16_t CRC16_IBM(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint16_t crc = 0x0000;
|
||||
uint16_t poly = 0xA001; //0x8005字节颠倒后为0xA001
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= *data++;
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x01)
|
||||
crc = (crc >> 1) ^ poly;
|
||||
else
|
||||
crc = crc >> 1;
|
||||
}
|
||||
}
|
||||
return (crc);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-16/MAXIM: X16+X12+X5+1
|
||||
* POLY: 0x8005
|
||||
* INIT: 0x0000
|
||||
* REFIN: TRUE
|
||||
* REFOUT: TRUE
|
||||
* XOROUT: 0xFFFF
|
||||
**************************************************/
|
||||
uint16_t CRC16_MAXIM(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint16_t crc = 0x0000;
|
||||
uint16_t poly = 0xA001; //0x8005字节颠倒后为0xA001
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= *data++;
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x01)
|
||||
crc = (crc >> 1) ^ poly;
|
||||
else
|
||||
crc = crc >> 1;
|
||||
}
|
||||
}
|
||||
return (crc^0xFFFF);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-16/USB: X16+X12+X5+1
|
||||
* POLY: 0x8005
|
||||
* INIT: 0xFFFF
|
||||
* REFIN: TRUE
|
||||
* REFOUT: TRUE
|
||||
* XOROUT: 0xFFFF
|
||||
**************************************************/
|
||||
uint16_t CRC16_USB(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint16_t crc = 0xFFFF;
|
||||
uint16_t poly = 0xA001; //0x8005字节颠倒后为0xA001
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= *data++;
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x01)
|
||||
crc = (crc >> 1) ^ poly;
|
||||
else
|
||||
crc = crc >> 1;
|
||||
}
|
||||
}
|
||||
return (crc^0xFFFF);
|
||||
}
|
||||
|
||||
/*************************************************
|
||||
* CRC-16/NDP: X16+X12+X5+1
|
||||
* POLY: 0x3D65
|
||||
* INIT: 0x0000
|
||||
* REFIN: TRUE
|
||||
* REFOUT: TRUE
|
||||
* XOROUT: 0xFFFF
|
||||
**************************************************/
|
||||
uint16_t CRC16_NDP(const uint8_t *data, uint16_t length)
|
||||
{
|
||||
uint16_t crc = 0x0000;
|
||||
uint16_t poly = 0xA6BC; //0x3D65字节颠倒后为0xA6BC
|
||||
|
||||
while(length--)
|
||||
{
|
||||
crc ^= *data++;
|
||||
for(uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if(crc & 0x01)
|
||||
crc = (crc >> 1) ^ poly;
|
||||
else
|
||||
crc = crc >> 1;
|
||||
}
|
||||
}
|
||||
return (crc^0xFFFF);
|
||||
}
|
||||
@@ -0,0 +1,46 @@
|
||||
#ifndef __CHECK_H
|
||||
#define __CHECK_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
//¶¨ÒåУÑéÀàÐÍ
|
||||
enum _checktype_t
|
||||
{
|
||||
CHECK_SUM8,
|
||||
CHECK_XOR8,
|
||||
CHECK_CRC8_MAXIM,
|
||||
CHECK_CRC16_MODBUS,
|
||||
};
|
||||
|
||||
//¶¨ÒåУÑé¸ñʽ
|
||||
typedef struct _check_t {
|
||||
uint8_t type; //УÑéÀàÐÍ
|
||||
uint8_t start; //УÑéÆðʼλÖÃ
|
||||
uint8_t length;//УÑ鳤¶È
|
||||
uint8_t index; //УÑéֵλÖÃ
|
||||
}check_t;
|
||||
|
||||
extern uint8_t check_size(uint8_t type);
|
||||
extern uint8_t check_cmp(check_t check, uint8_t *data);
|
||||
extern void check_add(check_t check, uint8_t *data);
|
||||
|
||||
extern uint8_t CHECKSUM8(const uint8_t *data, uint16_t length);
|
||||
extern uint8_t XOR8(const uint8_t *data, uint16_t length);
|
||||
extern uint8_t CRC8(const uint8_t *data, uint16_t length);
|
||||
extern uint8_t CRC8_ITU(const uint8_t *data, uint16_t length);
|
||||
extern uint8_t CRC8_ROHC(const uint8_t *data, uint16_t length);
|
||||
extern uint8_t CRC8_MAXIM(const uint8_t *data, uint16_t length);
|
||||
extern uint8_t CRC8_SAE(const uint8_t *data, uint16_t length);
|
||||
extern uint16_t CRC16_CCITT(const uint8_t *data, uint16_t length);
|
||||
extern uint16_t CRC16_CCITT_FALSE(const uint8_t *data, uint16_t length);
|
||||
extern uint16_t CRC16_XMODEM(const uint8_t *data, uint16_t length);
|
||||
extern uint16_t CRC16_X25(const uint8_t *data, uint16_t length);
|
||||
extern uint16_t CRC16_MODBUS(const uint8_t *data, uint16_t length);
|
||||
extern uint16_t CRC16_IBM(const uint8_t *data, uint16_t length);
|
||||
extern uint16_t CRC16_MAXIM(const uint8_t *data, uint16_t length);
|
||||
extern uint16_t CRC16_USB(const uint8_t *data, uint16_t length);
|
||||
extern uint16_t CRC16_NDP(const uint8_t *data, uint16_t length);
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,286 @@
|
||||
#include "app.h"
|
||||
#include "xc_hal.h"
|
||||
#include "xc_24g.h"
|
||||
const uint16_t lightmap[32] = {65535, 13107, 6554, 2621, 1311, 655, 328, 218, 164, 131, 82, 66, 44, 33, 26, 22, 19, 16, 15, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1};//ÁÁÃðµÆËٶȱí
|
||||
|
||||
configa_t lampcfg = {0};
|
||||
|
||||
struct _lamprun_t {
|
||||
uint16_t ll1;
|
||||
uint16_t ll2;
|
||||
uint32_t ll3;
|
||||
uint16_t ll4;
|
||||
uint16_t ll5;
|
||||
uint16_t ll6[5];
|
||||
uint16_t ll7[5];
|
||||
}runval;
|
||||
|
||||
struct _rlight_t {
|
||||
uint16_t val;
|
||||
uint16_t tar;
|
||||
uint16_t out;
|
||||
float now;
|
||||
float step;
|
||||
}rlight;
|
||||
|
||||
struct _rcolor_t {
|
||||
uint16_t val[5];
|
||||
uint16_t tar[5];
|
||||
uint16_t out[5];
|
||||
float now[5];
|
||||
float step[5];
|
||||
}rcolor;
|
||||
|
||||
uint16_t rspeed;
|
||||
uint16_t blink_speed = 0;
|
||||
uint16_t blink_cycle = 0;
|
||||
uint8_t blink_type = 0;
|
||||
|
||||
volatile uint16_t updata_wait = 0;
|
||||
volatile uint32_t blink_wait = 0;
|
||||
volatile uint32_t light_count;
|
||||
volatile uint32_t test1_wait = 0;
|
||||
volatile uint32_t test2_wait = 0;
|
||||
|
||||
|
||||
static void updata_runval(void)
|
||||
{
|
||||
runval.ll1 = (uint32_t)(lampcfg.light1 * 65535) / 100;
|
||||
runval.ll2 = (uint32_t)(lampcfg.light0 * 65535) / 100;
|
||||
runval.ll3 = lampcfg.time * SEC(10);
|
||||
runval.ll4 = lightmap[(lampcfg.uidx>>1)&0x1F];
|
||||
runval.ll5 = lightmap[lampcfg.didx&0x1F];
|
||||
for(uint8_t i = 0; i < 5; i++)
|
||||
{
|
||||
runval.ll6[i] = lampcfg.color1[i] * 257;
|
||||
runval.ll7[i] = lampcfg.color0[i] * 257;
|
||||
}
|
||||
}
|
||||
|
||||
void light_init(void)
|
||||
{
|
||||
lampcfg = param.ca;
|
||||
updata_runval();
|
||||
|
||||
if(runval.ll1 == runval.ll2)
|
||||
{
|
||||
for(uint8_t i = 0; i < 5; i++)
|
||||
{
|
||||
rcolor.now[i] = (float)runval.ll7[i];
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
for(uint8_t i = 0; i < 5; i++)
|
||||
{
|
||||
rcolor.now[i] = (float)runval.ll6[i];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void light_tick(void)
|
||||
{
|
||||
if(light_count < 0xFFFFFFFF)
|
||||
{
|
||||
light_count++;
|
||||
}
|
||||
if(updata_wait > 0)
|
||||
{
|
||||
updata_wait--;
|
||||
}
|
||||
if(blink_wait > 0)
|
||||
{
|
||||
blink_wait--;
|
||||
}
|
||||
}
|
||||
|
||||
void light_process_100ms(void)
|
||||
{
|
||||
if(test1_wait > 0)
|
||||
{
|
||||
test1_wait--;
|
||||
}
|
||||
if(test2_wait > 0)
|
||||
{
|
||||
test2_wait--;
|
||||
}
|
||||
}
|
||||
|
||||
static float light_updata(float now, float target, float speed)
|
||||
{
|
||||
if(now < target)
|
||||
{
|
||||
now += speed;
|
||||
if(now > target) {now = target;}
|
||||
}
|
||||
else if(now > target)
|
||||
{
|
||||
now -= speed;
|
||||
if(now < target) {now = target;}
|
||||
}
|
||||
return now;
|
||||
}
|
||||
|
||||
static void setout1(void)
|
||||
{
|
||||
rlight.val = runval.ll1;
|
||||
for(uint8_t i = 0; i < 5; i++)
|
||||
{
|
||||
rcolor.val[i] = runval.ll6[i];
|
||||
}
|
||||
}
|
||||
|
||||
static void setout0(void)
|
||||
{
|
||||
rlight.val = runval.ll2;
|
||||
for(uint8_t i = 0; i < 5; i++)
|
||||
{
|
||||
rcolor.val[i] = runval.ll7[i];
|
||||
}
|
||||
}
|
||||
|
||||
__RAM_CODE void light_loop(void)
|
||||
{
|
||||
|
||||
if(blink_wait > 0)
|
||||
{
|
||||
if(blink_type == BLINK)
|
||||
{
|
||||
rlight.val = ((blink_wait%blink_cycle) > (blink_cycle>>1)) ? 0 : 45874;
|
||||
}
|
||||
else if(blink_type == BLINK2)
|
||||
{
|
||||
rlight.val = ((blink_wait%blink_cycle) > (blink_cycle>>1)) ? 45874 : 3276;
|
||||
}
|
||||
rspeed = blink_speed;
|
||||
}
|
||||
else
|
||||
{
|
||||
if(runval.ll3 == 0)
|
||||
{
|
||||
if(blink_type == 0) rspeed = runval.ll5;
|
||||
}
|
||||
else if(runval.ll1 == runval.ll2)
|
||||
{
|
||||
setout0();
|
||||
if(blink_type == 0) rspeed = runval.ll4;
|
||||
}
|
||||
else if(light_count < runval.ll3)
|
||||
{
|
||||
setout1();
|
||||
if(blink_type == 0) rspeed = runval.ll4;
|
||||
}
|
||||
else
|
||||
{
|
||||
setout0();
|
||||
if(blink_type == 0) rspeed = runval.ll5;
|
||||
}
|
||||
}
|
||||
|
||||
if(updata_wait == 0)
|
||||
{
|
||||
updata_wait = MSEC(10);
|
||||
|
||||
if(rlight.tar != rlight.val || rcolor.tar[0] != rcolor.val[0] || rcolor.tar[1] != rcolor.val[1] ||
|
||||
rcolor.tar[2] != rcolor.val[2] || rcolor.tar[3] != rcolor.val[3] || rcolor.tar[4] != rcolor.val[4])
|
||||
{
|
||||
rlight.tar = rlight.val;
|
||||
for(uint8_t i = 0; i < 5; i++)
|
||||
{
|
||||
rcolor.tar[i] = rcolor.val[i];
|
||||
}
|
||||
rlight.step = (rspeed * f_delta(rlight.now, rlight.tar)) / 65535.0f;
|
||||
for(uint8_t i = 0; i < 5; i++)
|
||||
{
|
||||
rcolor.step[i] = (rspeed * f_delta(rcolor.now[i], rcolor.tar[i])) / 65535.0f;
|
||||
}
|
||||
}
|
||||
|
||||
rlight.now = light_updata(rlight.now, rlight.tar, rlight.step);
|
||||
rlight.out = (uint16_t)rlight.now;
|
||||
|
||||
for(uint8_t i = 0; i < 5; i++)
|
||||
{
|
||||
rcolor.now[i] = light_updata(rcolor.now[i], rcolor.tar[i], rcolor.step[i]);
|
||||
rcolor.out[i] = (uint16_t)rcolor.now[i];
|
||||
}
|
||||
|
||||
api_pwm_out(rlight.out, rcolor.out);
|
||||
|
||||
if((blink_wait == 0) && (rlight.out == rlight.tar))
|
||||
{
|
||||
blink_type = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void light_set_mode(uint8_t *data, uint8_t save)
|
||||
{
|
||||
if(data[0] <= 100) lampcfg.light1 = data[0];
|
||||
if(data[1] <= 100) lampcfg.light0 = data[1];
|
||||
if(data[2] <= 254) lampcfg.time = data[2];
|
||||
lampcfg.didx = (data[3]&0x3F);
|
||||
lampcfg.uidx = (data[6]&0x3F);
|
||||
if((data[5]<<8|data[4]) < 65535)
|
||||
{
|
||||
lampcfg.weight = data[5]<<8|data[4];
|
||||
}
|
||||
updata_runval();
|
||||
|
||||
if(save != 0) store_write_param(PARAM8, lampcfg.data);
|
||||
}
|
||||
|
||||
void light_set_color(uint8_t *data, uint8_t save)
|
||||
{
|
||||
if(data[0] <= 100) lampcfg.light1 = data[0];
|
||||
if(data[1] <= 100) lampcfg.light0 = data[1];
|
||||
for(uint8_t i = 0; i < 5; i++)
|
||||
{
|
||||
lampcfg.color1[i] = data[2+i];
|
||||
lampcfg.color0[i] = data[7+i];
|
||||
}
|
||||
updata_runval();
|
||||
|
||||
if(save != 0) store_write_param(PARAM8, lampcfg.data);
|
||||
}
|
||||
|
||||
void light_get_mode(uint8_t *data)
|
||||
{
|
||||
data[0] = lampcfg.light1;
|
||||
data[1] = lampcfg.light0;
|
||||
data[2] = lampcfg.time;
|
||||
data[6] = lampcfg.uidx;
|
||||
data[3] = lampcfg.didx;
|
||||
data[4] = lampcfg.weight & 0xFF;
|
||||
data[5] = lampcfg.weight >> 8;
|
||||
}
|
||||
|
||||
void light_set_trig(void)
|
||||
{
|
||||
light_count = 0;
|
||||
}
|
||||
|
||||
void light_blink(uint32_t cycle, uint16_t times, uint8_t type)
|
||||
{
|
||||
if(blink_wait == 0 && times > 0)
|
||||
{
|
||||
blink_type = type;
|
||||
blink_cycle = cycle;
|
||||
blink_speed = 2621400/cycle;
|
||||
blink_wait = blink_cycle*times-1;
|
||||
if(blink_type == BLINK2)
|
||||
{
|
||||
light_count = 0xFFFFFFFF;
|
||||
}
|
||||
}
|
||||
else if(times == 0)
|
||||
{
|
||||
blink_wait = 0;
|
||||
}
|
||||
}
|
||||
|
||||
uint16_t light_nowout(void)
|
||||
{
|
||||
return rlight.now;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,449 @@
|
||||
/*
|
||||
* @Descripttion:
|
||||
* @version:
|
||||
* @Author: sueRimn
|
||||
* @Date: 2023-12-12 14:23:55
|
||||
* @LastEditors: sueRimn
|
||||
* @LastEditTime: 2024-03-28 11:25:14
|
||||
*/
|
||||
/*!
|
||||
* \file main.c
|
||||
*
|
||||
* \brief Target main implementation
|
||||
*
|
||||
* \copyright Revised BSD License, see section \ref LICENSE.
|
||||
*
|
||||
* \code
|
||||
*
|
||||
* _ __ _ ________ _
|
||||
* | |/ /(_)___ / ____/ /_ (_)___
|
||||
* | // / __ \/ / / __ \/ / __ \
|
||||
* / |/ / / / / /___/ / / / / /_/ /
|
||||
* /_/|_/_/_/ /_/\____/_/ /_/_/ .___/
|
||||
* /_/
|
||||
* (C) 2022-2025 XinChip
|
||||
*
|
||||
* \endcode
|
||||
*
|
||||
* \author ( XinChip ) Alex-J
|
||||
*
|
||||
* \author ( XinChip )
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------------------
|
||||
INCLUDE HEADE FILES
|
||||
------------------------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "xc6xxx_rf_ADV.h"
|
||||
#include "mtypes.h"
|
||||
/*------------------------------------------------------------------------------------
|
||||
Macros
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Global Variables
|
||||
-------------------------------------------------------------------------------------*/
|
||||
uint8_t recv_adv_buf[ADV_BUFF_LEN] = {0};
|
||||
|
||||
uint8_t rf_adv_channel[] = {RF_ADV_CHANNEL_37, RF_ADV_CHANNEL_38, RF_ADV_CHANNEL_39};
|
||||
uint8_t adv_index = 0;
|
||||
/*------------------------------------------------------------------------------------
|
||||
Func Prototype
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/*------------------------------------------------------------------------------------
|
||||
Functions
|
||||
-------------------------------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief clock_init
|
||||
* @details
|
||||
* @param void
|
||||
* @retval void
|
||||
*/
|
||||
void clock_init(void)
|
||||
{
|
||||
CLOCK_InitCfg_t clock_cfg;
|
||||
|
||||
clock_cfg.hfclk_src = CLOCK_HFCLK_SRC_XTAL;
|
||||
clock_cfg.hfclk_in = CLOCK_HFCLK_IN_32M;
|
||||
#if (RC_32K)
|
||||
clock_cb.lfclk_src = CLOCK_LFCLK_SRC_RC;
|
||||
#endif //(RC_32K)
|
||||
|
||||
#if (XTAL_32K)
|
||||
clock_cb.lfclk_src = CLOCK_LFCLK_SRC_XTAL;
|
||||
#endif // (XTAL_32K)
|
||||
|
||||
#if (XTAL_32768K)
|
||||
clock_cb.lfclk_src = CLOCK_LFCLK_SRC_XTAL;
|
||||
#endif // (XTAL_32768K)
|
||||
|
||||
if (clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_XTAL) {
|
||||
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32768;
|
||||
} else if (clock_cfg.lfclk_src == CLOCK_LFCLK_SRC_RC) {
|
||||
clock_cfg.lfclk_in = CLOCK_LFCLK_IN_32K;
|
||||
}
|
||||
|
||||
xc_clock_init_cfg(&clock_cfg);
|
||||
|
||||
SysTick_Config(xc_clock_hfclk_in_get() / 100);
|
||||
SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
|
||||
}
|
||||
|
||||
void app_uart_init(void)
|
||||
{
|
||||
GPIO_InitCfg_t gpio_cfg = {0};
|
||||
|
||||
gpio_cfg.Mux = GPIO_Mux0;
|
||||
gpio_cfg.Pull = GPIO_PULLUP;
|
||||
gpio_cfg.Int = NOT_INT;
|
||||
gpio_cfg.FunSel = UART0_TX;
|
||||
|
||||
gpio_cfg.Pin = GPIO_18;
|
||||
gpio_cfg.Dir = GPIO_DIR_OUTPUT;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
gpio_cfg.FunSel = UART0_RX;
|
||||
gpio_cfg.Pin = GPIO_19;
|
||||
gpio_cfg.Dir = GPIO_DIR_INPUT;
|
||||
xc_gpio_init(&gpio_cfg);
|
||||
|
||||
UART_InitCfg_t uart_cfg = {0};
|
||||
|
||||
uart_cfg.Parity = UART_PARITY_DISABLE;
|
||||
uart_cfg.StopBits = UART_STOP_1_BITS;
|
||||
uart_cfg.WordLength = UART_DATA_8_BITS;
|
||||
uart_cfg.BaudRate = UART_BAUDRATE_115200;
|
||||
uart_cfg.HardwareFlowControl = UART_HWFC_DISABLE;
|
||||
|
||||
xc_uart_init(UART0_IDX, &uart_cfg);
|
||||
}
|
||||
/**
|
||||
* @brief Rf 2.4g dump log
|
||||
* @param void
|
||||
*
|
||||
* @retval void
|
||||
*/
|
||||
#ifdef DEBUG_LOG
|
||||
void rf_dump_log(void)
|
||||
{
|
||||
LOGI("***************** 2.4G Param ******************\n");
|
||||
LOGI("CFG_TOP: 0x%08x\r\n", XC_RF_2_4G->CFG_TOP);
|
||||
LOGI("EN_AA: 0x%08x\r\n", XC_RF_2_4G->EN_AA);
|
||||
LOGI("EN_RXADDR: 0x%08x\r\n", XC_RF_2_4G->EN_RXADDR);
|
||||
LOGI("SETUP_AW: 0x%08x\r\n", XC_RF_2_4G->SETUP_AW);
|
||||
LOGI("SETUP_RETR: 0x%08x\r\n", XC_RF_2_4G->SETUP_RETR);
|
||||
LOGI("RF_CH: 0x%08x\r\n", XC_RF_2_4G->RF_CH);
|
||||
LOGI("SETUP_RF: 0x%08x\r\n", XC_RF_2_4G->SETUP_RF);
|
||||
LOGI("STATUS: 0x%08x\r\n", XC_RF_2_4G->STATUS);
|
||||
LOGI("OBSERVE_TX: 0x%08x\r\n", XC_RF_2_4G->OBSERVE_TX);
|
||||
LOGI("RSSI: 0x%08x\r\n", XC_RF_2_4G->RSSI);
|
||||
LOGI("RX_ADDR_P0: 0x%02x %08x\r\n", 0xFF & (XC_RF_2_4G->RX_ADDR_P0_H), XC_RF_2_4G->RX_ADDR_P0_L);
|
||||
LOGI("RX_ADDR_P1: 0x%02x %08x\r\n", 0xFF & (XC_RF_2_4G->RX_ADDR_P1_H), XC_RF_2_4G->RX_ADDR_P1_L);
|
||||
LOGI("RX_ADDR_P2TOP5:0x%08x\r\n", XC_RF_2_4G->RX_ADDR_P2TOP5);
|
||||
LOGI("BER_RESULT: 0x%08x%08x\r\n", XC_RF_2_4G->BER_ERR_CNT, XC_RF_2_4G->BER_RECV_CNT);
|
||||
LOGI("AGC_SETTING: 0x%08x\r\n", XC_RF_2_4G->AGC_SETTING);
|
||||
LOGI("PGA_SETTING: 0x%02x %08x\r\n", ((XC_RF_2_4G->TX_ADDR_H) & 0xFF00) >> 8, XC_RF_2_4G->PGA_SETTING);
|
||||
LOGI("TX_ADDR: 0x%02x %08x\r\n", ((XC_RF_2_4G->TX_ADDR_H) & 0xFF), XC_RF_2_4G->TX_ADDR_L);
|
||||
LOGI("RX_PW_PX: 0x%04x %08x\r\n", 0xFFFF & (XC_RF_2_4G->RX_PW_Px_H), XC_RF_2_4G->RX_PW_Px_L);
|
||||
LOGI("STATUS_FIFO: 0x%08x\r\n", XC_RF_2_4G->STATUS_FIFO);
|
||||
LOGI("RSSIREC: 0x%08x\r\n", XC_RF_2_4G->RSSIREC);
|
||||
LOGI("TXPROC_CFG: 0x%08x\r\n", XC_RF_2_4G->TXPROC_CFG);
|
||||
LOGI("RXPROC_CFG: 0x%02x %08x\r\n", 0xFF & (XC_RF_2_4G->RXPROC_CFG_H), XC_RF_2_4G->RXPROC_CFG_L);
|
||||
LOGI("DYNPD: 0x%08x\r\n", XC_RF_2_4G->DYNPD);
|
||||
LOGI("FEATURE: 0x%08x\r\n", XC_RF_2_4G->FEATURE);
|
||||
LOGI("PGA_SETTING_H: 0x%08x\r\n", XC_RF_2_4G->TX_ADDR_H);
|
||||
LOGI("***********************************************\n");
|
||||
LOGI("\r\n");
|
||||
}
|
||||
#endif // DEBUG_LOG
|
||||
|
||||
/**
|
||||
* @brief RF ADV data package filling
|
||||
* @param uint8_t * - buff
|
||||
* uint8_t - len
|
||||
* @return uint8_t - data len
|
||||
*/
|
||||
|
||||
uint8_t rf_adv_packet(uint8_t *buff)
|
||||
{
|
||||
if (sizeof(buff) > ADV_LENGTH) {
|
||||
buff = NULL;
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
uint8_t l = 0;
|
||||
|
||||
buff[l++] = 0x42;
|
||||
buff[l++] = ADV_LENGTH - 5;
|
||||
|
||||
/* Simulate Bluetooth MAC address */
|
||||
uint8_t rf_adv_mac_addr[6] = {MAC_ADDR_0, MAC_ADDR_1, MAC_ADDR_2, MAC_ADDR_3, MAC_ADDR_4, MAC_ADDR_5};
|
||||
memcpy(&buff[l], rf_adv_mac_addr, sizeof(rf_adv_mac_addr));
|
||||
l += sizeof(rf_adv_mac_addr);
|
||||
|
||||
buff[l++] = 0x02;
|
||||
buff[l++] = 0x01;
|
||||
buff[l++] = 0x06;
|
||||
|
||||
buff[l++] = ADV_LENGTH - 15;
|
||||
|
||||
// Complete Local Name
|
||||
buff[l++] = 0x09;
|
||||
|
||||
/* Simulate Bluetooth broadcast data */
|
||||
uint8_t rf_adv_data_buff[26] = {"RF-ADV-TEST-123456789BLE52"};
|
||||
memcpy(&buff[l], rf_adv_data_buff, sizeof(rf_adv_data_buff));
|
||||
l += sizeof(rf_adv_data_buff);
|
||||
|
||||
/* CRC */
|
||||
buff[l++] = 0x55;
|
||||
buff[l++] = 0x55;
|
||||
buff[l++] = 0x55;
|
||||
|
||||
return l;
|
||||
}
|
||||
/**
|
||||
* @brief Rf adv tx event
|
||||
* @param void
|
||||
*
|
||||
* @retval void
|
||||
*/
|
||||
|
||||
void rf_adv_tx_evevt(void)
|
||||
{
|
||||
uint8_t len = 0;
|
||||
uint8_t buff[ADV_LENGTH];
|
||||
LOGI("************ADV Send Start**************\r\n");
|
||||
|
||||
while (1) {
|
||||
|
||||
/* Set testing frequency points */
|
||||
rf_set_channel(RF_ADV_BASE + rf_adv_channel[adv_index]);
|
||||
|
||||
/* Simulate Bluetooth broadcast data filling */
|
||||
len = rf_adv_packet(buff);
|
||||
|
||||
/* Simulate Bluetooth broadcast package software CRC */
|
||||
ble_crc(buff, len - 3, buff + len - 3);
|
||||
|
||||
/* Simulate Bluetooth broadcast package software whitening */
|
||||
ble_whiten(buff, len, bleWhitenStart(RF_ADV_BASE + rf_adv_channel[adv_index]));
|
||||
|
||||
/* Send data processing */
|
||||
rf_tx_packet(buff, len);
|
||||
|
||||
adv_index += 1;
|
||||
if (adv_index == sizeof(rf_adv_channel)) {
|
||||
adv_index = 0;
|
||||
}
|
||||
delay_ms(10);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RF rx adv event
|
||||
* @param void
|
||||
*
|
||||
* @retval void
|
||||
*/
|
||||
|
||||
#if (XINCX_RF_ADV_NVIC_MODE == true)
|
||||
void rf_adv_rx_evevt(void)
|
||||
{
|
||||
uint8_t data_len = 0;
|
||||
uint32_t blecrc = 0;
|
||||
uint8_t rf_adv_crc_stat = CRC_IDLE;
|
||||
LOGI("************ADV Recv Start**************\r\n");
|
||||
/* Set testing frequency points */
|
||||
rf_set_channel(XINCX_ADV_CHANNEL);
|
||||
|
||||
/* Enable RF24G interrupt */
|
||||
NVIC_EnableIRQ(RF24G_IRQn);
|
||||
|
||||
/* Entering the receiver */
|
||||
CE_CTL_HIGH;
|
||||
|
||||
while (1) {
|
||||
if ((recv_len != 0) && (rf24g_handler_flag)) {
|
||||
/* Entering standby mode */
|
||||
CE_CTL_LOW;
|
||||
rf24g_handler_flag = false;
|
||||
|
||||
/* Whitening of packet software */
|
||||
blecrc = rf_adv_packet_whiten(&data_len);
|
||||
|
||||
/* Packet software CRC judgment */
|
||||
rf_adv_crc_stat = rf_adv_crc(recv_adv_buf, &data_len, blecrc);
|
||||
if (rf_adv_crc_stat == CRC_OK) {
|
||||
/* Only after 5 bytes is valid data */
|
||||
for (uint8_t i = 0; i < data_len + 5; i++)
|
||||
LOGI("%02x ", recv_adv_buf[i]);
|
||||
LOGI("\r\n");
|
||||
}
|
||||
|
||||
memset(recv_adv_buf, 0, sizeof(recv_adv_buf));
|
||||
recv_len = 0;
|
||||
|
||||
/* Entering the receiver */
|
||||
CE_CTL_HIGH;
|
||||
}
|
||||
}
|
||||
}
|
||||
#else
|
||||
void rf_adv_rx_evevt(void)
|
||||
{
|
||||
uint8_t data_len = 0;
|
||||
uint32_t blecrc = 0;
|
||||
uint8_t rf_adv_crc_stat = CRC_IDLE;
|
||||
LOGI("************ADV Recv Start**************\r\n");
|
||||
/* Set testing frequency points */
|
||||
rf_set_channel(XINCX_ADV_CHANNEL);
|
||||
|
||||
/* Entering the receiver */
|
||||
CE_CTL_HIGH;
|
||||
|
||||
while (1) {
|
||||
if ((XC_RF_2_4G->STATUS) & MASK_RX_DR) {
|
||||
/* Entering standby mode */
|
||||
CE_CTL_LOW;
|
||||
|
||||
recv_len = rf_rx_packet(recv_adv_buf);
|
||||
if (recv_len != 0) {
|
||||
/* Whitening of packet software */
|
||||
blecrc = rf_adv_packet_whiten(&data_len);
|
||||
|
||||
/* Packet software CRC judgment */
|
||||
rf_adv_crc_stat = rf_adv_crc(recv_adv_buf, &data_len, blecrc);
|
||||
if (rf_adv_crc_stat == CRC_OK) {
|
||||
for (uint8_t i = 0; i < data_len + 5; i++)
|
||||
LOGI("%02x ", recv_adv_buf[i]);
|
||||
LOGI("\r\n");
|
||||
}
|
||||
|
||||
memset(recv_adv_buf, 0, sizeof(recv_adv_buf));
|
||||
recv_len = 0;
|
||||
}
|
||||
|
||||
/* Entering the receiver */
|
||||
CE_CTL_HIGH;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
#define RF_BLE_ADDR 0x1AB51376
|
||||
#define RF_BLE_CHN37 2402
|
||||
|
||||
uint8_t rf_rxdata[32];
|
||||
uint8_t rf_rxlen, rf_rssi;
|
||||
uint8_t rf_irq_cnt = 0;
|
||||
uint8_t rf_rx_cnt = 0;
|
||||
|
||||
mftest_t mftest = {0}; //生产测试
|
||||
|
||||
uint8_t getbuff[8] = {0};
|
||||
uint8_t setbuff[8] = {0};
|
||||
uint8_t saveflag = 1; //默认为断电保存状态
|
||||
uint8_t setrad_flag = 0;
|
||||
|
||||
volatile uint16_t cnt_ms1 = 0;
|
||||
volatile uint16_t cnt_ms2 = 0;
|
||||
volatile uint32_t ticks[64] = {0};
|
||||
void app_tick_handler(void)
|
||||
{
|
||||
cnt_ms1++;
|
||||
cnt_ms2++;
|
||||
light_tick();
|
||||
rad_tick();
|
||||
|
||||
//以下代码模拟定时器中运行的程序
|
||||
for(int i = 0; i < 64; i++)
|
||||
{
|
||||
if(ticks[i] < 0xFFFFFFFF)
|
||||
{
|
||||
ticks[i]++;
|
||||
}
|
||||
}
|
||||
}
|
||||
extern void readreg(void);
|
||||
#define LED1_PIN GPIO_1
|
||||
#define LED2_PIN GPIO_4
|
||||
/**
|
||||
* @brief main
|
||||
* @details
|
||||
* @param[in] void
|
||||
* @param[out] void
|
||||
* @retval int - 0
|
||||
* @retval void
|
||||
* @par identifier
|
||||
* reserve
|
||||
* @par other
|
||||
* void
|
||||
* @par change log
|
||||
* Alex created on 2023-05-31
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
/* Clock initialization */
|
||||
clock_init();
|
||||
|
||||
/* Serial port initialization */
|
||||
app_uart_init();
|
||||
light_init();
|
||||
rad_init();
|
||||
test_init(20);
|
||||
LOGI("__START__\n");
|
||||
|
||||
/* Simulate broadcast initialization */
|
||||
rf24g_adv_init();
|
||||
GPIO_InitCfg_t GPIO_InitCfg = { 0 };
|
||||
|
||||
GPIO_InitCfg.Mux = GPIO_Mux0;
|
||||
GPIO_InitCfg.FunSel = GPIO_Dx;
|
||||
GPIO_InitCfg.Pull = GPIO_PULLUP;
|
||||
// Board Led1 Initialization
|
||||
GPIO_InitCfg.Dir = GPIO_DIR_OUTPUT;
|
||||
GPIO_InitCfg.Int = NOT_INT;
|
||||
GPIO_InitCfg.Pin = LED1_PIN;
|
||||
xc_gpio_init(&GPIO_InitCfg);
|
||||
|
||||
GPIO_InitCfg.Mux = GPIO_Mux0;
|
||||
GPIO_InitCfg.FunSel = GPIO_Dx;
|
||||
GPIO_InitCfg.Pull = GPIO_PULLUP;
|
||||
// Board Led1 Initialization
|
||||
GPIO_InitCfg.Dir = GPIO_DIR_OUTPUT;
|
||||
GPIO_InitCfg.Int = NOT_INT;
|
||||
GPIO_InitCfg.Pin = LED2_PIN;
|
||||
xc_gpio_init(&GPIO_InitCfg);
|
||||
|
||||
xc_gpio_write_pin(LED1_PIN, GPIO_PIN_RESET);
|
||||
xc_gpio_write_pin(LED2_PIN, GPIO_PIN_RESET);
|
||||
#ifdef DEBUG_LOG
|
||||
/* Register information printing */
|
||||
rf_dump_log();
|
||||
#endif // DEBUG_LOG
|
||||
uint8_t data_len = 0;
|
||||
uint32_t blecrc = 0;
|
||||
uint8_t rf_adv_crc_stat = CRC_IDLE;
|
||||
LOGI("************ADV Recv Start**************\r\n");
|
||||
/* Set testing frequency points */
|
||||
rf_set_channel(XINCX_ADV_CHANNEL);
|
||||
|
||||
/* Enable RF24G interrupt */
|
||||
NVIC_EnableIRQ(RF24G_IRQn);
|
||||
|
||||
/* Entering the receiver */
|
||||
CE_CTL_HIGH;
|
||||
|
||||
#if (XINCX_ADV_MODE == TX_MODE)
|
||||
/* Send Event */
|
||||
rf_adv_tx_evevt();
|
||||
|
||||
#elif (XINCX_ADV_MODE == RX_MODE)
|
||||
/* Receive events */
|
||||
rf_adv_rx_evevt();
|
||||
|
||||
#endif
|
||||
ASSERT;
|
||||
}
|
||||
@@ -0,0 +1,179 @@
|
||||
#ifndef __MTYPES_H
|
||||
#define __MTYPES_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define NUM_MEMBERS 128
|
||||
#define NUM_DEVICES 32
|
||||
#define NUM_cfgb 8
|
||||
#define NUM_cfgc 8
|
||||
|
||||
typedef union _mword_t {
|
||||
uint32_t value;
|
||||
uint8_t data[4];
|
||||
}mword_t;
|
||||
|
||||
typedef enum _blink_t
|
||||
{
|
||||
BLINK = 1,
|
||||
BLINK2 = 2,
|
||||
}blink_t;
|
||||
|
||||
|
||||
typedef enum _roles_t
|
||||
{
|
||||
ROLE_A = 0x01,
|
||||
ROLE_B = 0x02,
|
||||
ROLE_C = 0x04,
|
||||
ROLE_D = 0x08,
|
||||
ROLE_E = 0x10,
|
||||
ROLE_F = 0x20,
|
||||
ROLE_G = 0x40,
|
||||
ROLE_H = 0x80,
|
||||
}roles_t;
|
||||
|
||||
typedef enum _status_t
|
||||
{
|
||||
STAT_1 = 0,
|
||||
STAT_2,
|
||||
STAT_3
|
||||
}status_t;
|
||||
|
||||
|
||||
typedef struct _mftest_t
|
||||
{
|
||||
uint8_t status;
|
||||
uint8_t mid;
|
||||
uint8_t bid;
|
||||
uint16_t rxtimes;
|
||||
}mftest_t;
|
||||
|
||||
|
||||
typedef struct _mport_t
|
||||
{
|
||||
uint8_t cmd;
|
||||
uint8_t length;
|
||||
uint8_t data[30];
|
||||
}mport_t;
|
||||
|
||||
|
||||
typedef union _configa_t {
|
||||
struct {
|
||||
uint8_t light1;
|
||||
uint8_t light0;
|
||||
uint8_t time;
|
||||
uint8_t didx;
|
||||
uint16_t weight;
|
||||
uint8_t uidx;
|
||||
uint8_t ctemp;
|
||||
uint8_t color1[5];
|
||||
uint8_t color0[5];
|
||||
};
|
||||
uint8_t data[20];
|
||||
}configa_t;
|
||||
|
||||
|
||||
typedef union _configb_t {
|
||||
struct {
|
||||
uint16_t a;
|
||||
uint16_t b;
|
||||
};
|
||||
uint8_t data[4];
|
||||
}configb_t;
|
||||
|
||||
typedef union _configc_t {
|
||||
struct {
|
||||
uint32_t a;
|
||||
uint16_t b;
|
||||
uint16_t c;
|
||||
uint8_t d;
|
||||
uint8_t e;
|
||||
uint8_t f;
|
||||
uint8_t g;
|
||||
uint8_t h;
|
||||
};
|
||||
uint8_t data[16];
|
||||
}configc_t;
|
||||
|
||||
|
||||
typedef union _configd_t {
|
||||
struct {
|
||||
uint16_t a;
|
||||
uint8_t b;
|
||||
uint8_t c;
|
||||
uint8_t d;
|
||||
uint8_t e;
|
||||
uint8_t f;
|
||||
uint8_t g1 : 5;
|
||||
uint8_t g2 : 3;
|
||||
};
|
||||
uint8_t data[8];
|
||||
}configd_t;
|
||||
|
||||
|
||||
typedef union _confige_t {
|
||||
struct {
|
||||
uint8_t a;
|
||||
uint8_t b;
|
||||
uint8_t c;
|
||||
uint8_t d;
|
||||
uint8_t e;
|
||||
uint8_t f;
|
||||
};
|
||||
uint8_t data[8];
|
||||
}confige_t;
|
||||
|
||||
|
||||
typedef struct _sett_t {
|
||||
uint8_t addr[4];
|
||||
uint16_t aa;
|
||||
uint16_t bb;
|
||||
}setlist_t;
|
||||
typedef struct _setting_t
|
||||
{
|
||||
setlist_t list[NUM_DEVICES];
|
||||
uint16_t number;
|
||||
}setting_t;
|
||||
|
||||
typedef struct _cfgg_t {
|
||||
uint8_t addr[4];
|
||||
uint8_t a;
|
||||
uint8_t b;
|
||||
uint16_t c;
|
||||
uint16_t d;
|
||||
uint16_t e;
|
||||
uint16_t f;
|
||||
}cfgglist_t;
|
||||
typedef struct _cfga_t
|
||||
{
|
||||
cfgglist_t list[NUM_DEVICES];
|
||||
uint16_t number;
|
||||
}cfga_t;
|
||||
|
||||
|
||||
typedef struct _cfggb_t
|
||||
{
|
||||
uint8_t addr[4];
|
||||
uint16_t a;
|
||||
uint16_t b;
|
||||
uint8_t c;
|
||||
}cfgblist_t;
|
||||
typedef struct _cfgb_t
|
||||
{
|
||||
cfgblist_t list[NUM_cfgb];
|
||||
uint16_t number;
|
||||
}cfgb_t;
|
||||
|
||||
typedef struct _cfggc_t
|
||||
{
|
||||
uint8_t addr[4];
|
||||
uint16_t a;
|
||||
}cfggclist_t;
|
||||
typedef struct _cfgc_t
|
||||
{
|
||||
cfggclist_t list[NUM_cfgb];
|
||||
uint16_t number;
|
||||
}cfgc_t;
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,132 @@
|
||||
#include "app.h"
|
||||
|
||||
volatile struct radval_t {
|
||||
uint16_t aa;
|
||||
uint16_t bb;
|
||||
}radval;
|
||||
|
||||
uint8_t rad_status = 0;
|
||||
uint8_t hhindex = 0;
|
||||
uint8_t hhcount = 0;
|
||||
|
||||
uint16_t ttdata1[24];
|
||||
uint16_t tttimes = 0;
|
||||
uint16_t wwtimes = 0;
|
||||
|
||||
volatile uint32_t tt_count = 0;
|
||||
volatile uint32_t hh_wait = 0;
|
||||
volatile uint32_t rad_wait = 0;
|
||||
|
||||
void rad_init(void)
|
||||
{
|
||||
rad_sethh();
|
||||
tt_count = SEC(6);
|
||||
}
|
||||
|
||||
void rad_tick(void)
|
||||
{
|
||||
if(tt_count < 0xFFFFFFFF)
|
||||
{
|
||||
tt_count++;
|
||||
}
|
||||
}
|
||||
|
||||
void rad_loop(void)
|
||||
{
|
||||
api_radar_read((uint16_t *)&radval);
|
||||
if(radval.bb >= param.cb.a)
|
||||
{
|
||||
rad_status = 1;
|
||||
if(rad_wait > 0)
|
||||
{
|
||||
api_led_set(1);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
rad_status = 0;
|
||||
api_led_set(0);
|
||||
}
|
||||
|
||||
if((rad_status != 0) && tt_count > SEC(10))
|
||||
{
|
||||
tt_count = 0;
|
||||
light_set_trig();
|
||||
ttdata1[hhindex]++;
|
||||
if(mftest.status == 0)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//ÿ100msÖ´ÐÐÒ»´Î
|
||||
void rad_100ms(void)
|
||||
{
|
||||
if(hh_wait > 0 && --hh_wait == 0)
|
||||
{
|
||||
|
||||
}
|
||||
if(wwtimes != 0)
|
||||
{
|
||||
wwtimes--;
|
||||
|
||||
}
|
||||
if(rad_wait > 0)
|
||||
{
|
||||
rad_wait--;
|
||||
}
|
||||
}
|
||||
|
||||
void rad_minute(void)
|
||||
{
|
||||
if(++hhcount >= 60)
|
||||
{
|
||||
hhcount = 0;
|
||||
tttimes = 0;
|
||||
for(uint8_t i = 0, index = hhindex; i < 24; i++)
|
||||
{
|
||||
tttimes += ttdata1[index];
|
||||
index = (index > 0) ? (index-1) : (23);
|
||||
}
|
||||
hhindex = (hhindex + 1) % 24;
|
||||
ttdata1[hhindex] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void rad_sethh(void)
|
||||
{
|
||||
hh_wait = 600 + (api_random()%600);
|
||||
}
|
||||
|
||||
void rad_setout(uint8_t type, uint8_t wait)
|
||||
{
|
||||
if(type == 0) //Í£Ö¹²¨ÐÎ
|
||||
{
|
||||
wwtimes = 0;
|
||||
}
|
||||
else if(wait < 100)
|
||||
{
|
||||
wwtimes = wait * 600;
|
||||
}
|
||||
else
|
||||
{
|
||||
wwtimes = 65535;
|
||||
}
|
||||
}
|
||||
|
||||
void rad_setled(uint16_t wait)
|
||||
{
|
||||
rad_wait = wait * 10;
|
||||
}
|
||||
|
||||
uint8_t rad_getstat(void)
|
||||
{
|
||||
return rad_status;
|
||||
}
|
||||
|
||||
uint32_t rad_getcount(void)
|
||||
{
|
||||
return tt_count;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,109 @@
|
||||
#include "app.h"
|
||||
#include "test.h"
|
||||
|
||||
//这段是用于模拟实际代码中RO-data的大小
|
||||
const uint16_t randmap1[800] = {
|
||||
0xC86E,0x0000,0x001F,0x00E3,0x00FC,0x0325,0x033A,0x03C6,0x03D9,0x054A,0x0555,0x05A9,0x05B6,0x066F,0x0670,0x068C,
|
||||
0x0693,0x1826,0x1839,0x18C5,0x18DA,0x1B03,0x1B1C,0x1BE0,0x1BFF,0x1D6C,0x1D73,0x1D8F,0x1D90,0x1E49,0x1E56,0x1EAA,
|
||||
0x1EB5,0x284B,0x2854,0x28A8,0x28B7,0x2B6E,0x2B71,0x2B8D,0x2B92,0x2D01,0x2D1E,0x2DE2,0x2DFD,0x2E24,0x2E3B,0x2EC7,
|
||||
0x2ED8,0x306D,0x3072,0x308E,0x3091,0x3348,0x3357,0x33AB,0x33B4,0x3527,0x3538,0x35C4,0x35DB,0x3602,0x361D,0x36E1,
|
||||
0x36FE,0x492B,0x4934,0x49C8,0x49D7,0x4A0E,0x4A11,0x4AED,0x4AF2,0x4C61,0x4C7E,0x4C82,0x4C9D,0x4F44,0x4F5B,0x4FA7,
|
||||
0x579E,0x6160,0x617F,0x6183,0x619C,0x6245,0x625A,0x62A6,0x62B9,0x642A,0x6435,0x64C9,0x64D6,0x670F,0x6710,0x67EC,
|
||||
0x4FB8,0x510D,0x5112,0x51EE,0x51F1,0x5228,0x5237,0x52CB,0x52D4,0x5447,0x5458,0x54A4,0x54BB,0x5762,0x577D,0x5781,
|
||||
0x579E,0x6160,0x617F,0x6183,0x619C,0x6245,0x625A,0x62A6,0x62B9,0x642A,0x6435,0x64C9,0x64D6,0x670F,0x6710,0x67EC,
|
||||
0x67F3,0x7946,0x7959,0x79A5,0x79BA,0x7A63,0x7A7C,0x7A80,0x7A9F,0x7C0C,0x7C13,0x7CEF,0x7CF0,0x7F29,0x7F36,0x7FCA,
|
||||
0x7FD5,0x894D,0x8952,0x89AE,0x89B1,0x8A68,0x8A77,0x8A8B,0x8A94,0x8C07,0x8C18,0x8CE4,0x8CFB,0x8F22,0x8F3D,0x8FC1,
|
||||
0x8FDE,0x916B,0x9174,0x9188,0x9197,0x924E,0x9251,0x92AD,0x92B2,0x9421,0x943E,0x94C2,0x94DD,0x9704,0x971B,0x97E7,
|
||||
0x97F8,0xA106,0xA119,0xA1E5,0xA1FA,0xA223,0xA23C,0xA2C0,0xA2DF,0xA44C,0xA453,0xA4AF,0xA4B0,0xA769,0xA776,0xA78A,
|
||||
0x8FDE,0x916B,0x9174,0x9188,0x9197,0x924E,0x9251,0x92AD,0x92B2,0x9421,0x943E,0x94C2,0x94DD,0x9704,0x971B,0x97E7,
|
||||
0xC6F5,0xD840,0xD85F,0xD8A3,0xD8BC,0xDB65,0xDB7A,0xDB86,0xDB99,0xDD0A,0xDD15,0xDDE9,0xDDF6,0xDE2F,0xDE30,0xDECC,
|
||||
0x36FE,0x492B,0x4934,0x49C8,0x49D7,0x4A0E,0x4A11,0x4AED,0x4AF2,0x4C61,0x4C7E,0x4C82,0x4C9D,0x4F44,0x4F5B,0x4FA7,
|
||||
0x579E,0x6160,0x617F,0x6183,0x619C,0x6245,0x625A,0x62A6,0x62B9,0x642A,0x6435,0x64C9,0x64D6,0x670F,0x6710,0x67EC,
|
||||
0x4FB8,0x510D,0x5112,0x51EE,0x51F1,0x5228,0x5237,0x52CB,0x52D4,0x5447,0x5458,0x54A4,0x54BB,0x5762,0x577D,0x5781,
|
||||
0x579E,0x6160,0x617F,0x6183,0x619C,0x6245,0x625A,0x62A6,0x62B9,0x642A,0x6435,0x64C9,0x64D6,0x670F,0x6710,0x67EC,
|
||||
0x579E,0x6160,0x617F,0x6183,0x619C,0x6245,0x625A,0x62A6,0x62B9,0x642A,0x6435,0x64C9,0x64D6,0x670F,0x6710,0x67EC,
|
||||
0x67F3,0x7946,0x7959,0x79A5,0x79BA,0x7A63,0x7A7C,0x7A80,0x7A9F,0x7C0C,0x7C13,0x7CEF,0x7CF0,0x7F29,0x7F36,0x7FCA,
|
||||
0xA795,0xB920,0xB93F,0xB9C3,0xB9DC,0xBA05,0xBA1A,0xBAE6,0xBAF9,0xBC6A,0xBC75,0xBC89,0xBC96,0xBF4F,0xBF50,0xBFAC,
|
||||
0xBFB3,0xC066,0xC079,0xC085,0xC09A,0xC343,0xC35C,0xC3A0,0xC3BF,0xC52C,0xC533,0xC5CF,0xC5D0,0xC609,0xC616,0xC6EA,
|
||||
0x8FDE,0x916B,0x9174,0x9188,0x9197,0x924E,0x9251,0x92AD,0x92B2,0x9421,0x943E,0x94C2,0x94DD,0x9704,0x971B,0x97E7,
|
||||
0xC6F5,0xD840,0xD85F,0xD8A3,0xD8BC,0xDB65,0xDB7A,0xDB86,0xDB99,0xDD0A,0xDD15,0xDDE9,0xDDF6,0xDE2F,0xDE30,0xDECC,
|
||||
0x36FE,0x492B,0x4934,0x49C8,0x49D7,0x4A0E,0x4A11,0x4AED,0x4AF2,0x4C61,0x4C7E,0x4C82,0x4C9D,0x4F44,0x4F5B,0x4FA7,
|
||||
0x579E,0x6160,0x617F,0x6183,0x619C,0x6245,0x625A,0x62A6,0x62B9,0x642A,0x6435,0x64C9,0x64D6,0x670F,0x6710,0x67EC,
|
||||
0x4FB8,0x510D,0x5112,0x51EE,0x51F1,0x5228,0x5237,0x52CB,0x52D4,0x5447,0x5458,0x54A4,0x54BB,0x5762,0x577D,0x5781,
|
||||
0x579E,0x6160,0x617F,0x6183,0x619C,0x6245,0x625A,0x62A6,0x62B9,0x642A,0x6435,0x64C9,0x64D6,0x670F,0x6710,0x67EC,
|
||||
0xDED3,0xE82D,0xE832,0xE8CE,0xE8D1,0xEB08,0xEB17,0xEBEB,0xEBF4,0xED67,0xED78,0xED84,0xED9B,0xEE42,0xEE5D,0xEEA1,
|
||||
0x579E,0x6160,0x617F,0x6183,0x619C,0x6245,0x625A,0x62A6,0x62B9,0x642A,0x6435,0x64C9,0x64D6,0x670F,0x6710,0x67EC,
|
||||
0x4FB8,0x510D,0x5112,0x51EE,0x51F1,0x5228,0x5237,0x52CB,0x52D4,0x5447,0x5458,0x54A4,0x54BB,0x5762,0x577D,0x5781,
|
||||
0x579E,0x6160,0x617F,0x6183,0x619C,0x6245,0x625A,0x62A6,0x62B9,0x642A,0x6435,0x64C9,0x64D6,0x670F,0x6710,0x67EC,
|
||||
0xC6F5,0xD840,0xD85F,0xD8A3,0xD8BC,0xDB65,0xDB7A,0xDB86,0xDB99,0xDD0A,0xDD15,0xDDE9,0xDDF6,0xDE2F,0xDE30,0xDECC,
|
||||
0x36FE,0x492B,0x4934,0x49C8,0x49D7,0x4A0E,0x4A11,0x4AED,0x4AF2,0x4C61,0x4C7E,0x4C82,0x4C9D,0x4F44,0x4F5B,0x4FA7,
|
||||
0x579E,0x6160,0x617F,0x6183,0x619C,0x6245,0x625A,0x62A6,0x62B9,0x642A,0x6435,0x64C9,0x64D6,0x670F,0x6710,0x67EC,
|
||||
0x67F3,0x7946,0x7959,0x79A5,0x79BA,0x7A63,0x7A7C,0x7A80,0x7A9F,0x7C0C,0x7C13,0x7CEF,0x7CF0,0x7F29,0x7F36,0x7FCA,
|
||||
0xA795,0xB920,0xB93F,0xB9C3,0xB9DC,0xBA05,0xBA1A,0xBAE6,0xBAF9,0xBC6A,0xBC75,0xBC89,0xBC96,0xBF4F,0xBF50,0xBFAC,
|
||||
0xBFB3,0xC066,0xC079,0xC085,0xC09A,0xC343,0xC35C,0xC3A0,0xC3BF,0xC52C,0xC533,0xC5CF,0xC5D0,0xC609,0xC616,0xC6EA,
|
||||
0xBFB3,0xC066,0xC079,0xC085,0xC09A,0xC343,0xC35C,0xC3A0,0xC3BF,0xC52C,0xC533,0xC5CF,0xC5D0,0xC609,0xC616,0xC6EA,
|
||||
0x8FDE,0x916B,0x9174,0x9188,0x9197,0x924E,0x9251,0x92AD,0x92B2,0x9421,0x943E,0x94C2,0x94DD,0x9704,0x971B,0x97E7,
|
||||
0xC6F5,0xD840,0xD85F,0xD8A3,0xD8BC,0xDB65,0xDB7A,0xDB86,0xDB99,0xDD0A,0xDD15,0xDDE9,0xDDF6,0xDE2F,0xDE30,0xDECC,
|
||||
0x36FE,0x492B,0x4934,0x49C8,0x49D7,0x4A0E,0x4A11,0x4AED,0x4AF2,0x4C61,0x4C7E,0x4C82,0x4C9D,0x4F44,0x4F5B,0x4FA7,
|
||||
0x579E,0x6160,0x617F,0x6183,0x619C,0x6245,0x625A,0x62A6,0x62B9,0x642A,0x6435,0x64C9,0x64D6,0x670F,0x6710,0x67EC,
|
||||
0x4FB8,0x510D,0x5112,0x51EE,0x51F1,0x5228,0x5237,0x52CB,0x52D4,0x5447,0x5458,0x54A4,0x54BB,0x5762,0x577D,0x5781,
|
||||
0x579E,0x6160,0x617F,0x6183,0x619C,0x6245,0x625A,0x62A6,0x62B9,0x642A,0x6435,0x64C9,0x64D6,0x670F,0x6710,0x67EC,
|
||||
0x36FE,0x492B,0x4934,0x49C8,0x49D7,0x4A0E,0x4A11,0x4AED,0x4AF2,0x4C61,0x4C7E,0x4C82,0x4C9D,0x4F44,0x4F5B,0x4FA7,
|
||||
0x579E,0x6160,0x617F,0x6183,0x619C,0x6245,0x625A,0x62A6,0x62B9,0x642A,0x6435,0x64C9,0x64D6,0x670F,0x6710,0x67EC,
|
||||
0x8FDE,0x916B,0x9174,0x9188,0x9197,0x924E,0x9251,0x92AD,0x92B2,0x9421,0x943E,0x94C2,0x94DD,0x9704,0x971B,0x97E7,
|
||||
0xBFB3,0xC066,0xC079,0xC085,0xC09A,0xC343,0xC35C,0xC3A0,0xC3BF,0xC52C,0xC533,0xC5CF,0xC5D0,0xC609,0xC616,0xC6EA,
|
||||
0xEEBE,0xF00B,0xF014,0xF0E8,0xF0F7,0xF32E,0xF331,0xF3CD,0xF3D2,0xF541,0xF55E,0xF5A2,0xF5BD,0xF664,0xF67B,0xF687};//下一个0xF698
|
||||
|
||||
//这段是用于模拟实际代码中RW-data的大小
|
||||
uint8_t randmap2[200] = {
|
||||
0x6E,0x00,0x0F,0xE3,0xFC,0x05,0x03,0x06,0x3D,0x0A,0x05,0x09,0x06,0x0F,0x00,0x8C,
|
||||
0x65,0x03,0x0F,0xE3,0xFC,0x07,0x03,0x06,0x3D,0x0A,0x05,0x09,0x06,0x0F,0x03,0x1C,
|
||||
0x6E,0x00,0x0F,0xE3,0xFC,0x05,0x03,0x06,0x36,0x0A,0x05,0x09,0x06,0x0F,0x05,0x5C,
|
||||
0x67,0x00,0x0F,0x63,0xFC,0x05,0x03,0x06,0x3D,0x0A,0x05,0x09,0x06,0x32,0x05,0x87,
|
||||
0x6E,0x30,0x0F,0xE3,0xFC,0x05,0x63,0x06,0x3D,0x0A,0x05,0x09,0x06,0x0F,0x07,0x81,
|
||||
0x6E,0x00,0x0F,0xE3,0xFC,0x05,0x03,0x06,0x3D,0x0A,0x05,0x09,0x06,0x6F,0x03,0x8C,
|
||||
0x6E,0x00,0x0F,0xE3,0x9C,0x85,0x03,0x06,0x86,0x3A,0x07,0x09,0x06,0x3F,0x07,0x87,
|
||||
0x69,0x00,0x0F,0xE3,0xFC,0x05,0x03,0x06,0x3D,0x0A,0x05,0x09,0x06,0x0F,0x02,0x8C,
|
||||
0x61,0x00,0x0F,0xE3,0xFC,0x05,0x58,0x06,0x37,0x0A,0x05,0x09,0x06,0x0F,0x06,0x35,
|
||||
0x6E,0x00,0x0F,0xE3,0xFC,0x05,0x03,0x06,0x3D,0x0A,0x05,0x09,0x06,0x6F,0x60,0x48,
|
||||
0x6E,0x00,0x0F,0xE3,0xFC,0x05,0x59,0x06,0x51,0x0A,0x05,0x09,0x06,0x07,0x34,0x85,
|
||||
0x6E,0x00,0x0F,0xE3,0xFC,0x05,0x03,0x06,0x3D,0x0A,0x05,0x09,0x06,0x0F,0x67,0x13,
|
||||
0x6E,0x00,0x0F,0xE3,0xFC,0x05,0x03,0x06,};
|
||||
|
||||
|
||||
volatile int a, b;
|
||||
|
||||
uint16_t randnum = 0;
|
||||
uint32_t total = 0;
|
||||
uint8_t count = 0;
|
||||
uint16_t rndindex = 0;
|
||||
|
||||
uint32_t buff1[1000]; //每分钟用电量记录
|
||||
uint32_t buff2[1000]; //每分钟触发率记录
|
||||
|
||||
void test_init(uint8_t value)
|
||||
{
|
||||
randnum = randmap1[value&0xFF];
|
||||
}
|
||||
|
||||
void test_100ms(void)
|
||||
{
|
||||
total += light_nowout();
|
||||
if(total >= 683954)
|
||||
{
|
||||
total -= 683954;
|
||||
buff1[count]++;
|
||||
buff2[count] = buff1[count] + randnum;
|
||||
}
|
||||
randnum = (randmap1[rndindex] ^ 0xA002) | b;
|
||||
count = (count + 1) % 1000;
|
||||
rndindex = (rndindex+1) % 512;
|
||||
|
||||
for(int i = 0; i < 200; i++)
|
||||
{
|
||||
randmap2[i] = randnum ^ 0x7E;
|
||||
a = randnum % 100;
|
||||
b |= a ^ randnum;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,9 @@
|
||||
#ifndef __TEST_H
|
||||
#define __TEST_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
extern void test_init(uint8_t value);
|
||||
extern void test_100ms(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,12 @@
|
||||
|
||||
FUNC void Initialization(void)
|
||||
{
|
||||
SP = _RDWORD(0x10000000);
|
||||
PC = _RDWORD(0x10000004);
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
LOAD %L INCREMENTAL
|
||||
Initialization();
|
||||
@@ -0,0 +1,39 @@
|
||||
[BREAKPOINTS]
|
||||
ForceImpTypeAny = 0
|
||||
ShowInfoWin = 1
|
||||
EnableFlashBP = 2
|
||||
BPDuringExecution = 0
|
||||
[CFI]
|
||||
CFISize = 0x00
|
||||
CFIAddr = 0x00
|
||||
[CPU]
|
||||
MonModeVTableAddr = 0xFFFFFFFF
|
||||
MonModeDebug = 0
|
||||
MaxNumAPs = 0
|
||||
LowPowerHandlingMode = 0
|
||||
OverrideMemMap = 0
|
||||
AllowSimulation = 1
|
||||
ScriptFile=""
|
||||
[FLASH]
|
||||
CacheExcludeSize = 0x00
|
||||
CacheExcludeAddr = 0x00
|
||||
MinNumBytesFlashDL = 0
|
||||
SkipProgOnCRCMatch = 1
|
||||
VerifyDownload = 1
|
||||
AllowCaching = 1
|
||||
EnableFlashDL = 2
|
||||
Override = 0
|
||||
Device="ARM7"
|
||||
[GENERAL]
|
||||
WorkRAMSize = 0x00
|
||||
WorkRAMAddr = 0x00
|
||||
RAMUsageLimit = 0x00
|
||||
[SWO]
|
||||
SWOLogFile=""
|
||||
[MEM]
|
||||
RdOverrideOrMask = 0x00
|
||||
RdOverrideAndMask = 0xFFFFFFFF
|
||||
RdOverrideAddr = 0xFFFFFFFF
|
||||
WrOverrideOrMask = 0x00
|
||||
WrOverrideAndMask = 0xFFFFFFFF
|
||||
WrOverrideAddr = 0xFFFFFFFF
|
||||
@@ -0,0 +1,84 @@
|
||||
|
||||
|
||||
|
||||
FUNC void InitGpio(void)
|
||||
{
|
||||
// Config IOMUX
|
||||
/*
|
||||
gpio_mux_ctl_u(33,1);//d2
|
||||
gpio_mux_ctl_u(34,1);//d3
|
||||
gpio_mux_ctl_u(35,2);//clk
|
||||
gpio_mux_ctl_u(36,2);//cs
|
||||
gpio_mux_ctl_u(37,2);//d0 rx
|
||||
gpio_mux_ctl_u(38,2);//d1 tx
|
||||
*/
|
||||
_WDWORD(0x4000019c, 0x00002A94);
|
||||
}
|
||||
FUNC void InitFlash(void)
|
||||
{
|
||||
|
||||
}
|
||||
FUNC void InitXIP(void)
|
||||
{
|
||||
|
||||
_WDWORD(0x40000104,0x040000);//reset ssi0
|
||||
_WDWORD(0x40000104,0x040004);//reset ssi0
|
||||
_WDWORD(0x40000050,0x110000);//close spi0 mclk
|
||||
_WDWORD(0x40000070,0x1000000);//close spi0 pclk
|
||||
|
||||
|
||||
//config fmc
|
||||
_WDWORD(0x40000270, 0x0503);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x40000270, 0x3503);
|
||||
//config cache
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x52000000, 0x0);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_WDWORD(0x52000000, 0x21);
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
_Sleep_(1);// delay about 400us
|
||||
|
||||
|
||||
//config xip spi
|
||||
_WDWORD(0x51000008, 0); //disable spi
|
||||
|
||||
_WDWORD(0x5100002c,0); //close IE
|
||||
_WDWORD(0x51000000,0x1F); //32bit SPI data
|
||||
_WDWORD(0x51000010,0x01); //enable select slave -- SE
|
||||
_WDWORD(0x51000018,0x0); //TXFTL be set 0
|
||||
_WDWORD(0x5100001c,0x0); //RXFTL be set 0
|
||||
|
||||
_WDWORD(0x5100010c, 0x01);//enable select slave
|
||||
_WDWORD(0x51000114, 0xFF);//XIP time out
|
||||
|
||||
_WDWORD(0x51000014, 0x2);//div 2
|
||||
|
||||
//quad
|
||||
_WDWORD(0x51000108, (2)|(6<<4)|(2<<9)|(1<<22)|(1<<29)|(1<<23)|(0<<24)|(8<<13));
|
||||
_WDWORD(0x51000100, 0x6b);//quad read cmd
|
||||
_WDWORD(0x51000104, 0x6b);//quad read cmd
|
||||
|
||||
|
||||
// //dual
|
||||
// _WDWORD(0x51000108, (1)|(6<<4)|(2<<9)|(1<<22)|(1<<29)|(1<<23)|(0)|(8<<13));
|
||||
// _WDWORD(0x51000100, 0x3b);//dual read cmd
|
||||
// _WDWORD(0x51000104, 0x3b);//dual read cmd
|
||||
|
||||
|
||||
_WDWORD(0x51000008, 1); //enable spi
|
||||
}
|
||||
|
||||
FUNC void Initialization(void)
|
||||
{
|
||||
InitGpio();
|
||||
InitFlash();
|
||||
InitXIP();
|
||||
SP = _RDWORD(0x11001000);
|
||||
PC = _RDWORD(0x11001004);
|
||||
_WDWORD(0x4000013C, 0x11001001);
|
||||
}
|
||||
LOAD %L INCREMENTAL
|
||||
Initialization();
|
||||
@@ -0,0 +1,18 @@
|
||||
|
||||
LOAD 0x10000000
|
||||
{
|
||||
EXE 0x10000000
|
||||
{
|
||||
startup_xinc.o (RESET, +FIRST)
|
||||
* (+RO)
|
||||
|
||||
}
|
||||
|
||||
RW +0000
|
||||
{
|
||||
* (+RW,+ZI)
|
||||
}
|
||||
|
||||
ScatterAssert(ImageLength(RW) < 1024 * 28)
|
||||
}
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user