63 lines
1.9 KiB
C
63 lines
1.9 KiB
C
#ifndef _BSP_GP_ADC_H_
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#define _BSP_GP_ADC_H_
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#define FIFO_DEEP 16
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#define GADC_FREQ_500K 16
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#define GADC_FREQ_1M 8
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#define GADC_FREQ_2M 4
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#define GADC_FREQ_4M 2
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#define GADC_FREQ_8M 1
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#define GADC_REF_2_47V 1
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#define GADC_REF_AVDD 2
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typedef struct gadc_cache_struct
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{
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unsigned int value_2 : 10;
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unsigned int chanel_2 : 4;
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unsigned int : 2;
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unsigned int value_1 : 10;
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unsigned int chanel_1 : 4;
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unsigned int : 2;
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} gadc_cache_t;
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void init_adc(uint8_t freq, uint8_t gadc_ref);
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void adc_gpio_config(uint8_t cio);
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int gadc_calibration_get(uint32_t *value);
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#define IO_GPADC_CHANNEL0 21 /*gpio21*/
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#define IO_GPADC_CHANNEL1 20 /*gpio20*/
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#define IO_GPADC_CHANNEL2 19 /*gpio19*/
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#define IO_GPADC_CHANNEL3 18 /*gpio18*/
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#define IO_GPADC_CHANNEL4 0 /*gpio0 */
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#define IO_GPADC_CHANNEL5 1 /*gpio1 */
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#define IO_GPADC_CHANNEL6 4 /*gpio4 */
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#define IO_GPADC_CHANNEL7 5 /*gpio5 */
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#define IO_GPADC_CHANNEL8 0xff /*???????2/3 ???????3.3V????8?????2.2V*/
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#define IO_GPADC_CHANNEL9 0xff
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#define IO_GPADC_CHANNEL10 2 /*gpio2 */
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#define IO_GPADC_CHANNEL11 3 /*gpio3 */
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#define GPADC_MAIN_CTL_EX_SAMPLE_NUM_Pos 12
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#define GPADC_MAIN_CTL_EX_SAMPLE_NUM_Msk (0xFul << GPADC_MAIN_CTL_EX_SAMPLE_NUM_Pos)
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#define GPADC_MAIN_CTL_EX_TRIGGER_SEL_Pos 8
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#define GPADC_MAIN_CTL_EX_TRIGGER_SEL_Msk (0x7ul << GPADC_MAIN_CTL_EX_TRIGGER_SEL_Pos)
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#define GPADC_MAIN_CTL_EX_EDGE_SEL_Pos 4
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#define GPADC_MAIN_CTL_EX_EDGE_SEL_Msk (0x3ul << GPADC_MAIN_CTL_EX_EDGE_SEL_Pos)
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#define GPADC_MAIN_CTL_EDGE_SEL_Pos 3
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#define GPADC_MAIN_CTL_EDGE_SEL_Msk (1ul << GPADC_MAIN_CTL_EDGE_SEL_Pos)
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#define GPADC_MAIN_CTL_AUTO_SW_Pos 2
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#define GPADC_MAIN_CTL_AUTO_SW_Msk (1ul << GPADC_MAIN_CTL_AUTO_SW_Pos)
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#define GPADC_MAIN_CTL_DMAS_ON_Pos 1
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#define GPADC_MAIN_CTL_DMAS_ON_Msk (1ul << GPADC_MAIN_CTL_DMAS_ON_Pos)
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#define GPADC_MAIN_CTL_EN_Pos 0
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#define GPADC_MAIN_CTL_EN_Msk (1ul << GPADC_MAIN_CTL_EN_Pos)
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#endif
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